Integrated magnetics based multi-port bidirectional DC-DC converter topology for discontinuous-mode operation

A new type of multi-port isolated bidirectional DC-DC converter is proposed in this study. In the proposed converter, transfer of power takes place through addition of magnetomotive forces generated by multiple windings on a common transformer core. This eliminates the need for a centralised storage capacitor to interface all the ports. Hence, the requirement of an additional power transfer stage from the centralised capacitor can also be eliminated. The converter can be used for a multi-input, multi-output (MIMO) system. A pulse width modulation (PWM) strategy for controlling simultaneous power flow in the MIMO converter is also proposed. The proposed PWM scheme works in the discontinuous conduction mode. The leakage inductance can be chosen to aid power transfer. By using the proposed converter topology and PWM scheme, the need to compute power flow equations to determine the magnitude and direction of power flow between ports is alleviated. Instead, a simple controller structure based on average current control can be used to control the power flow. This study discusses the operating phases of the proposed multi-port converter along with its PWM scheme, the design process for each of the ports and finally experimental waveforms that validate the multi-port scheme.

Space-vector-based hybrid pulse width modulation technique to reduce line current distortion in induction motor drives

Pulse width modulation (PWM) techniques involving different switching sequences are used in space vector-based PWM generation for reducing line current ripple in induction motor drives. This study proposes a hybrid PWM technique employing five switching sequences. The proposed technique is a combination of continuous PWM, discontinuous PWM (DPWM) and advanced bus clamping PWM methods. Performance of the proposed PWM technique is evaluated and compared with those of the existing techniques on a constant volts per hertz induction motor drive. In terms of total harmonic distortion in the line current, the proposed method is shown to be superior to both conventional space vector PWM (CSVPWM) and DPWM over a fundamental frequency range of 32-50 Hz at a given average switching frequency. The reduction in harmonic distortion is about 42% over CSVPWM at the rated speed of the drive.

A Hybrid Five-Level Inverter With Common-Mode Voltage Elimination Having Single Voltage Source for IM Drive Applications

A new hybrid five-level inverter topology with common-mode voltage (CMV) elimination for induction motor drive is proposed in this paper. This topology has only one dc source, and different voltage levels are generated by using this voltage source along with floating capacitors charged to asymmetrical voltage levels. The pulsewidth modulation (PWM) scheme employed in this topology balances the capacitor voltages at the required levels at any power factor and modulation index while eliminating the CMV. This inverter has good fault-tolerant capability as it can be operated in three-or two-level mode with CMV elimination, in case of any failure in the H-bridges. More voltage levels with CMV elimination can be realized from this topology but only in a limited range of modulation index and power factor. Extensive simulation is done to validate the PWM technique for CMV elimination and balancing of the capacitor voltages. The experimental verification of the proposed inverter-fed induction motor is carried out in the linear modulation and overmodulation regions. The steady-state and transient operations of the drive are verified. The dynamics of the capacitor voltage balancing is also tested. The experimental results demonstrate that the proposed topology can be considered for industrial drive applications.

Multilevel Dodecagonal Voltage Space Vector Generation using Flying Capacitor topology for Induction motor drives

In this paper, a multilevel flying capacitor inverter topology suitable for generating multilevel dodecagonal space vectors for an induction motor drive, is proposed. Because of the dodecagonal space vectors, it has increased modulation range with the absence of all 6n +/- 1, (n=odd) harmonics in the phase voltage and currents. The topology, realized by flying capacitor three level inverters feeding an open-end winding induction motor, does not suffer the neutral point voltage imbalance issues seen in NPC inverters and the capacitors have inherent charge-balancing capability with PWM control using switching state redundancies. Furthermore, the proposed technique uses lesser number of power supplies compared to cascaded H-bridge or NPC based dodecagonal schemes and has better ride-through capability. Finally, the voltage control is obtained through a simple carrier-based space vector PWM scheme implemented on a DSP.

Nearly constant switching frequency hysteresis current controller for general n-level inverter fed induction motor drive

A current-error space phasor based hysteresis controller with nearly constant switching frequency is proposed for a general n-level voltage source inverter fed three-phase induction motor drive. Like voltage-controlled space vector PWM (SVPWM), the proposed controller can precisely detect sub-sector changes and for switching it selects only the nearest switching voltage vectors using the information of the estimated fundamental stator voltages along α and β axes. It provides smooth transition between voltage levels, including operation in over modulation region. Due to adjacent switching amongst the nearest switching vectors forming a triangular sub-sector, in which tip of the fundamental stator voltage vector of the machine lies, switching loss is reduced while keeping the current-error space phasor within the varying parabolic boundary. Appropriate dimension and orientation of this parabolic boundary ensures similar switching frequency spectrum like constant switching frequency SVPWM-based induction motor (IM) drive. Inherent advantages of multi-level inverter and space phasor based current hysteresis controller are retained. The proposed controller is simulated as well as implemented on a 5-level inverter fed 7.5 kW open-end winding IM drive.

A Space-Vector-Based Hysteresis Current Controller for a General n-Level Inverter-Fed Drive With Nearly Constant Switching Frequency Control

A current-error space-vector-based hysteresis current controller for a general n-level voltage-source inverter (VSI)-fed three-phase induction motor (IM) drive is proposed here, with control of the switching frequency variation for the full linear modulation range. The proposed current controller monitors the space-vector-based current error of an n-level VSI-fed IM to keep the current error within a parabolic boundary, using the information of the current triangular sector in which the tip of the reference vector lies. Information of the reference voltage vector is estimated using the measured current-error space vectors, along the alpha- and beta-axes. Appropriate dimension and orientation of this parabolic boundary ensure a switching frequency spectrum similar to that of a constant-switching-frequency voltage-controlled space vector pulsewidth modulation (PWM) (SVPWM)-based IM drive. Like SVPWM for multilevel inverters, the proposed controller selects inverter switching vectors, forming a triangular sector in which the tip of the reference vector stays, for the hysteresis PWM control. The sector in the n-level inverter space vector diagram, in which the tip of the fundamental stator voltage stays, is precisely detected, using the sampled reference space vector estimated from the instantaneous current-error space vectors. The proposed controller retains all the advantages of a conventional hysteresis controller such as fast current control, with smooth transition to the overmodulation region. The proposed controller is implemented on a five-level VSI-fed 7.5-kW IM drive.

A Hybrid Multilevel Inverter System Based on Dodecagonal Space Vectors for Medium Voltage IM Drives

Dodecagonal (12-sided) space vector pulsewidth modulation (PWM) schemes are characterized by the complete absence of (6n +/- 1)th-order harmonics (for odd n) in the phase voltages, within the linear modulation range and beyond, including over-modulation. This paper presents a new topology suitable for the realization of such multilevel inverter schemes for induction motor (IM) drives, by cascading two-level inverters with flying-capacitor-inverter fed floating H-bridge cells. Now, any standard IM may be used to get the dodecagonal operation which hitherto was possible only with open-end winding IM. To minimize the current total harmonic distortion (THD), a strategy for synchronous PWM is also proposed. It is shown that the proposed method is capable of obtaining better THD figures, compared to conventional dodecagonal schemes. The topology and the PWM strategy are validated through analysis and subsequently verified experimentally.

Medium Voltage Drive for Induction Motors Using Multilevel Octadecagonal Voltage Space Vectors

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two-level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18-sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three-level inverters. By the proper selection of dc-link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector-based pulsewidth modulation (PWM) techniques are the complete elimination of fifth, seventh, eleventh, and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Experimental results have been presented in this paper to validate the proposed concept.

A Multilevel Inverter Scheme With Dodecagonal Voltage Space Vectors Based on Flying Capacitor Topology for Induction Motor Drives

This paper presents a multilevel inverter topology suitable for the generation of dodecagonal space vectors instead of hexagonal space vectors as in the case of conventional schemes. This feature eliminates all the 6n +/- 1 (n = odd) harmonics from the phase voltages and currents in the entire modulation range with an increase in the linear modulation range. The topology is realized by flying capacitor-based three-level inverters feeding from two ends of an open-end winding induction motor with asymmetric dc links. The flying capacitor voltages are tightly controlled throughout the modulation range using redundant switching states for any load power factor. A simple and fast carrier-based space-vector pulsewidth modulation (PWM) scheme is also proposed for the topology which utilizes only the sampled amplitudes of the reference wave for the PWM timing computation.

Comparison of 3-phase, 3-level UPF rectifier circuits for high power applications

This paper presents an analysis and comparison between two circuit topologies of the 3-phase, 3-level unity power factor (Vienna) rectifier on the basis of packaging issues and semiconductor power losses. The analysis indicates the suitability of one particular circuit variant due to restrictions on switching frequency at higher power levels. A comparison is also done between hysteresis and carrier based PWM strategies for current control of the rectifier, along with experimental evaluation of the control strategies on a hardware prototype of the rectifier. The comparison indicates that the carrier based modulation strategy is better suited for use with higher order filters that are utilized in high power applications.

Multilevel octadecagonal space vector generation for induction motor drives by cascading asymmetric three level inverters

Multilevel inverters with hexagonal and dodecagonal voltage space vector structures have improved harmonic profile compared to two level inverters. Further improvement in the quality of the waveform is possible using multilevel octadecagonal (18 sided polygon) voltage space vectors. This paper proposes an inverter circuit topology capable of generating multilevel octadecagonal voltage space vectors, by cascading two asymmetric three level inverters. By proper selection of DC link voltages and the resultant switching states for the inverters, voltage space vectors, whose tips lie on three concentric octadecagons, are obtained. The advantages of octadecagonal voltage space vector based PWM techniques are the complete elimination of fifth, seventh, eleventh and thirteenth harmonics in phase voltages and the extension of linear modulation range. In this paper, a simple PWM timing calculation method is also proposed. Matlab simulation results and experimental results have been presented in this paper to validate the proposed concept.

A nearly constant switching frequency current hysteresis controller with generalized parabolic boundaries using 12-sided polygonal voltage space vectors for IM drives

In this paper, a current hysteresis controller with parabolic boundaries for a 12-sided polygonal voltage space vector inverter fed induction motor (IM) drive is proposed. Parabolic boundaries with generalized vector selection logic, valid for all sectors and rotational direction, is used in the proposed controller. The current error space phasor boundary is obtained by first studying the drive scheme with space vector based PWM (SVPWM) controller. Four parabolas are used to approximate this current error space phasor boundary. The system is then run with space phasor based hysteresis PWM controller by limiting the current error space vector (CESV) within the parabolic boundary. The proposed controller has simple controller implementation, nearly constant switching frequency, extended modulation range and fast dynamic response with smooth transition to the over modulation region.

Harmonic Analysis of DC-Link Capacitor Current in Sinusoidally Modulated Neutral-Point-Clamped Inverter

The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents double Fourier series based harmonic analysis of DC capacitor current in a three-level neutral point clamped inverter, modulated with sine-triangle PWM. The analytical results are validated experimentally on a 5-kVA three-level inverter prototype. The results of the analysis are used for predicting the power loss in the DC capacitor.

A 5th and 7th Order Harmonic Suppression Scheme for Open-end Winding Asymmetrical Six-phase IM Drive Using Capacitor-fed Inverter

Voltage source inverter (VSI) fed six-phase induction motor drives have high 6n +/- 1; n = odd order harmonic currents, due to absence of back emf for these currents. To suppress these harmonic currents, either bulky inductive harmonic filters or complex pulse width modulation (PWM) techniques have to be used. This paper proposes a simple harmonic elimination scheme using capacitor fed inverters, for an asymmetrical six-phase induction motor VSI fed drive. Two three phase inverters fed from a single capacitor is used on the open-end side of the motor, to suppress 6n +/- 1; n = odd order harmonics. A PWM scheme that can suppress the harmonics, as well as balance the capacitor voltage is also proposed. The capacitor fed inverters are switched so that the fundamental voltage is not affected. The proposed scheme is verified using MATLAB Simulink simulation at different speeds. The effectiveness of the scheme is demonstrated by comparing the results with those obtained by disabling the capacitor fed inverters. Experimental results are also provided to validate the functionality of the proposed controller.

Nearly Constant Switching Frequency Hysteresis Current Controller with Fast Online Computation of Boundary for a 2-Level Induction Motor Drive

A nearly constant switching frequency current hysteresis controller for a 2-level inverter fed induction motor drive is proposed in this paper: The salient features of this controller are fast dynamics for the current, inherent protection against overloads and less switching frequency variation. The large variation of switching frequency as in the conventional hysteresis controller is avoided by defining a current-error boundary which is obtained from the current-error trajectory of the standard space vector PWM. The current-error boundary is computed at every sampling interval based on the induction machine parameters and from the estimated fundamental stator voltage. The stator currents are always monitored and when the current-error exceeds the boundary, voltage space vector is switched to reduce the current-error. The proposed boundary computation algorithm is applicable in linear and over-modulation region and it is simple to implement in any standard digital signal processor: Detailed experimental verification is done using a 7.5 kW induction motor and the results are given to show the performance of the drive at various operating conditions and validate the proposed advantages.