Performance analysis of Java APIS for XML processing

Over time, XML markup language has acquired a considerable importance in applications development, standards definition and in the representation of large volumes of data, such as databases. Today, processing XML documents in a short period of time is a critical activity in a large range of applications, which imposes choosing the most appropriate mechanism to parse XML documents quickly and efficiently. When using a programming language for XML processing, such as Java, it becomes necessary to use effective mechanisms, e.g. APIs, which allow reading and processing of large documents in appropriated manners. This paper presents a performance study of the main existing Java APIs that deal with XML documents, in order to identify the most suitable one for processing large XML files.

Optical Filter Design Using Background Wavelength Processing Techniques

Amorphous SiC tandem heterostructures are used to filter a specific band, in the visible range. Experimental and simulated results are compared to validate the use of SiC multilayered structures in applications where gain compensation is needed or to attenuate unwanted wavelengths. Spectral response data acquired under different frequencies, optical wavelength control and side irradiations are analyzed. Transfer function characteristics are discussed. Color pulsed communication channels are transmitted together and the output signal analyzed under different background conditions. Results show that under controlled wavelength backgrounds, the device sensitivity is enhanced in a precise wavelength range and quenched in the others, tuning or suppressing a specific band. Depending on the background wavelength and irradiation side, the device acts either as a long-, a short-, or a band-rejection pass filter. An optoelectronic model supports the experimental results and gives insight on the physics of the device.

Reconfigurable SiC Embedded Photonic Structures with Self Optical Bias Control

Multilayered heterostructures based on embedded a-Si:H and a-SiC:H p-i-n filters are analyzed from differential voltage design perspective using short- and long-pass filters. The transfer functions characteristics are presented. A numerical simulation is presented to explain the filtering properties of the photonic devices. Several monochromatic pulsed lights, separately (input channels) or in a polychromatic mixture (multiplexed signal) at different bit rates, illuminated the device. Steady-state optical bias is superimposed from the front and the back side. Results show that depending on the wavelength of the external background and impinging side, the device acts either as a short- or a long-pass band filter or as a band-stop filter. Particular attention is given to the amplification coefficient weights, which allow to take into account the wavelength background effects when a band or frequency needs to be filtered or the gate switch, in which optical active filter gates are used to select and filter input signals to specific output ports in wavelength division multiplexing (WDM) communication systems. This nonlinearity provides the possibility for selective removal or addition of wavelengths. A truth table of an encoder that performs 8-to-1 MUX function exemplifies the optoelectronic conversion.

Scalable Unified Transform Architecture for Advanced Video Coding Embedded Systems

A novel high throughput and scalable unified architecture for the computation of the transform operations in video codecs for advanced standards is presented in this paper. This structure can be used as a hardware accelerator in modern embedded systems to efficiently compute all the two-dimensional 4 x 4 and 2 x 2 transforms of the H.264/AVC standard. Moreover, its highly flexible design and hardware efficiency allows it to be easily scaled in terms of performance and hardware cost to meet the specific requirements of any given video coding application. Experimental results obtained using a Xilinx Virtex-5 FPGA demonstrated the superior performance and hardware efficiency levels provided by the proposed structure, which presents a throughput per unit of area relatively higher than other similar recently published designs targeting the H.264/AVC standard. Such results also showed that, when integrated in a multi-core embedded system, this architecture provides speedup factors of about 120x concerning pure software implementations of the transform algorithms, therefore allowing the computation, in real-time, of all the above mentioned transforms for Ultra High Definition Video (UHDV) sequences (4,320 x 7,680 @ 30 fps).

Driving Scheme Using MIS Photosensor for Luminance Control of AMOLED Pixel

This paper presents a new driving scheme utilizing an in-pixel metal-insulator-semiconductor (MIS) photosensor for luminance control of active-matrix organic light-emitting diode (AMOLED) pixel. The proposed 3-TFT circuit is controlled by an external driver performing the signal readout, processing, and programming operations according to a luminance adjusting algorithm. To maintain the fabrication simplicity, the embedded MIS photosensor shares the same layer stack with pixel TFTs. Performance characteristics of the MIS structure with a nc-Si : H/a-Si : H bilayer absorber were measured and analyzed to prove the concept. The observed transient dark current is associated with charge trapping at the insulator-semiconductor interface that can be largely eliminated by adjusting the bias voltage during the refresh cycle. Other factors limiting the dynamic range and external quantum efficiency are also determined and verified using a small-signal model of the device. Experimental results demonstrate the feasibility of the MIS photosensor for the discussed driving scheme.

Optical processing devices based on a-SiCH multilayer architectures

Red, green and blue optical signals were directed to an a-SiC:H multilayered device, each one with a specific transmission rate. The combined optical signal was analyzed by reading out, under different applied voltages, the generated photocurrent. Results show that when a chromatic time dependent wavelength combination with different transmission rates irradiates the multilayered structure, the device operates as a tunable wavelength filter and can be used in wavelength division multiplexing systems for short range communications. An application to fluorescent proteins detection is presented. (C) 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

Classificação de atividades físicas através do uso do acelerómetro do smartphone

Dissertação de natureza científica realizada para a obtenção do grau de Mestre em Engenharia de redes de comunicação e Multimédia

A biosignal embedded system for physiological computing

Thesis submitted in the fulfilment of the requirements for the Degree of Master in Electronic and Telecomunications Engineering

Multiprocessor platform using LEON3 processor

The recent advances in embedded systems world, lead us to more complex systems with application specific blocks (IP cores), the System on Chip (SoC) devices. A good example of these complex devices can be encountered in the cell phones that can have image processing cores, communication cores, memory card cores, and others. The need of augmenting systems’ processing performance with lowest power, leads to a concept of Multiprocessor System on Chip (MSoC) in which the execution of multiple tasks can be distributed along various processors. This thesis intends to address the creation of a synthesizable multiprocessing system to be placed in a FPGA device, providing a good flexibility to tailor the system to a specific application. To deliver a multiprocessing system, will be used the synthesisable 32-bit SPARC V8 compliant, LEON3 processor.

ECG denoising based on adaptive signal processing technique

An Electrocardiogram (ECG) monitoring system deals with several challenges related with noise sources. The main goal of this text was the study of Adaptive Signal Processing Algorithms for ECG noise reduction when applied to real signals. This document presents an adaptive ltering technique based on Least Mean Square (LMS) algorithm to remove the artefacts caused by electromyography (EMG) and power line noise into ECG signal. For this experiments it was used real noise signals, mainly to observe the di erence between real noise and simulated noise sources. It was obtained very good results due to the ability of noise removing that can be reached with this technique. A recolha de sinais electrocardiogr a cos (ECG) sofre de diversos problemas relacionados com ru dos. O objectivo deste trabalho foi o estudo de algoritmos adaptativos para processamento digital de sinal, para redu c~ao de ru do em sinais ECG reais. Este texto apresenta uma t ecnica de redu c~ao de ru do baseada no algoritmo Least Mean Square (LMS) para remo c~ao de ru dos causados quer pela actividade muscular (EMG) quer por ru dos causados pela rede de energia el ectrica. Para as experiencias foram utilizados ru dos reais, principalmente para aferir a diferen ca de performance do algoritmo entre os sinais reais e os simulados. Foram conseguidos bons resultados, essencialmente devido as excelentes caracter sticas que esta t ecnica tem para remover ru dos.

Actuador linear para teste de teclas na indústria automóvel

As indústrias de componentes e acessórios automóveis são um elo fundamental no processo produtivo da indústria automóvel. Neste leque industrial encontra-se a Preh Portugal, Lda, como empresa fornecedora de componentes electrónicos, mais concretamente, painéis de controlo de climatização. Os painéis fornecidos pela Preh aos seus clientes encontram-se sujeitos a rigorosos testes de qualidade e funcionalidade. Neste sentido o teste funcional das teclas surge, relacionando o curso da tecla em função de uma força actuante. Esta relação está comprometida com uma curva característica padrão para o tipo de tecla. Para além destes compromissos, também é necessário que a tecla feche e abra o seu contacto eléctrico. Esta tese foca-se no desenvolvimento do teste de teclas, apresentando uma alteração ao sistema actual com a introdução de um sistema embebido, no intuito de flexibilizar o sistema de teste e reduzindo custos. O sistema embebido pretende dar capacidade de processamento ao teste e, desta forma, substituir o actual computador como elemento de processamento. A solução implementada consistiu numa mudança estrutural, através da inclusão do sistema embebido entre o computador e o sistema de deslocamento. Passando o foco central do processo de teste a residir no sistema embebido, este tem de estabelecer comunicações com os restantes elementos intervenientes no teste. Estabelece comunicações série RS-232 com o sistema de deslocamento (leitura do curso e força na tecla), Ethernet com o computador (comandos, parâmetros e resultados) e CAN com o painel de controlo de climatização (fecho/abertura do contacto eléctrico). A concretização deste projecto resultou numa nova estrutura e aplicação, a qual é facilmente integrada na linha de produção com as vantagens de ser menos onerosa e mais flexível, conforme o pretendido.

Acesso remoto via infra-estrutura de teste IEEE1149.1 a dispositivos lógicos programáveis

Actualmente verifica-se que a complexidade dos sistemas informáticos tem vindo a aumentar, fazendo parte das nossas ferramentas diárias de trabalho a utilização de sistemas informáticos e a utilização de serviços online. Neste âmbito, a internet obtém um papel de destaque junto das universidades, ao permitir que alunos e professores possam interagir mais facilmente. A internet e a educação baseada na Web vêm oferecer acesso remoto a qualquer informação independentemente da localização ou da hora. Como consequência, qualquer pessoa com uma ligação à internet, ao poder adquirir informações sobre um determinado tema junto dos maiores peritos, obtém vantagens significativas. Os laboratórios remotos são uma solução muito valorizada no que toca a interligar tecnologia e recursos humanos em ambientes que podem estar afastados no tempo ou no espaço. A criação deste tipo de laboratórios e a sua utilidade real só é possível porque as tecnologias de comunicação emergentes têm contribuído de uma forma muito relevante para melhorar a sua disponibilização à distância. A necessidade de criação de laboratórios remotos torna-se imprescindível para pesquisas relacionadas com engenharia que envolvam a utilização de recursos escassos ou de grandes dimensões. Apoiado neste conceito, desenvolveu-se um laboratório remoto para os alunos de engenharia que precisam de testar circuitos digitais numa carta de desenvolvimento de hardware configurável, permitindo a utilização deste recurso de uma forma mais eficiente. O trabalho consistiu na criação de um laboratório remoto de baixo custo, com base em linguagens de programação open source, sendo utilizado como unidade de processamento um router da ASUS com o firmware OpenWrt. Este firmware é uma distribuição Linux para sistemas embutidos. Este laboratório remoto permite o teste dos circuitos digitais numa carta de desenvolvimento de hardware configurável em tempo real, utilizando a interface JTAG. O laboratório desenvolvido tem a particularidade de ter como unidade de processamento um router. A utilização do router como servidor é uma solução muito pouco usual na implementação de laboratórios remotos. Este router, quando comparado com um computador normal, apresenta uma capacidade de processamento e memória muito inferior, embora os testes efectuados provassem que apresenta um desempenho muito adequado às expectativas.

High Performance Multi-Standard Architecture for DCT Computation in H.264/AVC High Profile and HEVC Codecs

A new high performance architecture for the computation of all the DCT operations adopted in the H.264/AVC and HEVC standards is proposed in this paper. Contrasting to other dedicated transform cores, the presented multi-standard transform architecture is supported on a completely configurable, scalable and unified structure, that is able to compute not only the forward and the inverse 8×8 and 4×4 integer DCTs and the 4×4 and 2×2 Hadamard transforms defined in the H.264/AVC standard, but also the 4×4, 8×8, 16×16 and 32×32 integer transforms adopted in HEVC. Experimental results obtained using a Xilinx Virtex-7 FPGA demonstrated the superior performance and hardware efficiency levels provided by the proposed structure, which outperforms its more prominent related designs by at least 1.8 times. When integrated in a multi-core embedded system, this architecture allows the computation, in real-time, of all the transforms mentioned above for resolutions as high as the 8k Ultra High Definition Television (UHDTV) (7680×4320 @ 30fps).

Embedded System for ECG Biometrics

Comunication in Internationa Conference with Peer Review First International Congress on Cardiovasular Technologies - CARDIOTECHNIX, Vilamoura, Portugal, 2013

Feature selection for clustering categorical data with an embedded modelling approach

Research on the problem of feature selection for clustering continues to develop. This is a challenging task, mainly due to the absence of class labels to guide the search for relevant features. Categorical feature selection for clustering has rarely been addressed in the literature, with most of the proposed approaches having focused on numerical data. In this work, we propose an approach to simultaneously cluster categorical data and select a subset of relevant features. Our approach is based on a modification of a finite mixture model (of multinomial distributions), where a set of latent variables indicate the relevance of each feature. To estimate the model parameters, we implement a variant of the expectation-maximization algorithm that simultaneously selects the subset of relevant features, using a minimum message length criterion. The proposed approach compares favourably with two baseline methods: a filter based on an entropy measure and a wrapper based on mutual information. The results obtained on synthetic data illustrate the ability of the proposed expectation-maximization method to recover ground truth. An application to real data, referred to official statistics, shows its usefulness.