Inductive-Capacitive Resonant Circuit Sensors for Structural Health and Environmental Monitoring

Inductive-capacitive (LC) resonant circuit sensors are low-cost, wireless, durable, simple to fabricate and battery-less. Consequently, they are well suited to sensing applications in harsh environments or in situations where large numbers of sensors are needed. They are also advantageous in applications where access to the sensor is limited or impossible or when sensors are needed on a disposable basis. Due to their many advantages, LC sensors have been used for sensing a variety of parameters including humidity, temperature, chemical concentrations, pH, stress/pressure, strain, food quality and even biological growth. However, current versions of the LC sensor technology are limited to sensing only one parameter. The purpose of this work is to develop new types of LC sensor systems that are simpler to fabricate (hence lower cost) or capable of monitoring multiple parameters simultaneously. One design presented in this work, referred to as the multi-element LC sensor, is able to measure multiple parameters simultaneously using a second capacitive element. Compared to conventional LC sensors, this design can sense multiple parameters with a higher detection range than two independent sensors while maintaining the same overall sensor footprint. In addition, the two-element sensor does not suffer from interference issues normally encountered while implementing two LC sensors in close proximity. Another design, the single-spiral inductive-capacitive sensor, utilizes the parasitic capacitance of a coil or spring structure to form a single layer LC resonant circuit. Unlike conventional LC sensors, this design is truly planar, thus simplifying its fabrication process and reducing sensor cost. Due to the simplicity of this sensor layout it will be easier and more cost-effective for embedding in common building or packaging materials during manufacturing processes, thereby adding functionality to current products (such as drywall sheets) while having a minor impact on overall unit cost. These modifications to the LC sensor design significantly improve the functionality and commercial feasibility of this technology, especially for applications where a large array of sensors or multiple sensing parameters are required.

Biomechanical comparison of different surface modifications for dental implants

Purpose: A satisfactory clinical outcome in dental implant treatment relies on primary stability for immediate load bearing. While the geometric design of an implant contributes to mechanical stability, the nature of the implant surface itself is also critically important. Biomechanical and microcomputerized tomographic evaluation of implant osseointegration was performed to compare alternative structural, chemical and biochemical, and/or pharmaceutical surface treatments applied to an identical established implant design. Materials and Methods: Dental implants with the same geometry but with 6 different surface treatments were tested in vivo in a sheep model (pelvis). Peri-implant bone density and removal torque were compared at 2, 4, and 8 weeks after implantation. Implant surfaces tested were: sandblasted and acid-etched titanium (Ti), sandblasted and etched zirconia, Ti coated with calcium phosphate (CaP), Ti modified via anodic plasma-chemical treatment (APC), bisphosphonate-coated Ti (Ti + Bisphos), and Ti coated with collagen containing chondroitin sulfate (CS). Results: All dental implants were well integrated at the time of sacrifice. There were no significant differences observed in peri-implant bone density between implant groups. After 8 weeks of healing, removal torque values for Ti, Ti + CaP, Ti + Bisphos, and Ti + collagen + CS were significantly higher than those for zirconia and Ti + APC. Conclusions: Whereas the sandblasted/acid-etched Ti implant can still be considered the reference standard surface for dental implants, functional surface modifications such as bisphosphonate or collagen coating seem to enhance early peri-implant bone formation and should be studied further.

Synthesis and testing of photoaffinity probes for the site-selectivechemical modifications of the 5-HT3 receptor

The 5-HT3 receptor (5-HT3R) is an important ion channel responsible for the transmission of nerve impulses in the central nervous system.1 It is difficult to characterize transmembrane dynamic receptors with classical structural biology approaches like crystallization and x-ray. The use of photoaffinity probes is an alternative approach to identify regions in the protein that are important for the binding of small molecules. Therefore we synthesized a small library of photoaffinity probes by conjugating photophores via various linkers to granisetron which is a known antagonist of the 5-HT3R. We were able to obtain several compounds with diverse linker lengths and different photolabile moieties that show nanomolar binding affinities for the orthosteric binding site. Furthermore we established a stable h5-HT3R expressing cell line and a purification protocol to yield the receptor in a high purity. Currently we are investigating the photo crosslinking of these ligands with the 5-HT3R.

Synthesis and testing of photoaffinity probes for the site-selective chemical modifications of the 5-HT3 receptor

The 5-HT3 receptor (5-HT3R) is an important ion channel responsible for the transmission of nerve impulses in the central nervous system.[1] It is difficult to characterize transmembrane dynamic receptors with classical structural biology approaches like crystallization and x-ray. The use of photoaffinity probes is an alternative approach to identify regions in the protein that are important for the binding of small molecules. Therefore we synthesized a small library of photoaffinity probes by conjugating photolabile building blocks via various linkers to granisetron which is a known antagonist of the 5-HT3R. We were able to obtain several compounds with diverse linker lengths and different photo-labile moieties that show nanomolar binding affinities for the orthosteric binding site. Further on we developed a stable 5-HT3R overexpressing cell line and a purification method to yield the receptor in a high purity. Currently we are investigating crosslinking experiments and subsequent MS – analysis.

Synthesis and testing of photoaffinity probes for the site-selectivechemical modifications of the 5-HT3 receptor

The 5-HT3 receptor (5-HT3R) is an important ion channel responsible for the transmission of nerve impulses in the central nervous system.1 It is difficult to characterize transmembrane dynamic receptors with classical structural biology approaches like crystallization and x-ray. The use of photoaffinity probes is an alternative approach to identify regions in the protein that are important for the binding of small molecules. Therefore we synthesized a small library of photoaffinity probes by conjugating photophores via various linkers to granisetron which is a known antagonist of the 5-HT3R. We were able to obtain several compounds with diverse linker lengths and different photolabile moieties that show nanomolar binding affinities for the orthosteric binding site. Furthermore we established a stable h5-HT3R expressing cell line and a purification protocol to yield the receptor in a high purity. Currently we are investigating the photo crosslinking of these ligands with the 5-HT3R.

Synthesis and testing of photoaffinity probes for the site-selective chemical modifications of the 5-HT3 receptor

The 5-HT3 receptor (5-HT3R) is an important ion channel responsible for the transmission of nerve impulses in the central nervous system.1 It is difficult to characterize transmembrane dynamic receptors with classical structural biology approaches like crystallization and x-ray. The use of photoaffinity probes is an alternative approach to identify regions in the protein that are important for the binding of small molecules. Therefore we synthesized a small library of photoaffinity probes by conjugating photophores via various linkers to granisetron which is a known antagonist of the 5-HT3R. We were able to obtain several compounds with diverse linker lengths and different photolabile moieties that show nanomolar binding affinities for the orthosteric binding site. Furthermore we established a stable h5-HT3R expressing cell line and a purification protocol to yield the receptor in a high purity. Currently we are investigating the photo crosslinking of these ligands with the 5-HT3R.

Structural elucidation and antisense properties of a sugar-modified DNA analogue

Antisense oligonucleotides deserve great attention as potential drug candidates for the treatment of genetic disorders. For example, muscle dystrophy can be treated successfully in mice by antisense-induced exon skipping in the pre-mRNA coding for the structural protein dystrophin in muscle cells. For this purpose a sugar- and backbone-modified DNA analogue was designed, in which a tricyclic ring system substitutes the deoxyribose. These chemical modifications stabilize the dimers formed with the targeted RNA relative to native nucleic acid duplexes and increase the biostability of the antisense oligonucleotide. While evading enzymatic degradation constitutes an essential property of antisense oligonucleotides for therapeutic application, it renders the oligonucleotide inaccessible to biochemical sequencing techniques and requires the development of alternative methods based on mass spectrometry. The set of sequences studied includes tcDNA oligonucleotides ranging from 10 to 15 nucleotides in length as well as their hybrid duplexes with DNA and RNA complements. All samples were analyzed on a LTQ Orbitrap XL instrument equipped with a nano-electrospray source. For tandem mass spectrometric experiments collision-induced dissociation was performed, using helium as collision gas. Mass spectrometric sequencing of tcDNA oligomers manifests the applicability of the technique to substrates beyond the scope of enzyme-based methods. Sequencing requires the formation of characteristic backbone fragments, which take the form of a-B- and w-ions in the product ion spectra of tcDNA. These types of product ions are typically associated with unmodified DNA, which suggests a DNA-like fragmentation mechanism in tcDNA. The loss of nucleobases constitutes the second prevalent dissociation pathway observed in tcDNA. Comparison of partially and fully modified oligonucleotides indicates a pronounced impact of the sugar-moiety on the base loss. As this event initiates cleavage of the backbone, the presented results provide new mechanistic insights into the fragmentation of DNA in the gas-phase. The influence of the sugar-moiety on the dissociation extends to tcDNA:DNA and tcDNA:RNA hybrid duplexes, where base loss was found to be much more prominent from sugar-modified oligonucleotides than from their natural complements. Further prominent dissociation channels are strand separation and backbone cleavage of the single strands, as well as the ejection of backbone fragments from the intact duplex. The latter pathway depends noticeably on the base sequence. Moreover, it gives evidence of the high stability of the hybrid dimers, and thus directly reflects the affinity of tcDNA for its target in the cell. As the cellular target of tcDNA is a pre-mRNA, the structure was designed to discriminate RNA from DNA complements, which could be demonstrated by mass spectrometric experiments.

Effects of Strand Geometry on Selected Properties of Long-Stand Structural Composite Lumber Made from Northeastern Hardwoods

Structural composite lumber (SCL) products often possess significantly higher design values than the top grades of solid lumber, making it a popular choice for both residential and commercial applications. The enhanced mechanical properties of SCL are mainly due to defect randomization and densification of the wood fiber, both largely functions of the size, shape and composition (species) of the wood element. Traditionally, SCL manufacturers have used thin, rectangular elements produced from either moderate density softwoods or low density hardwoods. Higher density hardwood species have been avoided, as they require higher pressures to adequately densify and consolidate the wood furnish. These higher pressures can lead to increased manufacturing costs, damage to the wood fiber and/or a product that is too dense, making it heavy and unreceptive to common mechanical fastening techniques. In the northeastern United States high density, diffuse-porous hardwoods (such as maple, beech and birch) are abundant. Use of these species as primary furnish for a SCL product may allow for a competitive advantage in terms of resource cost against products that rely on veneer grade logs. Proximity to this abundant and relatively inexpensive resource may facilitate entry of SCL production facilities in the northeastern United States, where currently none exist. However, modifications to current strand sizes, geometries or production techniques will likely be required to allow for use of these species. A new SCL product concept has been invented allowing for use of these high density hardwoods. The product, referred to as long-strand structural composite lumber (LSSCL), uses strands of significantly larger cross sectional areas and volumes than existing SCL products. In spite of the large strand size, satisfactory consolidation is achieved without excessive densification of the wood fiber through use of a symmetrical strand geometric cross-section. LSSCL density is similar to that of existing SCL products, but is due mainly to the inherent density of the species, rather than through densification. An experiment was designed and conducted producing LSSCL from both large (7/16”) and small (1/4”) strands, of both square and triangular geometric cross sections. Testing results indicate that the large, triangular strands produce LSSCL beams with projected design values of: Modulus of elasticity (MOEapp) – 1,750,000 psi; Allowable bending stress (Fb) – 2750 psi; Allowable shear stress (Fv) – 260 psi. Several modifications are recommended which may lead to improvement of these values, likely allowing for competition against existing SCL products.

Functional, structural and phylogenetic analysis of domains underlying the Al sensitivity of the aluminum-activated malate/anion transporter, TaALMT1.

Triticum aestivum aluminum-activated malate transporter (TaALMT1) is the founding member of a unique gene family of anion transporters (ALMTs) that mediate the efflux of organic acids. A small sub-group of root-localized ALMTs, including TaALMT1, is physiologically associated with in planta aluminum (Al) resistance. TaALMT1 exhibits significant enhancement of transport activity in response to extracellular Al. In this study, we integrated structure–function analyses of structurally altered TaALMT1 proteins expressed in Xenopus oocytes with phylogenic analyses of the ALMT family. Our aim is to re-examine the role of protein domains in terms of their potential involvement in the Al-dependent enhancement (i.e. Al-responsiveness) of TaALMT1 transport activity, as well as the roles of all its 43 negatively charged amino acid residues. Our results indicate that the N-domain, which is predicted to form the conductive pathway, mediates ion transport even in the absence of the C-domain. However, segments in both domains are involved in Al3+ sensing. We identified two regions, one at the N-terminus and a hydrophobic region at the C-terminus, that jointly contribute to the Al-response phenotype. Interestingly, the characteristic motif at the N-terminus appears to be specific for Al-responsive ALMTs. Our study highlights the need to include a comprehensive phylogenetic analysis when drawing inferences from structure–function analyses, as a significant proportion of the functional changes observed for TaALMT1 are most likely the result of alterations in the overall structural integrity of ALMT family proteins rather than modifications of specific sites involved in Al3+ sensing.

Modifications in the Dynamic Properties of a Structure due to Human Actions

The interest for modelling of human actions acting on structures has been recurrent since the first accidents on suspension bridges in the nineteenth century such as Broughton (1831) in the U.K. or Angers (1850) in France. Stadiums, gymnasiums are other types of structure where human induced vibration is very important. In these structures a particular phenomenon appears such as the interaction personstructure (lock-in), the person-person synchronization, and the influence of the mass and damping of the people in the structural behaviour. This paper focuses on the latter topic. In order to evaluate these property modifications several tests have been carried out on a stand-alone building. For the test an electro-dynamic shaker was installed at a fixed point of the gym slab and different groups of people were located around the shaker. The dynamic characteristics of the structure without people inside have been calculated by two methods: using a three-dimensional finite element model of the building and by operational modal analysis. These calculated experimental and numerical values are the reference values used to evaluate the modifications in the dynamic properties of the structure.

Parametric and structural self-adaptation of embedded systems using evolvable hardware

Los sistemas empotrados han sido concebidos tradicionalmente como sistemas de procesamiento específicos que realizan una tarea fija durante toda su vida útil. Para cumplir con requisitos estrictos de coste, tamaño y peso, el equipo de diseño debe optimizar su funcionamiento para condiciones muy específicas. Sin embargo, la demanda de mayor versatilidad, un funcionamiento más inteligente y, en definitiva, una mayor capacidad de procesamiento comenzaron a chocar con estas limitaciones, agravado por la incertidumbre asociada a entornos de operación cada vez más dinámicos donde comenzaban a ser desplegados progresivamente. Esto trajo como resultado una necesidad creciente de que los sistemas pudieran responder por si solos a eventos inesperados en tiempo diseño tales como: cambios en las características de los datos de entrada y el entorno del sistema en general; cambios en la propia plataforma de cómputo, por ejemplo debido a fallos o defectos de fabricación; y cambios en las propias especificaciones funcionales causados por unos objetivos del sistema dinámicos y cambiantes. Como consecuencia, la complejidad del sistema aumenta, pero a cambio se habilita progresivamente una capacidad de adaptación autónoma sin intervención humana a lo largo de la vida útil, permitiendo que tomen sus propias decisiones en tiempo de ejecución. Éstos sistemas se conocen, en general, como sistemas auto-adaptativos y tienen, entre otras características, las de auto-configuración, auto-optimización y auto-reparación. Típicamente, la parte soft de un sistema es mayoritariamente la única utilizada para proporcionar algunas capacidades de adaptación a un sistema. Sin embargo, la proporción rendimiento/potencia en dispositivos software como microprocesadores en muchas ocasiones no es adecuada para sistemas empotrados. En este escenario, el aumento resultante en la complejidad de las aplicaciones está siendo abordado parcialmente mediante un aumento en la complejidad de los dispositivos en forma de multi/many-cores; pero desafortunadamente, esto hace que el consumo de potencia también aumente. Además, la mejora en metodologías de diseño no ha sido acorde como para poder utilizar toda la capacidad de cómputo disponible proporcionada por los núcleos. Por todo ello, no se están satisfaciendo adecuadamente las demandas de cómputo que imponen las nuevas aplicaciones. La solución tradicional para mejorar la proporción rendimiento/potencia ha sido el cambio a unas especificaciones hardware, principalmente usando ASICs. Sin embargo, los costes de un ASIC son altamente prohibitivos excepto en algunos casos de producción en masa y además la naturaleza estática de su estructura complica la solución a las necesidades de adaptación. Los avances en tecnologías de fabricación han hecho que la FPGA, una vez lenta y pequeña, usada como glue logic en sistemas mayores, haya crecido hasta convertirse en un dispositivo de cómputo reconfigurable de gran potencia, con una cantidad enorme de recursos lógicos computacionales y cores hardware empotrados de procesamiento de señal y de propósito general. Sus capacidades de reconfiguración han permitido combinar la flexibilidad propia del software con el rendimiento del procesamiento en hardware, lo que tiene la potencialidad de provocar un cambio de paradigma en arquitectura de computadores, pues el hardware no puede ya ser considerado más como estático. El motivo es que como en el caso de las FPGAs basadas en tecnología SRAM, la reconfiguración parcial dinámica (DPR, Dynamic Partial Reconfiguration) es posible. Esto significa que se puede modificar (reconfigurar) un subconjunto de los recursos computacionales en tiempo de ejecución mientras el resto permanecen activos. Además, este proceso de reconfiguración puede ser ejecutado internamente por el propio dispositivo. El avance tecnológico en dispositivos hardware reconfigurables se encuentra recogido bajo el campo conocido como Computación Reconfigurable (RC, Reconfigurable Computing). Uno de los campos de aplicación más exóticos y menos convencionales que ha posibilitado la computación reconfigurable es el conocido como Hardware Evolutivo (EHW, Evolvable Hardware), en el cual se encuentra enmarcada esta tesis. La idea principal del concepto consiste en convertir hardware que es adaptable a través de reconfiguración en una entidad evolutiva sujeta a las fuerzas de un proceso evolutivo inspirado en el de las especies biológicas naturales, que guía la dirección del cambio. Es una aplicación más del campo de la Computación Evolutiva (EC, Evolutionary Computation), que comprende una serie de algoritmos de optimización global conocidos como Algoritmos Evolutivos (EA, Evolutionary Algorithms), y que son considerados como algoritmos universales de resolución de problemas. En analogía al proceso biológico de la evolución, en el hardware evolutivo el sujeto de la evolución es una población de circuitos que intenta adaptarse a su entorno mediante una adecuación progresiva generación tras generación. Los individuos pasan a ser configuraciones de circuitos en forma de bitstreams caracterizados por descripciones de circuitos reconfigurables. Seleccionando aquellos que se comportan mejor, es decir, que tienen una mejor adecuación (o fitness) después de ser evaluados, y usándolos como padres de la siguiente generación, el algoritmo evolutivo crea una nueva población hija usando operadores genéticos como la mutación y la recombinación. Según se van sucediendo generaciones, se espera que la población en conjunto se aproxime a la solución óptima al problema de encontrar una configuración del circuito adecuada que satisfaga las especificaciones. El estado de la tecnología de reconfiguración después de que la familia de FPGAs XC6200 de Xilinx fuera retirada y reemplazada por las familias Virtex a finales de los 90, supuso un gran obstáculo para el avance en hardware evolutivo; formatos de bitstream cerrados (no conocidos públicamente); dependencia de herramientas del fabricante con soporte limitado de DPR; una velocidad de reconfiguración lenta; y el hecho de que modificaciones aleatorias del bitstream pudieran resultar peligrosas para la integridad del dispositivo, son algunas de estas razones. Sin embargo, una propuesta a principios de los años 2000 permitió mantener la investigación en el campo mientras la tecnología de DPR continuaba madurando, el Circuito Virtual Reconfigurable (VRC, Virtual Reconfigurable Circuit). En esencia, un VRC en una FPGA es una capa virtual que actúa como un circuito reconfigurable de aplicación específica sobre la estructura nativa de la FPGA que reduce la complejidad del proceso reconfiguración y aumenta su velocidad (comparada con la reconfiguración nativa). Es un array de nodos computacionales especificados usando descripciones HDL estándar que define recursos reconfigurables ad-hoc: multiplexores de rutado y un conjunto de elementos de procesamiento configurables, cada uno de los cuales tiene implementadas todas las funciones requeridas, que pueden seleccionarse a través de multiplexores tal y como ocurre en una ALU de un microprocesador. Un registro grande actúa como memoria de configuración, por lo que la reconfiguración del VRC es muy rápida ya que tan sólo implica la escritura de este registro, el cual controla las señales de selección del conjunto de multiplexores. Sin embargo, esta capa virtual provoca: un incremento de área debido a la implementación simultánea de cada función en cada nodo del array más los multiplexores y un aumento del retardo debido a los multiplexores, reduciendo la frecuencia de funcionamiento máxima. La naturaleza del hardware evolutivo, capaz de optimizar su propio comportamiento computacional, le convierten en un buen candidato para avanzar en la investigación sobre sistemas auto-adaptativos. Combinar un sustrato de cómputo auto-reconfigurable capaz de ser modificado dinámicamente en tiempo de ejecución con un algoritmo empotrado que proporcione una dirección de cambio, puede ayudar a satisfacer los requisitos de adaptación autónoma de sistemas empotrados basados en FPGA. La propuesta principal de esta tesis está por tanto dirigida a contribuir a la auto-adaptación del hardware de procesamiento de sistemas empotrados basados en FPGA mediante hardware evolutivo. Esto se ha abordado considerando que el comportamiento computacional de un sistema puede ser modificado cambiando cualquiera de sus dos partes constitutivas: una estructura hard subyacente y un conjunto de parámetros soft. De esta distinción, se derivan dos lineas de trabajo. Por un lado, auto-adaptación paramétrica, y por otro auto-adaptación estructural. El objetivo perseguido en el caso de la auto-adaptación paramétrica es la implementación de técnicas de optimización evolutiva complejas en sistemas empotrados con recursos limitados para la adaptación paramétrica online de circuitos de procesamiento de señal. La aplicación seleccionada como prueba de concepto es la optimización para tipos muy específicos de imágenes de los coeficientes de los filtros de transformadas wavelet discretas (DWT, DiscreteWavelet Transform), orientada a la compresión de imágenes. Por tanto, el objetivo requerido de la evolución es una compresión adaptativa y más eficiente comparada con los procedimientos estándar. El principal reto radica en reducir la necesidad de recursos de supercomputación para el proceso de optimización propuesto en trabajos previos, de modo que se adecúe para la ejecución en sistemas empotrados. En cuanto a la auto-adaptación estructural, el objetivo de la tesis es la implementación de circuitos auto-adaptativos en sistemas evolutivos basados en FPGA mediante un uso eficiente de sus capacidades de reconfiguración nativas. En este caso, la prueba de concepto es la evolución de tareas de procesamiento de imagen tales como el filtrado de tipos desconocidos y cambiantes de ruido y la detección de bordes en la imagen. En general, el objetivo es la evolución en tiempo de ejecución de tareas de procesamiento de imagen desconocidas en tiempo de diseño (dentro de un cierto grado de complejidad). En este caso, el objetivo de la propuesta es la incorporación de DPR en EHW para evolucionar la arquitectura de un array sistólico adaptable mediante reconfiguración cuya capacidad de evolución no había sido estudiada previamente. Para conseguir los dos objetivos mencionados, esta tesis propone originalmente una plataforma evolutiva que integra un motor de adaptación (AE, Adaptation Engine), un motor de reconfiguración (RE, Reconfiguration Engine) y un motor computacional (CE, Computing Engine) adaptable. El el caso de adaptación paramétrica, la plataforma propuesta está caracterizada por: • un CE caracterizado por un núcleo de procesamiento hardware de DWT adaptable mediante registros reconfigurables que contienen los coeficientes de los filtros wavelet • un algoritmo evolutivo como AE que busca filtros wavelet candidatos a través de un proceso de optimización paramétrica desarrollado específicamente para sistemas caracterizados por recursos de procesamiento limitados • un nuevo operador de mutación simplificado para el algoritmo evolutivo utilizado, que junto con un mecanismo de evaluación rápida de filtros wavelet candidatos derivado de la literatura actual, asegura la viabilidad de la búsqueda evolutiva asociada a la adaptación de wavelets. En el caso de adaptación estructural, la plataforma propuesta toma la forma de: • un CE basado en una plantilla de array sistólico reconfigurable de 2 dimensiones compuesto de nodos de procesamiento reconfigurables • un algoritmo evolutivo como AE que busca configuraciones candidatas del array usando un conjunto de funcionalidades de procesamiento para los nodos disponible en una biblioteca accesible en tiempo de ejecución • un RE hardware que explota la capacidad de reconfiguración nativa de las FPGAs haciendo un uso eficiente de los recursos reconfigurables del dispositivo para cambiar el comportamiento del CE en tiempo de ejecución • una biblioteca de elementos de procesamiento reconfigurables caracterizada por bitstreams parciales independientes de la posición, usados como el conjunto de configuraciones disponibles para los nodos de procesamiento del array Las contribuciones principales de esta tesis se pueden resumir en la siguiente lista: • Una plataforma evolutiva basada en FPGA para la auto-adaptación paramétrica y estructural de sistemas empotrados compuesta por un motor computacional (CE), un motor de adaptación (AE) evolutivo y un motor de reconfiguración (RE). Esta plataforma se ha desarrollado y particularizado para los casos de auto-adaptación paramétrica y estructural. • En cuanto a la auto-adaptación paramétrica, las contribuciones principales son: – Un motor computacional adaptable mediante registros que permite la adaptación paramétrica de los coeficientes de una implementación hardware adaptativa de un núcleo de DWT. – Un motor de adaptación basado en un algoritmo evolutivo desarrollado específicamente para optimización numérica, aplicada a los coeficientes de filtros wavelet en sistemas empotrados con recursos limitados. – Un núcleo IP de DWT auto-adaptativo en tiempo de ejecución para sistemas empotrados que permite la optimización online del rendimiento de la transformada para compresión de imágenes en entornos específicos de despliegue, caracterizados por tipos diferentes de señal de entrada. – Un modelo software y una implementación hardware de una herramienta para la construcción evolutiva automática de transformadas wavelet específicas. • Por último, en cuanto a la auto-adaptación estructural, las contribuciones principales son: – Un motor computacional adaptable mediante reconfiguración nativa de FPGAs caracterizado por una plantilla de array sistólico en dos dimensiones de nodos de procesamiento reconfigurables. Es posible mapear diferentes tareas de cómputo en el array usando una biblioteca de elementos sencillos de procesamiento reconfigurables. – Definición de una biblioteca de elementos de procesamiento apropiada para la síntesis autónoma en tiempo de ejecución de diferentes tareas de procesamiento de imagen. – Incorporación eficiente de la reconfiguración parcial dinámica (DPR) en sistemas de hardware evolutivo, superando los principales inconvenientes de propuestas previas como los circuitos reconfigurables virtuales (VRCs). En este trabajo también se comparan originalmente los detalles de implementación de ambas propuestas. – Una plataforma tolerante a fallos, auto-curativa, que permite la recuperación funcional online en entornos peligrosos. La plataforma ha sido caracterizada desde una perspectiva de tolerancia a fallos: se proponen modelos de fallo a nivel de CLB y de elemento de procesamiento, y usando el motor de reconfiguración, se hace un análisis sistemático de fallos para un fallo en cada elemento de procesamiento y para dos fallos acumulados. – Una plataforma con calidad de filtrado dinámica que permite la adaptación online a tipos de ruido diferentes y diferentes comportamientos computacionales teniendo en cuenta los recursos de procesamiento disponibles. Por un lado, se evolucionan filtros con comportamientos no destructivos, que permiten esquemas de filtrado en cascada escalables; y por otro, también se evolucionan filtros escalables teniendo en cuenta requisitos computacionales de filtrado cambiantes dinámicamente. Este documento está organizado en cuatro partes y nueve capítulos. La primera parte contiene el capítulo 1, una introducción y motivación sobre este trabajo de tesis. A continuación, el marco de referencia en el que se enmarca esta tesis se analiza en la segunda parte: el capítulo 2 contiene una introducción a los conceptos de auto-adaptación y computación autonómica (autonomic computing) como un campo de investigación más general que el muy específico de este trabajo; el capítulo 3 introduce la computación evolutiva como la técnica para dirigir la adaptación; el capítulo 4 analiza las plataformas de computación reconfigurables como la tecnología para albergar hardware auto-adaptativo; y finalmente, el capítulo 5 define, clasifica y hace un sondeo del campo del hardware evolutivo. Seguidamente, la tercera parte de este trabajo contiene la propuesta, desarrollo y resultados obtenidos: mientras que el capítulo 6 contiene una declaración de los objetivos de la tesis y la descripción de la propuesta en su conjunto, los capítulos 7 y 8 abordan la auto-adaptación paramétrica y estructural, respectivamente. Finalmente, el capítulo 9 de la parte 4 concluye el trabajo y describe caminos de investigación futuros. ABSTRACT Embedded systems have traditionally been conceived to be specific-purpose computers with one, fixed computational task for their whole lifetime. Stringent requirements in terms of cost, size and weight forced designers to highly optimise their operation for very specific conditions. However, demands for versatility, more intelligent behaviour and, in summary, an increased computing capability began to clash with these limitations, intensified by the uncertainty associated to the more dynamic operating environments where they were progressively being deployed. This brought as a result an increasing need for systems to respond by themselves to unexpected events at design time, such as: changes in input data characteristics and system environment in general; changes in the computing platform itself, e.g., due to faults and fabrication defects; and changes in functional specifications caused by dynamically changing system objectives. As a consequence, systems complexity is increasing, but in turn, autonomous lifetime adaptation without human intervention is being progressively enabled, allowing them to take their own decisions at run-time. This type of systems is known, in general, as selfadaptive, and are able, among others, of self-configuration, self-optimisation and self-repair. Traditionally, the soft part of a system has mostly been so far the only place to provide systems with some degree of adaptation capabilities. However, the performance to power ratios of software driven devices like microprocessors are not adequate for embedded systems in many situations. In this scenario, the resulting rise in applications complexity is being partly addressed by rising devices complexity in the form of multi and many core devices; but sadly, this keeps on increasing power consumption. Besides, design methodologies have not been improved accordingly to completely leverage the available computational power from all these cores. Altogether, these factors make that the computing demands new applications pose are not being wholly satisfied. The traditional solution to improve performance to power ratios has been the switch to hardware driven specifications, mainly using ASICs. However, their costs are highly prohibitive except for some mass production cases and besidesthe static nature of its structure complicates the solution to the adaptation needs. The advancements in fabrication technologies have made that the once slow, small FPGA used as glue logic in bigger systems, had grown to be a very powerful, reconfigurable computing device with a vast amount of computational logic resources and embedded, hardened signal and general purpose processing cores. Its reconfiguration capabilities have enabled software-like flexibility to be combined with hardware-like computing performance, which has the potential to cause a paradigm shift in computer architecture since hardware cannot be considered as static anymore. This is so, since, as is the case with SRAMbased FPGAs, Dynamic Partial Reconfiguration (DPR) is possible. This means that subsets of the FPGA computational resources can now be changed (reconfigured) at run-time while the rest remains active. Besides, this reconfiguration process can be triggered internally by the device itself. This technological boost in reconfigurable hardware devices is actually covered under the field known as Reconfigurable Computing. One of the most exotic fields of application that Reconfigurable Computing has enabled is the known as Evolvable Hardware (EHW), in which this dissertation is framed. The main idea behind the concept is turning hardware that is adaptable through reconfiguration into an evolvable entity subject to the forces of an evolutionary process, inspired by that of natural, biological species, that guides the direction of change. It is yet another application of the field of Evolutionary Computation (EC), which comprises a set of global optimisation algorithms known as Evolutionary Algorithms (EAs), considered as universal problem solvers. In analogy to the biological process of evolution, in EHW the subject of evolution is a population of circuits that tries to get adapted to its surrounding environment by progressively getting better fitted to it generation after generation. Individuals become circuit configurations representing bitstreams that feature reconfigurable circuit descriptions. By selecting those that behave better, i.e., with a higher fitness value after being evaluated, and using them as parents of the following generation, the EA creates a new offspring population by using so called genetic operators like mutation and recombination. As generations succeed one another, the whole population is expected to approach to the optimum solution to the problem of finding an adequate circuit configuration that fulfils system objectives. The state of reconfiguration technology after Xilinx XC6200 FPGA family was discontinued and replaced by Virtex families in the late 90s, was a major obstacle for advancements in EHW; closed (non publicly known) bitstream formats; dependence on manufacturer tools with highly limiting support of DPR; slow speed of reconfiguration; and random bitstream modifications being potentially hazardous for device integrity, are some of these reasons. However, a proposal in the first 2000s allowed to keep investigating in this field while DPR technology kept maturing, the Virtual Reconfigurable Circuit (VRC). In essence, a VRC in an FPGA is a virtual layer acting as an application specific reconfigurable circuit on top of an FPGA fabric that reduces the complexity of the reconfiguration process and increases its speed (compared to native reconfiguration). It is an array of computational nodes specified using standard HDL descriptions that define ad-hoc reconfigurable resources; routing multiplexers and a set of configurable processing elements, each one containing all the required functions, which are selectable through functionality multiplexers as in microprocessor ALUs. A large register acts as configuration memory, so VRC reconfiguration is very fast given it only involves writing this register, which drives the selection signals of the set of multiplexers. However, large overheads are introduced by this virtual layer; an area overhead due to the simultaneous implementation of every function in every node of the array plus the multiplexers, and a delay overhead due to the multiplexers, which also reduces maximum frequency of operation. The very nature of Evolvable Hardware, able to optimise its own computational behaviour, makes it a good candidate to advance research in self-adaptive systems. Combining a selfreconfigurable computing substrate able to be dynamically changed at run-time with an embedded algorithm that provides a direction for change, can help fulfilling requirements for autonomous lifetime adaptation of FPGA-based embedded systems. The main proposal of this thesis is hence directed to contribute to autonomous self-adaptation of the underlying computational hardware of FPGA-based embedded systems by means of Evolvable Hardware. This is tackled by considering that the computational behaviour of a system can be modified by changing any of its two constituent parts: an underlying hard structure and a set of soft parameters. Two main lines of work derive from this distinction. On one side, parametric self-adaptation and, on the other side, structural self-adaptation. The goal pursued in the case of parametric self-adaptation is the implementation of complex evolutionary optimisation techniques in resource constrained embedded systems for online parameter adaptation of signal processing circuits. The application selected as proof of concept is the optimisation of Discrete Wavelet Transforms (DWT) filters coefficients for very specific types of images, oriented to image compression. Hence, adaptive and improved compression efficiency, as compared to standard techniques, is the required goal of evolution. The main quest lies in reducing the supercomputing resources reported in previous works for the optimisation process in order to make it suitable for embedded systems. Regarding structural self-adaptation, the thesis goal is the implementation of self-adaptive circuits in FPGA-based evolvable systems through an efficient use of native reconfiguration capabilities. In this case, evolution of image processing tasks such as filtering of unknown and changing types of noise and edge detection are the selected proofs of concept. In general, evolving unknown image processing behaviours (within a certain complexity range) at design time is the required goal. In this case, the mission of the proposal is the incorporation of DPR in EHW to evolve a systolic array architecture adaptable through reconfiguration whose evolvability had not been previously checked. In order to achieve the two stated goals, this thesis originally proposes an evolvable platform that integrates an Adaptation Engine (AE), a Reconfiguration Engine (RE) and an adaptable Computing Engine (CE). In the case of parametric adaptation, the proposed platform is characterised by: • a CE featuring a DWT hardware processing core adaptable through reconfigurable registers that holds wavelet filters coefficients • an evolutionary algorithm as AE that searches for candidate wavelet filters through a parametric optimisation process specifically developed for systems featured by scarce computing resources • a new, simplified mutation operator for the selected EA, that together with a fast evaluation mechanism of candidate wavelet filters derived from existing literature, assures the feasibility of the evolutionary search involved in wavelets adaptation In the case of structural adaptation, the platform proposal takes the form of: • a CE based on a reconfigurable 2D systolic array template composed of reconfigurable processing nodes • an evolutionary algorithm as AE that searches for candidate configurations of the array using a set of computational functionalities for the nodes available in a run time accessible library • a hardware RE that exploits native DPR capabilities of FPGAs and makes an efficient use of the available reconfigurable resources of the device to change the behaviour of the CE at run time • a library of reconfigurable processing elements featured by position-independent partial bitstreams used as the set of available configurations for the processing nodes of the array Main contributions of this thesis can be summarised in the following list. • An FPGA-based evolvable platform for parametric and structural self-adaptation of embedded systems composed of a Computing Engine, an evolutionary Adaptation Engine and a Reconfiguration Engine. This platform is further developed and tailored for both parametric and structural self-adaptation. • Regarding parametric self-adaptation, main contributions are: – A CE adaptable through reconfigurable registers that enables parametric adaptation of the coefficients of an adaptive hardware implementation of a DWT core. – An AE based on an Evolutionary Algorithm specifically developed for numerical optimisation applied to wavelet filter coefficients in resource constrained embedded systems. – A run-time self-adaptive DWT IP core for embedded systems that allows for online optimisation of transform performance for image compression for specific deployment environments characterised by different types of input signals. – A software model and hardware implementation of a tool for the automatic, evolutionary construction of custom wavelet transforms. • Lastly, regarding structural self-adaptation, main contributions are: – A CE adaptable through native FPGA fabric reconfiguration featured by a two dimensional systolic array template of reconfigurable processing nodes. Different processing behaviours can be automatically mapped in the array by using a library of simple reconfigurable processing elements. – Definition of a library of such processing elements suited for autonomous runtime synthesis of different image processing tasks. – Efficient incorporation of DPR in EHW systems, overcoming main drawbacks from the previous approach of virtual reconfigurable circuits. Implementation details for both approaches are also originally compared in this work. – A fault tolerant, self-healing platform that enables online functional recovery in hazardous environments. The platform has been characterised from a fault tolerance perspective: fault models at FPGA CLB level and processing elements level are proposed, and using the RE, a systematic fault analysis for one fault in every processing element and for two accumulated faults is done. – A dynamic filtering quality platform that permits on-line adaptation to different types of noise and different computing behaviours considering the available computing resources. On one side, non-destructive filters are evolved, enabling scalable cascaded filtering schemes; and on the other, size-scalable filters are also evolved considering dynamically changing computational filtering requirements. This dissertation is organized in four parts and nine chapters. First part contains chapter 1, the introduction to and motivation of this PhD work. Following, the reference framework in which this dissertation is framed is analysed in the second part: chapter 2 features an introduction to the notions of self-adaptation and autonomic computing as a more general research field to the very specific one of this work; chapter 3 introduces evolutionary computation as the technique to drive adaptation; chapter 4 analyses platforms for reconfigurable computing as the technology to hold self-adaptive hardware; and finally chapter 5 defines, classifies and surveys the field of Evolvable Hardware. Third part of the work follows, which contains the proposal, development and results obtained: while chapter 6 contains an statement of the thesis goals and the description of the proposal as a whole, chapters 7 and 8 address parametric and structural self-adaptation, respectively. Finally, chapter 9 in part 4 concludes the work and describes future research paths.

Structural origins of the exonuclease resistance of a zwitterionic RNA

Nuclease resistance and RNA affinity are key criteria in the search for optimal antisense nucleic acid modifications, but the origins of the various levels of resistance to nuclease degradation conferred by chemical modification of DNA and RNA are currently not understood. The 2′-O-aminopropyl (AP)-RNA modification displays the highest nuclease resistance among all phosphodiester-based analogues and its RNA binding affinity surpasses that of phosphorothioate DNA by 1°C per modified residue. We found that oligodeoxynucleotides containing AP-RNA residues at their 3′ ends competitively inhibit the degradation of single-stranded DNA by the Escherichia coli Klenow fragment (KF) 3′-5′ exonuclease and snake venom phosphodiesterase. To shed light on the origins of nuclease resistance brought about by the AP modification, we determined the crystal structure of an A-form DNA duplex with AP-RNA modifications at 1.6-Å resolution. In addition, the crystal structures of complexes between short DNA fragments carrying AP-RNA modifications and wild-type KF were determined at resolutions between 2.2 and 3.0 Å and compared with the structure of the complex between oligo(dT) and the D355A/E357A KF mutant. The structural models suggest that interference of the positively charged 2′-O-substituent with the metal ion binding site B of the exonuclease allows AP-RNA to effectively slow down degradation.

Efficient construction of long DNA duplexes with internal non-Watson–Crick motifs and modifications

We have developed a semi-synthetic approach for preparing long stretches of DNA (>100 bp) containing internal chemical modifications and/or non-Watson–Crick structural motifs which relies on splint-free, cell-free DNA ligations and recycling of side-products by non-PCR thermal cycling. A double-stranded DNA PCR fragment containing a polylinker in its middle is digested with two restriction enzymes and a small insert (∼20 bp) containing the modification or non-Watson–Crick motif of interest is introduced into the middle. Incorrect products are recycled to starting materials by digestion with appropriate restriction enzymes, while the correct product is resistant to digestion since it does not contain these restriction sites. This semi-synthetic approach offers several advantages over DNA splint-mediated ligations, including fewer steps, substantially higher yields (∼60% overall yield) and ease of use. This method has numerous potential applications, including the introduction of modifications such as fluorophores and cross-linking agents into DNA, controlling the shape of DNA on a large scale and the study of non-sequence-specific nucleic acid–protein interactions.

The RESID Database of protein structure modifications and the NRL-3D Sequence–Structure Database

The RESID Database is a comprehensive collection of annotations and structures for protein post-translational modifications including N-terminal, C-terminal and peptide chain cross-link modifications. The RESID Database includes systematic and frequently observed alternate names, Chemical Abstracts Service registry numbers, atomic formulas and weights, enzyme activities, taxonomic range, keywords, literature citations with database cross-references, structural diagrams and molecular models. The NRL-3D Sequence–Structure Database is derived from the three-dimensional structure of proteins deposited with the Research Collaboratory for Structural Bioinformatics Protein Data Bank. The NRL-3D Database includes standardized and frequently observed alternate names, sources, keywords, literature citations, experimental conditions and searchable sequences from model coordinates. These databases are freely accessible through the National Cancer Institute–Frederick Advanced Biomedical Computing Center at these web sites: http://www.ncifcrf.gov/RESID, http://www.ncifcrf.gov/ NRL-3D; or at these National Biomedical Research Foundation Protein Information Resource web sites: http://pir.georgetown.edu/pirwww/dbinfo/resid.html, http://pir.georgetown.edu/pirwww/dbinfo/nrl3d.html

Swapping structural determinants of ribonucleases: an energetic analysis of the hinge peptide 16-22.

Bovine seminal ribonuclease (BS-RNase) is a homodimeric enzyme strictly homologous to the pancreatic ribonuclease (RNase A). Native BS-RNase is an equilibrium mixture of two distinct dimers differing in the interchange of the N-terminal segments and in their biological properties. The loop 16-22 plays a fundamental role on the relative stability of the two isomers. Both the primary and tertiary structures of the RNase A differ substantially from those of the seminal ribonuclease in the loop region 16-22. To analyze the possible stable conformations of this loop in both enzymes, structure predictions have been attempted, according to a procedure described by Palmer and Scheraga [Palmer, K. A. & Scheraga, H. A. (1992) J. Comput. Chem. 13, 329-350]. Results compare well with experimental x-ray structures and clarify the structural determinants that are responsible for the swapping of the N-terminal domains and for the peculiar properties of BS-RNase. Minimal modifications of RNase A sequence needed to form a stable swapped dimer are also predicted.