924 resultados para power factor correction
Resumo:
This study presents a description of the development model of a representation of simplified grid applied in hybrid load flow for calculation of the voltage variations in a steady-state caused by the wind farm on power system. Also, it proposes an optimal load-flow able to control power factor on connection bar and to minimize the loss. The analysis process on system, led by the wind producer, it has as base given technician supplied by the grid. So, the propose model to the simplification of the grid that allows the necessity of some knowledge only about the data referring the internal network, that is, the part of the network that interests in the analysis. In this way, it is intended to supply forms for the auxiliary in the systematization of the relations between the sector agents. The model for simplified network proposed identifies the internal network, external network and the buses of boulders from a study of vulnerability of the network, attributing them floating liquid powers attributing slack models. It was opted to apply the presented model in Newton-Raphson and a hybrid load flow, composed by The Gauss-Seidel method Zbarra and Summation Power. Finally, presents the results obtained to a developed computational environment of SCILAB and FORTRAN, with their respective analysis and conclusion, comparing them with the ANAREDE
Resumo:
The Methods for compensation of harmonic currents and voltages have been widely used since these methods allow to reduce to acceptable levels the harmonic distortion in the voltages or currents in a power system, and also compensate reactive. The reduction of harmonics and reactive contributes to the reduction of losses in transmission lines and electrical machinery, increasing the power factor, reduce the occurrence of overvoltage and overcurrent. The active power filter is the most efficient method for compensation of harmonic currents and voltages. The active power filter is necessary to use current and voltage controllers loop. Conventionally, the current and voltage control loop of active filter has been done by proportional controllers integrative. This work, investigated the use of a robust adaptive control technique on the shunt active power filter current and voltage control loop to increase robustness and improve the performance of active filter to compensate for harmonics. The proposed control scheme is based on a combination of techniques for adaptive control pole placement and variable structure. The advantages of the proposed method over conventional ones are: lower total harmonic distortion, more flexibility, adaptability and robustness to the system. Moreover, the proposed control scheme improves the performance and improves the transient of active filter. The validation of the proposed technique was verified initially by a simulation program implemented in C++ language and then experimental results were obtained using a prototype three-phase active filter of 1 kVA
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The scarcity of natural resources and the search for alternative energy sources promote a rapid change in the energy world. Among the renewable energy sources, solar energy is the most promising, presenting technology of greatest growth rate nowadays. Researchers around the world are seeking ways to facilitate their progress, developing technologies with higher efficiency and lower cost. As a contribution to global progress, this master thesis proposes the development of a strategy of maximum power tracking based on perturbation and observation method for photovoltaic systems. The proposed control strategy is based on active power balance of the system, with a reduced number of sensors. It also allows the PV system to act as a regulator of the power quality at the point of commom coupling (PCC), compensating the harmonic distortion and power factor of the current netw
Resumo:
This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.
Resumo:
This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.
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A novel single-phase voltage source rectifier capable to achieve High-Power-Factor (HPF) for variable speed refrigeration system application, is proposed in this paper. The proposed system is composed by a single-phase high-power-factor boost rectifier, with two cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by a Field Programmable Gate Array (FPGA), associated with a conventional three-phase IGBT bridge inverter (VSI - Voltage Source Inverter), controlled by a Digital Signal Processor (DSP). The soft-switching technique for the input stage is based on zero-current-switching (ZCS) cells. The rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the EEC61000-3-2 standards. The digital controller for the output stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at a refrigerator prototype.
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Bending fatigue tests were carried out to clarify the effects of heat treatment parameters: temperature and time after cadmium electroplating on a high strength steel, to avoid hydrogen embrittlement. Temperatures heat of 190 degrees C, 230 degrees C, 250 degrees C and 300 degrees C at 3, 8 and 24 hours together with the base material electroplated, with and without heat treatment, resulted in 14 conditions studied with respect to fatigue behaviour. Statistical data analysis was performed to identify the best combination temperature/time regarding fatigue strength of the ABNT 4340 steel and the results obtained revealed that the fatigue strength depend on temperature/time conditions.
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This work proposes a methodology to generalize the A-connections for 12 and 18-pulse autotransformers. A single mathematical expression, obtained through simple trigonometric operations, represents all the connections. The proposed methodology allows choosing any ratio between the input and the output voltages. The converters can operate either as step-up or as step-down voltage. To simplify the design of the windings, graphics are generated to calculate the turn-ratio and the polarity of each secondary winding, with respect to the primary winding. A design example, followed by digital simulations, and experimental results illustrate the presented steps. The results also show that high power factor is an inherent characteristic of multi-pulse converters, without any active or passive power factor pre-regulators needs.
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An electronic ballast for multiple tubular fluorescent lamp systems is presented. The proposed structure has a high value for the power factor, a dimming capability, and soft switching of the semiconductor devices operated at high frequencies. A zero-current switching pulse width modulated SEPIC converter is used as the rectifying stage and it is controlled using the instantaneous average input current technique. The inverting stage consists of classical resonant half-bridge converter with series-resonant parallel-loaded filters. The dimming control technique is based on varying the switching frequency and monitoring the phase shift of the current drained by the filters and lamps in order to establish a closed loop control. Experimental results are presented that validate the theoretical analysis.
Resumo:
This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by Field Programmable Gate Array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-vohage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a preregulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.
Resumo:
In this paper were investigated phase-shift control strategies applied to a four cells interleaved high input-power-factor pre-regulator boost rectifier, operating in critical conduction mode, using a non-dissipative commutation cells and frequency modulation. The digital control has been developed using a hardware description language (VHDL) and implemented using the XC2S200E-SpartanII-E/Xilinx FPGA, performing a true critical conduction operation mode for a generic number of interleaved cells. Experimental results are presented, in order to verify the feasibility and performance of the proposed digital control, through the use of a Xilinx FPGA device.
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A comparative evaluation regarding a new zero-current-switching (ZCS) pulse width modulated (PWM) Sepic rectifier, operating in voltage step-down mode, employing two different techniques, in order to obtain high power factor and reduced total harmonic distortion (THD) at the input current, is presented. The methods are those in continuous-current mode operation, known as peak current mode control with slope compensation, and average-current mode control. The principle of operation, the theoretical analysis, a design example and the main experimental results are presented for both proposed control techniques.
Resumo:
This paper presents a high efficiency Sepic rectifier for an electronic ballast application with multiple fluorescent lamps. The proposed Sepic rectifier is based on a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The high power-factor of this structure is obtained using the instantaneous average-current control technique, in order to attend properly IEC61000-3-2 standards. The inverting stage of this new electronic ballast is a classical Zero-Voltage-Switching (ZVS) Half-Bridge inverter. A proper design methodology is developed for this new electronic ballast, and a design example is presented for an application with five fluorescent lamps 40W-T12 (200W output power), 220Vrms input voltage, 130Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Experimental results are also presented. The THD at input current is equal to 6.41%, for an input voltage THD equal to 2.14%, and the measured overall efficiency is about 92.8%, at rated load.
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This paper presents possible selective current compensation strategies based on the Conservative Power Theory (CPT). This recently proposed theory, introduces the concept of complex power conservation under non-sinusoidal conditions. Moreover, the related current decompositions results in several current terms, which are associated with a specific physical phenomena (power absorption P, energy storage Q, voltage and current distortion D). Such current components are used in this work for the definition of different current compensators, which can be selective in terms of minimizing particular disturbing effects. The choice of one or other current component for compensation directly affects the sizing and cost of active and/or passive devices and it will be demonstrated that it can be done to attend predefined limits for harmonic distortion, unbalances and/or power factor. Single and three-phase compensation strategies will be discussed by means of the CPT Framework. Simulation and experimental results will be demonstrated in order to validate their performance. © 2009 IEEE.
Resumo:
The objective of this paper is to show a methodology to estimate the longitudinal parameters of transmission lines. The method is based on the modal analysis theory and developed from the currents and voltages measured at the sending and receiving ends of the line. Another proposal is to estimate the line impedance in function of the real-time load apparent power and power factor. The procedure is applied for a non-transposed 440 kV three-phase line. © 2011 IEEE.