A 75-81 GHz, 14.3 dBm Peak Output Power, 21 dB Peak Gain, SiGe Power-Combining Amplifier Operating from a Single 3.3 V Supply

A compact differential 4-way power combiner with 2.3 dB loss and high common-mode rejection characteristic for use in mm-wave PAs is presented. A complete circuit comprised of a power splitter, two-stage cascode PA array, and a power combiner was implemented in SiGe technology. Measured small-signal gain of at least 17 dB was obtained from 74.5 GHz to 80.5 GHz with a peak 21 dB at 79 GHz. The prototype delivered 13.2 dBm P1dB and 14.3 dBm Psat when operated from a single 3.3 V supply at 75 GHz.

Integrated Low-Loss Passive SiGe Power Splitter and Combiner Operating Across 78-86 GHz Band

This paper describes the design, implementation, and characterization of a new type of passive power splitting and combining structure for use in a differential four-way power-combining amplifier operating at E-band. In order to achieve lowest insertion loss, input and output coils inductances are resonated with shunt capacitances. Simple C-L-C and L-C networks are proposed in order to compensate inductive loading due to routing line that would otherwise introduce mismatch and increase loss. Across 78-86 GHz band, measured insertion loss is about 7 dB. Measured return losses are >10 dB from 73 GHz to 94 GHz at the input port and >9 dB from 60 GHz to 94 GHz at the output port. When integrated with driver and power amplifier cells, the simulated complete circuit exhibits 18.2 dB gain and 20.3 dBm saturated output power.

Holistic design of 8-way combining transformers in SiGe technology for use in millimetre-wave power amplifiers

This paper presents the design of a novel 8-way power-combining transformer for use in mm-wave power amplifier (PA). The combiner exhibits a record low insertion loss of 1.25 dB at 83.5 GHz. A complete circuit comprised of a power splitter, two-stage cascode PA array, a power combiner and input/output matching elements was designed and realized in SiGe technology. Measured gain of at least 16.8 dB was obtained from 76.4 GHz to 85.3 GHz with a peak 19.5 dB at 83 GHz. The prototype delivered 12.5 dBm OP and 14 dBm saturated output power when operated from a 3.2 V DC supply voltage at 78 GHz. © 2013 IEEE.

Massive MIMO with Non-Ideal Arbitrary Arrays: Hardware Scaling Laws and Circuit-Aware Design

Massive multiple-input multiple-output (MIMO) systems are cellular networks where the base stations (BSs) are equipped with unconventionally many antennas, deployed on colocated or distributed arrays. Huge spatial degrees-of-freedom are achieved by coherent processing over these massive arrays, which provide strong signal gains, resilience to imperfect channel knowledge, and low interference. This comes at the price of more infrastructure; the hardware cost and circuit power consumption scale linearly/affinely with the number of BS antennas N. Hence, the key to cost-efficient deployment of large arrays is low-cost antenna branches with low circuit power, in contrast to today’s conventional expensive and power-hungry BS antenna branches. Such low-cost transceivers are prone to hardware imperfections, but it has been conjectured that the huge degrees-of-freedom would bring robustness to such imperfections. We prove this claim for a generalized uplink system with multiplicative phasedrifts, additive distortion noise, and noise amplification. Specifically, we derive closed-form expressions for the user rates and a scaling law that shows how fast the hardware imperfections can increase with N while maintaining high rates. The connection between this scaling law and the power consumption of different transceiver circuits is rigorously exemplified. This reveals that one can make the circuit power increase as p N, instead of linearly, by careful circuit-aware system design.

Multi-Level Wordline Driver for Low Power SRAMs in Nano-Scale CMOS Technology

In this paper, a multi-level wordline driver scheme is presented to improve SRAM read and write stability while lowering power consumption during hold operation. The proposed circuit applies a shaped wordline voltage pulse during read mode and a boosted wordline pulse during write mode. During read, the applied shaped pulse is tuned at nominal voltage for short period of time, whereas for the remaining access time, the wordline voltage is reduced to a lower level. This pulse results in improved read noise margin without any degradation in access time which is explained by examining the dynamic and nonlinear behavior of the SRAM cell. Furthermore, during hold mode, the wordline voltage starts from a negative value and reaches zero voltage, resulting in a lower leakage current compared to conventional SRAM. Our simulations using TSMC 65nm process show that the proposed wordline driver results in 2X improvement in static read noise margin while the write margin is improved by 3X. In addition, the total leakage of the proposed SRAM is reduced by 10% while the total power is improved by 12% in the worst case scenario of a single SRAM cell. The total area penalty is 10% for a 128Kb standard SRAM array.

High-Efficiency Harmonic-Peaking Class-EF Power Amplifiers with Enhanced Maximum Operating Frequency

The recently introduced Class-EF power amplifier (PA) has a peak switch voltage lower than that of the Class-E PA. However, the value of the transistor output capacitance at high frequencies is typically larger than the required Class-EF optimum shunt capacitance. Consequently, soft-switching operation that minimizes power dissipation during off-to-on transition cannot be achieved at high frequencies. Two new Class-EF PA variants with transmission-line load networks, namely, third-harmonic-peaking (THP) and fifth-harmonic-peaking (FHP) Class-EF PAs are proposed in this paper. These permit operation at higher frequencies at no expense to other PA figures of merit. Analytical expressions are derived in order to obtain circuit component values, which satisfy the required Class-EF impedances at fundamental frequency, all even harmonics, and the first few odd harmonics as well as simultaneously providing impedance matching to a 50- Ω load. Furthermore, a novel open-circuit and shorted stub arrangement, which has substantial practical benefits, is proposed to replace the normal quarter-wave line connected at the transistor's drain. Using GaN HEMTs, two PA prototypes were built. Measured peak drain efficiency of 91% and output power of 39.5 dBm were obtained at 2.22 GHz for the THP Class-EF PA. The FHP Class-EF PA delivered output power of 41.9 dBm with 85% drain efficiency at 1.52 GHz.

Real-time temperature estimation for power MOSFETs considering thermal aging effects

This paper presents a novel real-time power-device temperature estimation method that monitors the power MOSFET's junction temperature shift arising from thermal aging effects and incorporates the updated electrothermal models of power modules into digital controllers. Currently, the real-time estimator is emerging as an important tool for active control of device junction temperature as well as online health monitoring for power electronic systems, but its thermal model fails to address the device's ongoing degradation. Because of a mismatch of coefficients of thermal expansion between layers of power devices, repetitive thermal cycling will cause cracks, voids, and even delamination within the device components, particularly in the solder and thermal grease layers. Consequently, the thermal resistance of power devices will increase, making it possible to use thermal resistance (and junction temperature) as key indicators for condition monitoring and control purposes. In this paper, the predicted device temperature via threshold voltage measurements is compared with the real-time estimated ones, and the difference is attributed to the aging of the device. The thermal models in digital controllers are frequently updated to correct the shift caused by thermal aging effects. Experimental results on three power MOSFETs confirm that the proposed methodologies are effective to incorporate the thermal aging effects in the power-device temperature estimator with good accuracy. The developed adaptive technologies can be applied to other power devices such as IGBTs and SiC MOSFETs, and have significant economic implications. 

Towards generalized Doherty power amplifier design for multiband operation

This paper presents a new variant of broadband Doherty power amplifier that employs a novel output combiner. A new parameter ∝ is introduced to permit a generalized analysis of the recently reported Parallel Doherty power amplifier (PDPA),and hence offer design flexibility. The circuit prototype of the new DPA fabricated using GaN devices exhibits maximum drain efficiency of 85% at 43-dBm peak power and 63% at 6-dB backoff power (BOP). Measured drain efficiency of >60% at peak power across 500-MHz frequency range and >50% at 6-dB BOP across 480-MHz frequency range were achieved, confirming the  theoretical wideband characteristics of the new DPA.

Electromagnetic transients analysis of lightning overvoltages on wind power plants

As wind power generation undergoes rapid growth, lightning and overvoltage incidents involving wind power plants have come to be regarded as a serious problem. Firstly, lightning location systems are discussed, as well as important parameters regarding lightning protection. Also, this paper presents a case study, based on a wind turbine with an interconnecting transformer, for the study of adequate lightning and overvoltage protection measures. The electromagnetic transients circuit under study is described, and computational results are presented.

A simple regulated power supply for characteristics studies of klystron oscillators

A simple and inexpensive power supply suitable for characteristics studies of a klystron is described. The circuit is a modified form of the high voltage adjustable power supply based on LM 317. This provides the necessary cavity and repeller voltages over a wide range, with good regulation. The system is protected aa- ainst short circuits and is ideallv suitable for laboratorv, ex.Deri ments with reflex klystrons.

Bahrain's Formula-1 racing circuit: energy and environmental considerations

The Bahrain International Circuit (BIC) and complex, at latitude 26.00N and longitude 51.54E, was built in 483 days and cost 150 million US$. The circuit consists of six different individual tracks with a 3.66 km outer track (involving 10 turns) and a 2.55 km inner track (having six turns). The complex has been designed to host a variety of other sporting activities. Fifty thousand spectators, including 10,500 in the main grandstand, can be accommodated simultaneously. State-of-the art on-site media and broadcast facilities are available. The noise level emitted from vehicles on the circuit during the Formula-1 event, on April 4th 2004, was acceptable and caused no physical disturbance to the fans in the VIP lounges or to scholars studying at the University of Bahrain's Shakeir Campus, which is only 1.5 km away from the circuit. The sound-intensity level (SIL) recorded on the balcony of the VIP lounge was 128 dB(A) and was 80 dB(A) inside the lounge. The calculated SIL immediately outside the lecture halls of the University of Bahrain was 70 dB(A) and 65 dB(A) within them. Thus racing at BIC can proceed without significantly disturbing the academic-learning process. The purchased electricity demand by the BIC complex peaked (at 4.5 MW) during the first Formula-1 event on April 4th 2004. The reverse-osmosis (RO) plant at the BIC provides 1000 m(3) of desalinated water per day for landscape irrigation. Renewable-energy inputs, (i.e., via solar and wind power), at the BIC could be harnessed to generate electricity for water desalination, air conditioning, lighting as well as for irrigation. If the covering of the BIC complex was covered by adhesively fixed modern photovoltaic cells, then similar to 1.2 MW of solar electricity could be generated. If two horizontal-axis, at 150 m height above the ground, three 75m bladed, wind turbines were to be installed at the BIC, then the output could reach 4 MW. Furthermore, if 10,000 Jojoba trees (a species renowned for having a low demand for water, needing only five irrigations per year in Bahrain and which remain green throughout the year) are planted near the circuit, then the local micro-climate would be improved with respect to human comfort as well as the local environment becoming cleaner.

Power performance with gated clocks of a pipelined Cordic Core

This paper presents the evaluation in power consumption of gated clocks pipelined circuits with different register configurations in Virtex-based FPGA devices. Power impact of a gated clock circuitry aimed at reducing flip-flops output rate at the bit level is studied. Power performance is also given for pipeline stages based on the implementation of a double edge-triggered flip-flop. Using a pipelined Cordic Core circuit as an example, this study did not find evidence in power benefits either when gated clock at the bit-level or double-edge triggered flip-flops used when synthesized with FPGA logic resources.

A clocking technique with power savings in virtex-based pipelined designs

This paper presents the evaluation in power consumption of a clocking technique for pipelined designs. The technique shows a dynamic power consumption saving of around 30% over a conventional global clocking mechanism. The results were obtained from a series of experiments of a systolic circuit implemented in Virtex-II devices. The conversion from a global-clocked pipelined design to the proposed technique is straightforward, preserving the original datapath design. The savings can be used immediately either as a power reduction benefit or to increase the frequency of operation of a design for the same power consumption.

Transmission of wireless power by magnetic resonance

The work involves investigation of a type of wireless power system wherein its analysis will yield the construction of a prototype modeled as a singular technological artifact. It is through exploration of the artifact that forms the intellectual basis for not only its prototypical forms, but suggestive of variant forms not yet discovered. Through the process it is greatly clarified the role of the artifact, its most suitable application given the constraints on the delivery problem, and optimization strategies to improve it. In order to improve maturity and contribute to a body of knowledge, this document proposes research utilizing mid-field region, efficient inductive-transfer for the purposes of removing wired connections and electrical contacts. While the description seems enough to state the purpose of this work, it does not convey the compromises of having to redraw the lines of demarcation between near and far-field in the traditional method of broadcasting. Two striking scenarios are addressed in this thesis: Firstly, the mathematical explanation of wireless power is due to J.C. Maxwell's original equations, secondly, the behavior of wireless power in the circuit is due to Joseph Larmor's fundamental works on the dynamics of the field concept. A model of propagation will be presented which matches observations in experiments. A modified model of the dipole will be presented to address the phenomena observed in the theory and experiments. Two distinct sets of experiments will test the concept of single and two coupled-modes. In a more esoteric context of the zero and first-order magnetic field, the suggestion of a third coupled-mode is presented. Through the remaking of wireless power in this context, it is the intention of the author to show the reader that those things lost to history, bound to a path of complete obscurity, are once again innovative and useful ideas.

Second-order model for remote and close-up short-circuit faults currents on DC traction supply

A technique to calculate the current waveform for both close-up and remote short-circuit faults on DC supplied railways and subways is presented. Exact DC short-circuit current calculation is best performed by sophisticated computer transient simulations. However, an accurate simplified calculation method based on second-order approximation which can be easily executed with the help of a calculator or a spreadsheet program is proposed.