Integration in new product development: Case study in a large Brazilian high-technology company

Proficiency in management activities undertaken in product development processes is regarded as a key competitive advantage for companies, particularly for high-tech industrial firms, which benefit from the important competitiveness factor of launching products with a differentiated technological content. This paper's objective was to identify, through case study, practices for integration between the roles of R & D with others involved in product development in a large Brazilian company of industrial automation. The results suggest some management practices to improve the integration in new products development, such as the use of employees from marketing with knowledge and experience previously gained from R & D activities and uses the heavyweight product manager to solve synchronization problems between product and technology development. © Universidad Alberto Hurtado, Facultad de Economía y Negocios.

Unveiling fieldbus network technology through project-based learning

Fieldbus communications networks are a fundamental part of modern industrial automation technique. This paperwork presents an application of project-based learning (PBL) paradigm to help electrical engineering students grasp the major concepts of fieldbus networks, while attending a one-term long, elective microcontroller course. © 2012 IEEE.

MATIW 1451 - monitoramento e acionamento de transdutores inteligentes através da Web (Padrão IEEE 1451)

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Uma ferramenta alternativa para síntese de circuitos lógicos usando a técnica de circuito evolutivo

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Desenvolvimento de um programa computacional destinado à unidade móvel de ensaio na barra de tração (umeb) para a avaliação do desempenho de tratores

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Desenvolvimento de um sistema de posicionamento automático para painéis fotovoltaicos

Pós-graduação em Agronomia (Energia na Agricultura) - FCA

Implementação de um nó IEEE 1451, baseado em ferramentas abertas e padronizadas, para aplicações em ambientes de instrumentação distribuída

Pós-graduação em Engenharia Elétrica - FEIS

Relação desgaste-acabamento superficial em ferramentas de metal duro com revestimento triplo no torneamento de aços

Pós-graduação em Engenharia Mecânica - FEG

Automação do manejo alimentar na engorda de tilápias criadas em tanque-rede

Pós-graduação em Zootecnia - FMVZ

FROM FACTORY-FLOOR TO UNIVERSITY

The interaction between industry and university is often discussed. Industry participants feel they do not have enough time to spend with academics because of tight deadlines to achieve your goals. The other hand, professors and his students do not have availability and resources for responding quickly to industry activities. Both sides recognize the associated problems and feel the consequences of various forms. One way to reduce the distance between them is to provide industrial labs that resemble the factory floor at the university. Thus not only students may work on a real technological base, but also the industry's problems can be brought to the university laboratory. To ensure that relevant industrial problems will be studied, the industry needs help in the formulation of the problem being researched. The graduate program of Automation and Control Engineering from UNESP Sorocaba is aimed at training human resources with skills in automation and control activities related to the development of automatic control processes, integrating electronic commands, intelligent manufacturing and industrial robotics. In order to achieve its objectives, one of the pillars of the university consists of a wide range of modern equipments and software for industrial automation, which allows the circuit assembly from most primitive until configuration and programming of a complex system of integrated manufacturing. This paper describes industrial automation equipments and laboratory structure offered to students of Control and Automation Engineering graduate program at UNESP Sorocaba as alternative to close technologies and real problems on the job until academic world. The strategic is to do students understand theory and operations in robotic and industrial automation by means to manipulating real production systems locate at university

Integration of wireless sensor networks to the internet of things using a 6LoWPAN Gateway

The Internet of Things is a new paradigm where smart embedded devices and systems are connected to the Internet. In this context, Wireless Sensor Networks (WSN) are becoming an important alternative for sensing and actuating critical applications like industrial automation, remote patient monitoring and domotics. The IEEE 802.15.4 protocol has been adopted as a standard for WSN and the 6LoWPAN protocol has been proposed to overcome the challenges of integrating WSN and Internet protocols. In this paper, the mechanisms of header compression and fragmentation of IPv6 datagrams proposed in the 6LoWPAN standard were evaluated through field experiments using a gateway prototype and IEEE 802.15.4 nodes.

Magnetic Flip Flops for Space Applications

The radiation environment of space presents a significant threat to the reliability of nonvolatile memory technologies. Ionizing radiation disturbs the charge stored on floating gates, and cosmic rays can permanently damage thin oxides. A new memory technology based on the magnetic tunneling junction (MTJ) appears to offer superior resistance to radiation effects and virtually unlimited write endurance. A magnetic flip flop has a number of potential applications, such as the configuration memory in field-programmable logic devices. However, using MTJs in a flip flop requires radically different circuitry for storing and retrieving data. New techniques are needed to insure that magnetic flip flops are reliable in the radiation environment of space. We propose a new radiation-tolerant magnetic flip flop that uses the inherent resistance of the MTJ to increase its immunity to single event upset and employs a robust “Pac-man” magnetic element.

Run-time Scalable Architecture for Deblocking Filtering in H.264/AVC-SVC Video Codecs

Systems relying on fixed hardware components with a static level of parallelism can suffer from an underuse of logical resources, since they have to be designed for the worst-case scenario. This problem is especially important in video applications due to the emergence of new flexible standards, like Scalable Video Coding (SVC), which offer several levels of scalability. In this paper, Dynamic and Partial Reconfiguration (DPR) of modern FPGAs is used to achieve run-time variable parallelism, by using scalable architectures where the size can be adapted at run-time. Based on this proposal, a scalable Deblocking Filter core (DF), compliant with the H.264/AVC and SVC standards has been designed. This scalable DF allows run-time addition or removal of computational units working in parallel. Scalability is offered together with a scalable parallelization strategy at the macroblock (MB) level, such that when the size of the architecture changes, MB filtering order is modified accordingly

On the automatic integration of hardware accelerators into FPGA-based embedded systems

This paper proposes an automatic framework for the seamless integration of hardware accelerators, starting from an OpenMP-based application and an XML file describing the HW/SW partitioning. It extends a fully software architecture by generating and integrating the cores, along with the proper interfaces, and the code for scheduling and synchronization. Experimental results show that it is possible to validate different solutions only by varying the input code.

Implementation techniques for evolvable HW systems: virtual vs. dynamic reconfiguration

Adaptive hardware requires some reconfiguration capabilities. FPGAs with native dynamic partial reconfiguration (DPR) support pose a dilemma for system designers: whether to use native DPR or to build a virtual reconfigurable circuit (VRC) on top of the FPGA which allows selecting alternative functions by a multiplexing scheme. This solution allows much faster reconfiguration, but with higher resource overhead. This paper discusses the advantages of both implementations for a 2D image processing matrix. Results show how higher operating frequency is obtained for the matrix using DPR. However, this is compensated in the VRC during evolution due to the comparatively negligible reconfiguration time. Regarding area, the DPR implementation consumes slightly more resources due to the reconfiguration engine, but adds further more capabilities to the system.