High performance VLSI architecture design for H.264 CAVLC decoder

H.264 video standard achieves high quality video along with high data compression when compared to other existing video standards. H.264 uses context-based adaptive variable length coding (CAVLC) to code residual data in Baseline profile. In this paper we describe a novel architecture for CAVLC decoder including coeff-token decoder, level decoder total-zeros decoder and run-before decoder UMC library in 0.13 mu CMOS technology is used to synthesize the proposed design. The proposed design reduces chip area and improves critical path performance of CAVLC decoder in comparison with [1]. Macroblock level (including luma and chroma) pipeline processing for CAVLC is implemented with an average of 141 cycles (including pipeline buffering) per macroblock at 250MHz clock frequency. To compare our results with [1] clock frequency is constrained to 125MHz. The area required for the proposed architecture is 17586 gates, which is 22.1% improvement in comparison to [1]. We obtain a throughput of 1.73 * 10(6) macroblocks/second, which is 28% higher than that reported in [1]. The proposed design meets the processing requirement of 1080HD [5] video at 30frames/seconds.

Exploring energy-performance trade-offs for heterogeneous interconnect clustered VLIW processors

Clustered architecture processors are preferred for embedded systems because centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption. Although clustering helps by improving clock speed, reducing energy consumption of the logic, and making the design simpler, it introduces extra overheads by way of inter-cluster communication. This communication happens over long global wires which leads to delay in execution and significantly high energy consumption.In this paper, we propose a new instruction scheduling algorithm that exploits scheduling slacks of instructions and communication slacks of data values together to achieve better energy-performance trade-offs for clustered architectures with heterogeneous interconnect. Our instruction scheduling algorithm achieves 35% and 40% reduction in communication energy, whereas the overall energy-delay product improves by 4.5% and 6.5% respectively for 2 cluster and 4 cluster machines with marginal increase (1.6% and 1.1%) in execution time. Our test bed uses the Trimaran compiler infrastructure.

Sensitive high-resolution ion microprobe U-Pb dating of prograde and retrograde ultrahigh-temperature metamorphism as exemplified by Sri Lankan granulites

Ultrahigh-temperature (UHT) granulites of the central Highland Complex, Sri Lanka, underwent some of the highest known peak temperatures of crustal metamorphism. Zircon and monazite U-Pb systems in granulites near Kandy, the highest grade region (similar to 1050 degrees C; 0.9 GPa), preserve both a record of the timing of prograde and retrograde phases of UHT metamorphism and evidence for the ages of older protolith components. Zircon grains from a quartz-saturated granulite containing relics of the peak UHT assemblage have remnant detrital cores with dates of ca. 2.5-0.83 Ga. Date clusters of ca. 1.7 and 1.04-0.83 Ga record episodes of zircon growth in the source region of the protolith sediment. Two generations of overgrowths with contrasting Th/U record metamorphic zircon growth at 569 +/- 5 and 551 +/- 7 Ma, probably in the absence and presence of monazite, respectively. The age of coexisting metamorphic monazite (547 +/- 7 Ma) is indistinguishable from that of the younger, low-Th/U zircon overgrowths. Zircon from a quartz-undersaturated monazite-absent UHT granulite with a mainly retrograde assemblage is mostly metamorphic (551 +/- 5 Ma). The ca. 570 Ma zircon overgrowths in the quartz-saturated granulite probably record partial melting just before or at the metamorphic peak. The ca. 550 Ma zircon in both rocks, and the ca. 550 Ma monazite in the quartz-saturated sample, record post-peak isothermal decompression. A possible model for this pressure-temperature-time evolution is ultrahot collisional orogeny during the assembly of Gondwana, locally superheated by basaltic underplating, followed by fast extensional exhumation.

Design and realization of high-performance wave-pipelined 8×8 b multiplier in CMOS technology

Wave pipelining is a design technique for increasing the throughput of a digital circuit or system without introducing pipelining registers between adjacent combinational logic blocks in the circuit/system. However, this requires balancing of the delays along all the paths from the input to the output which comes the way of its implementation. Static CMOS is inherently susceptible to delay variation with input data, and hence, receives a low priority for wave pipelined digital design. On the other hand, ECL and CML, which are amenable to wave pipelining, lack the compactness and low power attributes of CMOS. In this paper we attempt to exploit wave pipelining in CMOS technology. We use a single generic building block in Normal Process Complementary Pass Transistor Logic (NPCPL), modeled after CPL, to achieve equal delay along all the propagation paths in the logic structure. An 8×8 b multiplier is designed using this logic in a 0.8 ?m technology. The carry-save multiplier architecture is modified suitably to support wave pipelining, viz., the logic depth of all the paths are made identical. The 1 mm×0.6 mm multiplier core supports a throughput of 400 MHz and dissipates a total power of 0.6 W. We develop simple enhancements to the NPCPL building blocks that allow the multiplier to sustain throughputs in excess of 600 MHz. The methodology can be extended to introduce wave pipelining in other circuits as well

Fabrication and evaluation of 450 F electrochemical redox supercapacitors using inexpensive and high-performance, polyaniline coated, stainless-steel electrodes

Redox supercapacitors using polyaniline (PANI) coated. stainless-steel (SS) electrodes have been assembled and characterized. PANI has been deposited on SS substrate by a potentiodynamic method from an acidic electrolyte which contains aniline monomer. By employing stacks of electrodes, each with a geometrical area of 24 cm(2), in acidic perchlorate electrolyte, a capacitance value of about 450 F has been obtained over a long cycle-life. Characterization studies have been carried out by galvanostatic charge-discharge cycling of the capacitors singly, as well as in series and parallel configurations. Various electrical parameters have been evaluated. Use of the capacitors in parallel with a battery for pulse-power loads. and also working of a toy fan connected to the charged capacitors have been demonstrated. A specific capacitance value of about 1300 F g(-1) of PANI has been obtained at a discharge power of about 0.5 kW kg(-1). This value is several times higher than those reported in the literature for PANI and is, perhaps, the highest value known for a capacitor material. The inexpensive SS substrate and the high-capacitance PANI are favorable factors for commercial exploitation. (C) 2002 Elsevier Science B.V. All rights reserved.

Potentiodynamically deposited polyaniline on stainless steel - Inexpensive, high-performance electrodes for electrochemical supercapacitors

Polyaniline (PANI) has been studied as an active material for electrochemical capacitors. Polymerization of aniline to PANI has been carried out potentiodynamically on a stainless steel (SS) substrate, instead of Pt-based substrates generally employed for this application. The PANI/SS electrodes have been evaluated by assembling symmetrical capacitors in NaClO(4) + HClO(4) mixed electrolyte and subjecting them to galvanostatic charge/discharge cycles between 0 and 0.75 V. The effect of substrate has been assessed by comparing the capacitance of PANI/SS and PANI/Pt electrodes. The capacitance of PANI/SS electrode is higher than that of PANI/Pt electrode by several times. The effect of sweep rate of potentiodynamic deposition of PANI/SS on capacitance has been investigated. At a power density of 0.5 kW kg(-1), a capacitance value of 815 F g(-1) of PANI is obtained for the deposition sweep rate of 200 mV s(-1). Increase in thickness of PANI on the SS substrate results in an increase in capacitance of PANI. This value of capacitance is the highest ever reported for any electrochemical capacitor material. Thus, in addition to a favorable economic aspect involved in using SS instead of Pt or Pt-based substrate, the advantage of higher capacitance of PANI has also been achieved. (C) 2002 The Electrochemical Society.

Improving Performance of Result Caches in Network Processors

Digest caches have been proposed as an effective method tospeed up packet classification in network processors. In this paper, weshow that the presence of a large number of small flows and a few largeflows in the Internet has an adverse impact on the performance of thesedigest caches. In the Internet, a few large flows transfer a majority ofthe packets whereas the contribution of several small flows to the totalnumber of packets transferred is small. In such a scenario, the LRUcache replacement policy, which gives maximum priority to the mostrecently accessed digest, tends to evict digests belonging to the few largeflows. We propose a new cache management algorithm called SaturatingPriority (SP) which aims at improving the performance of digest cachesin network processors by exploiting the disparity between the number offlows and the number of packets transferred. Our experimental resultsdemonstrate that SP performs better than the widely used LRU cachereplacement policy in size constrained caches. Further, we characterizethe misses experienced by flow identifiers in digest caches.

A Neuro-Adaptive Approach for Robust Control of High Performance Aircrafts with Parameter Inaccuracies

For high performance aircrafts, the flight control system needs to be quite effective in both assuring accurate tracking of pilot commands, while simultaneously assuring overall stability of the aircraft. In addition, the control system must also be sufficiently robust to cater to possible parameter variations. The primary aim of this paper is to enhance the robustness of the controller for a HPA using neuro-adaptive control design. Here the architecture employs a network of Gaussian Radial basis functions to adaptively compensate for the ignored system dynamics. A stable weight mechanism is determined using Lyapunov theory. The network construction and performance of the resulting controller are illustrated through simulations with a low-fidelity six –DOF model of F16 that is available in open literature.

Robustness Study of a Dynamic Inversion Control Law for a High Performance Aircraft

In the design of °ight control system modeling uncertainties in the form of param-eter variations is one of the major problems. It is even more critical for high performance aircrafts,since such aircrafts are purposefully designed unstable to enhance their performance (especially ma-neuverability). Hence the °ight control system needs to be quite e®ective in both assuring accurate tracking of pilot commands, while simultaneously assuring overall stability of the aircraft. In addi-tion, the control system must also be su±ciently robust to cater for possible parameter variations and inaccuracies . The primary aim of this paper is to carry out a robustness study of a dynamic inversion based nonlinear control design for a high performance aircraft, which has been developed recently [1].

Limits of Data Level Parallelism

Abstract—A new breed of processors like the Cell Broadband Engine, the Imagine stream processor and the various GPU processors emphasize data-level parallelism (DLP) and threadlevel parallelism (TLP) as opposed to traditional instructionlevel parallelism (ILP). This allows them to achieve order-ofmagnitude improvements over conventional superscalar processors for many workloads. However, it is unclear as to how much parallelism of these types exists in current programs. Most earlier studies have largely concentrated on the amount of ILP in a program, without differentiating DLP or TLP. In this study, we investigate the extent of data-level parallelism available in programs in the MediaBench suite. By packing instructions in a SIMD fashion, we observe reductions of up to 91 % (84 % on average) in the number of dynamic instructions, indicating a very high degree of DLP in several applications. I.

Command Tracking in High Performance Aircrafts: A New Dynamic Inversion Design

This paper proposes a new straight forward technique based on dynamic inversion, which is applied for tracking the pilot commands in high performance aircrafts.Pilot commands assumed in longitudinal mode are normal acceleration and total velocity(while roll angle and lateral acceleration are maintained at zero). In lateral mode, roll rate and total velocity are used as pilot commands (while climb rate and lateral acceleration are maintained at zero). Ensuring zero lateral acceleration leads to a better turn co-ordination. A six degree-of-freedom model of F-16 aircraft is used for both control design as well as simulation studies. Promising results are obtained which are found to be superior as compared to an existing approach (which is also based on dynamic inversion). The new approach has two potential benefits, namely reduced oscillatory response and reduced control magnitude. Another advantage of this approach is that it leads to a significant reduction of tuning parameters in the control design process.

High-Performance Metal-Insulator-Metal Capacitors Using Europium Oxide as Dielectric

We report the first demonstration of metal-insulator-metal (MIM) capacitors with Eu2O3 dielectric for analog and DRAM applications. The influence of different anneal conditions on the electrical characteristics of the fabricated MIM capacitors is studied. FG anneal results in high capacitance density (7 fF/mu m(2)), whereas oxygen anneal results in low quadratic voltage coefficient of capacitance (VCC) (194 ppm/V-2 at 100 kHz), and argon anneal results in low leakage current density (3.2 x 10(-8) A/cm(2) at -1 V). We correlate these electrical results with the surface chemical states of the films through X-ray photoelectron spectroscopy measurements. In particular, FG anneal and argon anneal result in sub-oxides, which modulate the electrical properties.

Degradation studies of organic acids in commercially packed fruit juices: A reverse phase high performance liquid chromatographic approach

Organic acids are important constituents of fruit juices. They render tartness, flavour and specific taste to fruit juices. Shelf life and stability of fruit juices are important factors, which determine their nutritional quality and freshness. In this view, the effect of storage on the concentration of organic acids in commercially packed fruit juices is studied by reverse phase high performance liquid chromatography (RP-HPLC). Ten packed fruit juices from two different brands are stored at 30 C for 24, 48 and 72 hours. A reverse phase high performance liquid chromatographic method is used to determine the concentration of oxalic, tartaric, malic, ascorbic and citric acid in the fruit juices during storage. The chromatographic analysis of organic acids is carried out using mobile phase 0.5% (w/v) ammonium dihydrogen orthophosphate buffer (pH 2.8) on C18 column with UV-Vis detector. The results show that the concentration of organic acids generally decreases in juices under study with the increase in storage time. All the fruit juices belonging to tropicana brand underwent less organic acid degradation in comparison to juices of real brand. Orange fruit juice is found to be least stable among the juices under study, after the span of 72 hours. Amongst all the organic acids under investigation minimum stability is shown by ascorbic acid followed by malic and citric acid.

Development of high performance electroless Ni-P-HNT composite coatings

Halloysite nanotubes (HNTs) of the dimension 50nm x 1-3 mu m (diameter x length) are utililized to fabricate the alloy composite by employing electroless/autocatalytic deposition technique. Electroless Ni-P-HNT binary alloy composite coatings are prepared successfully on low carbon steel. These nanotubes were made to get inserted/incorporated into nickel matrix and corresponding composites are examined for their electrochemical, mechanical and tribological performances and compared with that of plain Ni-P. The coatings were characterized using scanning electron microscopy (SEM) and Energy dispersive X-ray analysis (EDX) techniques to analyze surface nature and composition correspondingly. Small amount of incorporated HNTs made Ni-P deposits appreciable enhancement and betterment in corrosion resistance, hardness and friction resistance. This drastic improvement in the properties reflects the effect of addition of HNTs into Ni-P matrix leading to the development of high performance Ni-P-HNT composite coatings. (C) 2012 Elsevier B. V. All rights reserved.