917 resultados para Energy, Harvesting, Microcontrollori, Memoria, FRAM, Ultra, Low, Power
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The study of the Vertical-Cavity Semiconductor Optical Amplifiers (VCSOAs) for optical signal processing applications is increasing his interest. Due to their particular structure, the VCSOAs present some advantages when compared to their edge-emitting counterparts including low manufacturing costs, high coupling efficiency to optical fibers and the ease to fabricate 2-D arrays of this kind of devices. As a consequence, all-optical logic gates based on VCSOAs may be very promising devices for their use in optical computing and optical switching in communications. Moreover, since all the boolean logic functions can be implemented by combining NAND logic gates, the development of a Vertical-Cavity NAND gate would be of particular interest. In this paper, the characteristics of the dispersive optical bistability appearing on a VCSOA operated in reflection are studied. A progressive increment of the number of layers compounding the top Distributed Bragg Reflector (DBR) of the VCSOA results on a change on the shape of the appearing bistability from an S-shape to a clockwise bistable loop. This resulting clockwise bistability has high on-off contrast ratio and input power requirements one order of magnitude lower than those needed for edge-emitting devices. Based on these results, an all-optical vertical-cavity NAND gate with high on-off contrast ratio and an input power for operation of only 10|i\V will be reported in this paper.
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While for years traditional wireless sensor nodes have been based on ultra-low power microcontrollers with sufficient but limited computing power, the complexity and number of tasks of today’s applications are constantly increasing. Increasing the node duty cycle is not feasible in all cases, so in many cases more computing power is required. This extra computing power may be achieved by either more powerful microcontrollers, though more power consumption or, in general, any solution capable of accelerating task execution. At this point, the use of hardware based, and in particular FPGA solutions, might appear as a candidate technology, since though power use is higher compared with lower power devices, execution time is reduced, so energy could be reduced overall. In order to demonstrate this, an innovative WSN node architecture is proposed. This architecture is based on a high performance high capacity state-of-the-art FPGA, which combines the advantages of the intrinsic acceleration provided by the parallelism of hardware devices, the use of partial reconfiguration capabilities, as well as a careful power-aware management system, to show that energy savings for certain higher-end applications can be achieved. Finally, comprehensive tests have been done to validate the platform in terms of performance and power consumption, to proof that better energy efficiency compared to processor based solutions can be achieved, for instance, when encryption is imposed by the application requirements.
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This paper focuses on the problems associated with privacy protection in smart grid. We will give an overview of a possible realization of a privacy-preserving approach that encompasses privacy-utility tradeoff into a single model. This approach proposes suppression of low power frequency components as a solution to reduce the amount of information leakage from smart meter readings. We will consider the applicability of the procedure to hide the appliance usage with respect to the type of home devices.
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A novel temperature sensor based on nematic liquid crystal permittivity as a sensing magnitude, is presented. This sensor consists of a specific micrometric structure that gives considerable advantages from other previous related liquid crystal (LC) sensors. The analytical study reveals that permittivity change with temperature is introduced in a hyperbolic cosine function, increasing the sensitivity term considerably. The experimental data has been obtained for ranges from −6 °C to 100 °C. Despite this, following the LC datasheet, theoretical ranges from −40 °C to 109 °C could be achieved. These results have revealed maximum sensitivities of 33 mVrms/°C for certain temperature ranges; three times more than of most silicon temperature sensors. As it was predicted by the analytical study, the micrometric size of the proposed structure produces a high output voltage. Moreover the voltage’s sensitivity to temperature response can be controlled by the applied voltage. This response allows temperature measurements to be carried out without any amplification or conditioning circuitry, with very low power consumption.
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The parsec scale properties of low power radio galaxies are reviewed here, using the available data on 12 Fanaroff-Riley type I galaxies. The most frequent radio structure is an asymmetric parsec-scale morphology--i.e., core and one-sided jet. It is shared by 9 (possibly 10) of the 12 mapped radio galaxies. One (possibly 2) of the other galaxies has a two-sided jet emission. Two sources are known from published data to show a proper motion; we present here evidence for proper motion in two more galaxies. Therefore, in the present sample we have 4 radio galaxies with a measured proper motion. One of these has a very symmetric structure and therefore should be in the plane of the sky. The results discussed here are in agreement with the predictions of the unified scheme models. Moreover, the present data indicate that the parsec scale structure in low and high power radio galaxies is essentially the same.
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Ultra-low picomolar concentrations of the opioid antagonists naloxone (NLX) and naltrexone (NTX) have remarkably potent antagonist actions on excitatory opioid receptor functions in mouse dorsal root ganglion (DRG) neurons, whereas higher nanomolar concentrations antagonize excitatory and inhibitory opioid functions. Pretreatment of naive nociceptive types of DRG neurons with picomolar concentrations of either antagonist blocks excitatory prolongation of the Ca(2+)-dependent component of the action potential duration (APD) elicited by picomolar-nanomolar morphine and unmasks inhibitory APD shortening. The present study provides a cellular mechanism to account for previous reports that low doses of NLX and NTX paradoxically enhance, instead of attenuate, the analgesic effects of morphine and other opioid agonists. Furthermore, chronic cotreatment of DRG neurons with micromolar morphine plus picomolar NLX or NTX prevents the development of (i) tolerance to the inhibitory APD-shortening effects of high concentrations of morphine and (ii) supersensitivity to the excitatory APD-prolonging effects of nanomolar NLX as well as of ultra-low (femtomolar-picomolar) concentrations of morphine and other opioid agonists. These in vitro studies suggested that ultra-low doses of NLX or NTX that selectively block the excitatory effects of morphine may not only enhance the analgesic potency of morphine and other bimodally acting opioid agonists but also markedly attenuate their dependence liability. Subsequent correlative studies have now demonstrated that cotreatment of mice with morphine plus ultra-low-dose NTX does, in fact, enhance the antinociceptive potency of morphine in tail-flick assays and attenuate development of withdrawal symptoms in chronic, as well as acute, physical dependence assays.
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The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption. The use of Field Programmable Gate Arrays (FPGAs) provides specific reprogrammable hardware technology that can be properly exploited to obtain a reconfigurable sensor system. This adaptation capability enables the implementation of complex applications using the partial reconfigurability at a very low-power consumption. For highly demanding tasks FPGAs have been favored due to the high efficiency provided by their architectural flexibility (parallelism, on-chip memory, etc.), reconfigurability and superb performance in the development of algorithms. FPGAs have improved the performance of sensor systems and have triggered a clear increase in their use in new fields of application. A new generation of smarter, reconfigurable and lower power consumption sensors is being developed in Spain based on FPGAs. In this paper, a review of these developments is presented, describing as well the FPGA technologies employed by the different research groups and providing an overview of future research within this field.
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Mode of access: Internet.
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January 1963.
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Oggi, i dispositivi portatili sono diventati la forza trainante del mercato consumer e nuove sfide stanno emergendo per aumentarne le prestazioni, pur mantenendo un ragionevole tempo di vita della batteria. Il dominio digitale è la miglior soluzione per realizzare funzioni di elaborazione del segnale, grazie alla scalabilità della tecnologia CMOS, che spinge verso l'integrazione a livello sub-micrometrico. Infatti, la riduzione della tensione di alimentazione introduce limitazioni severe per raggiungere un range dinamico accettabile nel dominio analogico. Minori costi, minore consumo di potenza, maggiore resa e una maggiore riconfigurabilità sono i principali vantaggi dell'elaborazione dei segnali nel dominio digitale. Da più di un decennio, diverse funzioni puramente analogiche sono state spostate nel dominio digitale. Ciò significa che i convertitori analogico-digitali (ADC) stanno diventando i componenti chiave in molti sistemi elettronici. Essi sono, infatti, il ponte tra il mondo digitale e analogico e, di conseguenza, la loro efficienza e la precisione spesso determinano le prestazioni globali del sistema. I convertitori Sigma-Delta sono il blocco chiave come interfaccia in circuiti a segnale-misto ad elevata risoluzione e basso consumo di potenza. I tools di modellazione e simulazione sono strumenti efficaci ed essenziali nel flusso di progettazione. Sebbene le simulazioni a livello transistor danno risultati più precisi ed accurati, questo metodo è estremamente lungo a causa della natura a sovracampionamento di questo tipo di convertitore. Per questo motivo i modelli comportamentali di alto livello del modulatore sono essenziali per il progettista per realizzare simulazioni veloci che consentono di identificare le specifiche necessarie al convertitore per ottenere le prestazioni richieste. Obiettivo di questa tesi è la modellazione del comportamento del modulatore Sigma-Delta, tenendo conto di diverse non idealità come le dinamiche dell'integratore e il suo rumore termico. Risultati di simulazioni a livello transistor e dati sperimentali dimostrano che il modello proposto è preciso ed accurato rispetto alle simulazioni comportamentali.
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We demonstrate a novel dual-wavelength erbium-fiber laser that uses a single nonlinear-optical loop mirror modulator to simultaneously modelock two cavities with chirped fiber Bragg gratings as end mirrors. We show that this configuration produces synchronized soliton pulse trains with an ultra-low RMS inter-pulse-stream timing jitter of 620 fs enabling application to multiwavelength systems at data rates in excess of 130 Gb/s.
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We demonstrate a novel dual-wavelength erbium-fiber laser that uses a single nonlinear-optical loop mirror modulator to simultaneously modelock two cavities with chirped fiber Bragg gratings as end mirrors. We show that this configuration produces synchronized soliton pulse trains with an ultra-low RMS inter-pulse-stream timing jitter of 620 fs enabling application to multiwavelength systems at data rates in excess of 130 Gb/s. © 1995 IEEE
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We demonstrate 40x43Gbit/s RZ-DQPSK transmission over 1000km of ultra-low-loss G.652 fibre with 250km amplifier spacing. Hybrid Raman-EDFA amplification with co- and contra-directional Raman pumping enables 27dB Raman gain per span and error-free post-FEC performance. ©2010 IEEE.