Prediction of breakout noise from an elliptical duct of finite length

This paper describes a predictive model for breakout noise from an elliptical duct or shell of finite length. The transmission mechanism is essentially that of ``mode coupling'', whereby higher structural modes in the duct walls get excited because of non-circularity of the wall. Effect of geometry has been taken care of by evaluating Fourier coefficients of the radius of curvature. The noise radiated from the duct walls is represented by that from a finite vibrating length of a semi infinite cylinder in a free field. Emphasis is on understanding the physics of the problem as well as analytical modeling. The analytical model is validated with 3-D FEM. Effects of the ovality, curvature, and axial terminations of the duct have been demonstrated. (C) 2010 Institute of Noise Control Engineering.

Methyl ethyl ketone plus water plus secondary butyl alcohol: A potential system for the exploration of a quadruple critical point

We report preliminary experiments on the ternary-liquid mixture, methyl ethyl ketone (MEK)+water (W)+secondary butyl alcohol (sBA)-a promising system for the realization of the quadruple critical point (QCP). The unusual tunnel-shaped phase diagram shown by this system is characterized and visualized by us in the form of a prismatic phase diagram. Light-scattering experiments reveal that (MEK+W+sBA) shows near three-dimensional-Ising type of critical behavior near the lower critical solution temperatures, with the susceptibility exponent (gamma) in the range of 1.217 <=gamma <= 1.246. The correlation length amplitudes (xi(o)) and the critical exponent (nu) of the correlation length (xi) are in the ranges of 3.536 <=xi(o)<= 4.611 A and 0.619 <=nu <= 0.633, respectively. An analysis in terms of the effective susceptibility exponent (gamma(eff)) shows that the critical behavior is of the Ising type for MEK concentrations in the ranges of 0.1000 <= X <= 0.1250 and X >= 0.3000. But, for the intermediate range of 0.1750 <= X < 0.3000, the system shows a tendency towards mean-field type of critical behavior. The advantages of the system (MEK+W+sBA) over the system (3-methylpyridine+water+heavy water+potassium Iodide) for the realization of a QCP are outlined.

Opportunity Exploration and Exploitation in International New Ventures: A Study of Relationships’ Involvement in Early Entrepreneurial and Internationalisation Events

International new ventures (INVs) are firms that engage very early after their foundation, if not immediately, in inter-national activities. INVs are a relatively recent phenomenon that deviates from earlier theories on international business. In order to develop our understanding of the emergence and early internationalisation of INVs three different research areas are built upon in the dissertation: International Entrepreneurship, Entrepreneurship and Networks. Net-works have been identified as important for INVs. However, there is a lack of more profound studies regarding the way different types of relationships influence INVs. Few studies are concerned with exploration and exploitation of opportunities and research on the benefits and drawbacks of entrepreneurs’ relationships for the international opportunity recognition process has been called for. By taking a network approach to opportunity exploration and exploitation, the dissertation develops our under-standing of how entrepreneurs’ relationships are involved in exploring and exploiting opportunities during an INV’s early and critical entrepreneurial and internationalisation events. The critical events are studied during three phases: pre-founding, start-up and early internationalisation. Since internationalisation is present from the very beginning, the early internationalisation phase may be parallel to both the pre-founding and the start-up phase. The dissertation contributes to international entrepreneur-ship research in mainly two ways. First, by offering a deep insight into which opportunity exploration and exploitation activities entrepreneurs’ relationships are involved. Second, by adding to our understanding of what the relationships contribute to these activities, mainly in the sense of benefits gained through the relationships. Studying micro firms in real time in their early development towards INVs is considered a unique contribution of the study as it offers valuable insights into pre-founding, start-up, pre-internationalisation as well as early internationalisation. The study shows that in order to understand the development of INVs, it is beneficial to go back to times when there was no thought of starting the INV. By focusing on the entrepreneurs’ background and relationships a more complete picture of the INV is gained. Relationships created at former workplaces or during school time might be the ones that develop business opportunities and set off internationalisation. By focusing on the pre-founding phase, the study also contributes to entrepreneurship literature as this stage has often been neglected or assumed obvious in earlier research. This dissertation shows that an important and mostly lengthy pre-founding phase precedes the decision to start a f rm. In addition, the integration of entrepreneurs’ real experiences with existing theory to develop a continuum for the strength of relationships allows for contributions to network theory.

Analytical solution of the laminar mean flow wave equation in a lined or unlined two-dimensional rectangular duct

The prediction of the sound attenuation in lined ducts with sheared mean flow has been a topic of research for many years. This involves solving the sheared mean flow wave equation, satisfying the relevant boundary condition. As far as the authors' knowledge goes, this has always been done using numerical techniques. Here, an analytical solution is presented for the wave propagation in two-dimensional rectangular lined ducts with laminar mean flow. The effect of laminar mean flow is studied for both the downstream and the upstream wave propagation. The attenuation values predicted for the laminar mean flow case are compared with those for the case of uniform mean flow. Analytical expressions are derived for the transfer matrices.

A System-C based Micro architectural Exploration Framework for Latency, Power and Performance Trade-offs of On-Chip Interconnection

We describe a System-C based framework we are developing, to explore the impact of various architectural and microarchitectural level parameters of the on-chip interconnection network elements on its power and performance. The framework enables one to choose from a variety of architectural options like topology, routing policy, etc., as well as allows experimentation with various microarchitectural options for the individual links like length, wire width, pitch, pipelining, supply voltage and frequency. The framework also supports a flexible traffic generation and communication model. We provide preliminary results of using this framework to study the power, latency and throughput of a 4x4 multi-core processing array using mesh, torus and folded torus, for two different communication patterns of dense and sparse linear algebra. The traffic consists of both Request-Response messages (mimicing cache accesses)and One-Way messages. We find that the average latency can be reduced by increasing the pipeline depth, as it enables higher link frequencies. We also find that there exists an optimum degree of pipelining which minimizes energy-delay product.

Memory Architecture Exploration Framework for Cache Based Embedded SoC

Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences critical system design objectives like area, power and performance. Hence the embedded system designer performs a complete memory architecture exploration to custom design a memory architecture for a given set of applications. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of exhaustive-search based memory exploration at the outer level and a two step based integrated data layout for SPRAM-Cache based architectures at the inner level. We present a two step integrated approach for data layout for SPRAM-Cache based hybrid architectures with the first step as data-partitioning that partitions data between SPRAM and Cache, and the second step is the cache conscious data layout. We formulate the cache-conscious data layout as a graph partitioning problem and show that our approach gives up to 34% improvement over an existing approach and also optimizes the off-chip memory address space. We experimented our approach with 3 embedded multimedia applications and our approach explores several hundred memory configurations for each application, yielding several optimal design points in a few hours of computation on a standard desktop.

Streaming FFT on REDEFINE-v2: An Application-Architecture Design Space Exploration

In this paper we explore an implementation of a high-throughput, streaming application on REDEFINE-v2, which is an enhancement of REDEFINE. REDEFINE is a polymorphic ASIC combining the flexibility of a programmable solution with the execution speed of an ASIC. In REDEFINE Compute Elements are arranged in an 8x8 grid connected via a Network on Chip (NoC) called RECONNECT, to realize the various macrofunctional blocks of an equivalent ASIC. For a 1024-FFT we carry out an application-architecture design space exploration by examining the various characterizations of Compute Elements in terms of the size of the instruction store. We further study the impact by using application specific, vectorized FUs. By setting up different partitions of the FFT algorithm for persistent execution on REDEFINE-v2, we derive the benefits of setting up pipelined execution for higher performance. The impact of the REDEFINE-v2 micro-architecture for any arbitrary N-point FFT (N > 4096) FFT is also analyzed. We report the various algorithm-architecture tradeoffs in terms of area and execution speed with that of an ASIC implementation. In addition we compare the performance gain with respect to a GPP.

MODLEX: A Multi Objective Data Layout EXploration Framework for Embedded Systems-on-Chip

The memory subsystem is a major contributor to the performance, power, and area of complex SoCs used in feature rich multimedia products. Hence, memory architecture of the embedded DSP is complex and usually custom designed with multiple banks of single-ported or dual ported on-chip scratch pad memory and multiple banks of off-chip memory. Building software for such large complex memories with many of the software components as individually optimized software IPs is a big challenge. In order to obtain good performance and a reduction in memory stalls, the data buffers of the application need to be placed carefully in different types of memory. In this paper we present a unified framework (MODLEX) that combines different data layout optimizations to address the complex DSP memory architectures. Our method models the data layout problem as multi-objective genetic algorithm (GA) with performance and power being the objectives and presents a set of solution points which is attractive from a platform design viewpoint. While most of the work in the literature assumes that performance and power are non-conflicting objectives, our work demonstrates that there is significant trade-off (up to 70%) that is possible between power and performance.

MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip

Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences these parameters. Hence the embedded system designer performs a complete memory architecture exploration. This problem is a multi-objective optimization problem and can be tackled as a two-level optimization problem. The outer level explores various memory architecture while the inner level explores placement of data sections (data layout problem) to minimize memory stalls. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of Multi-objective Genetic Algorithm (Memory Architecture exploration) and an efficient heuristic data placement algorithm. At the outer level the memory architecture exploration is done by picking memory modules directly from a ASIC memory Library. This helps in performing the memory architecture exploration in a integrated framework, where the memory allocation, memory exploration and data layout works in a tightly coupled way to yield optimal design points with respect to area, power and performance. We experimented our approach for 3 embedded applications and our approach explores several thousand memory architecture for each application, yielding a few hundred optimal design points in a few hours of computation time on a standard desktop.

Noise reduction with perforated three-duct muffler components

This paper describes the authors’ distributed parameter approach for derivation of closed-form expressions for the four-pole parameters of the perforated three-duct muffler components. In this method, three simultaneous second-order partial differential equations are first reduced to a set of six first-order ordinary differential equations. These equations are then uncoupled by means of a modal matrix. The resulting 6 × 6 matrix is reduced to the 2 × 2 transfer matrix using the relevant boundary conditions. This is combined with transfer matrices of other elements (upstream and downstream of this perforated element) to predict muffler performance like noise reduction, which is also measured. The correlation between experimental and theoretical values of noise reduction is shown to be satisfactory.

On the cut‐on frequencies of a large round duct with azimuthal as well as radial partitions

This letter deals with a three‐dimensional analysis of circular sectors and annular segments resulting from the partitioning of a round (cylindrical) duct for use in an active noise control system. The relevant frequency equations are derived for stationary medium and solved numerically to arrive at the cut‐on frequencies of the first few modes. The resultant table indicates among other things that azimuthal partitioning does not raise the cutoff frequency (the smallest cut‐on frequency) beyond a particular value, and that radial partitioning is counterproductive in that respect.

Analysis of a hybrid noise control system for a duct

This letter proposes the combination of a passive muffler and an active noise control system for the control of very high‐level noise in ducts used with large industrial fans and similar equipment. The analysis of such a hybrid system is presented making use of electroacoustic analogies and the transfer matrix method. It turns out that a passive muffler upstream of the input microphone can indeed lower the acoustic pressure and, hence, the power requirement of the auxiliary source. The parameter that needs to be optimized (or maximized) for this purpose is a certain velocity ratio that can readily be evaluated in a closed form, making it more or less straightforward to synthesize the configuration of an effective passive muffler to go with the active noise control system.