A new control strategy with saturation effect compensation for an autonomous induction generator drivenby wide speed range turbines

This paper presents a variable speed autonomous squirrel cage generator excited by a current-controlled voltage source inverter to be used in stand-alone micro-hydro power plants. The paper proposes a system control strategy aiming to properly excite the machine as well as to achieve the load voltage control. A feed-forward control sets the appropriate generator flux by taking into account the actual speed and the desired load voltage. A load voltage control loop is used to adjust the generated active power in order to sustain the load voltage at a reference value. The control system is based on a rotor flux oriented vector control technique which takes into account the machine saturation effect. The proposed control strategy and the adopted system models were validated both by numerical simulation and by experimental results obtained from a laboratory prototype. Results covering the prototype start-up, as well as its steady-state and dynamical behavior are presented. (C) 2011 Elsevier Ltd. All rights reserved.

A Step-up mu-Power Converter for Solar Energy Harvesting Applications, using Hill Climbing Maximum Power Point Tracking

This paper presents a step-up micro-power converter for solar energy harvesting applications. The circuit uses a SC voltage tripler architecture, controlled by an MPPT circuit based on the Hill Climbing algorithm. This circuit was designed in a 0.13 mu m CMOS technology in order to work with an a-Si PV cell. The circuit has a local power supply voltage, created using a scaled down SC voltage tripler, controlled by the same MPPT circuit, to make the circuit robust to load and illumination variations. The SC circuits use a combination of PMOS and NMOS transistors to reduce the occupied area. A charge re-use scheme is used to compensate the large parasitic capacitors associated to the MOS transistors. The simulation results show that the circuit can deliver a power of 1266 mu W to the load using 1712 mu W of power from the PV cell, corresponding to an efficiency as high as 73.91%. The simulations also show that the circuit is capable of starting up with only 19% of the maximum illumination level.

Fast optimum-predictive control and capacitor voltage balancing strategy for bipolar back-to-back NPC converters in high-voltage direct current transmission systems

Multilevel power converters have been introduced as the solution for high-power high-voltage switching applications where they have well-known advantages. Recently, full back-to-back connected multilevel neutral point diode clamped converters (NPC converter) have been used inhigh-voltage direct current (HVDC) transmission systems. Bipolar-connected back-to-back NPC converters have advantages in long-distance HVDCtransmission systems over the full back-to-back connection, but greater difficulty to balance the dc capacitor voltage divider on both sending and receiving end NPC converters. This study shows that power flow control and dc capacitor voltage balancing are feasible using fast optimum-predictive-based controllers in HVDC systems using bipolar back-to-back-connected five-level NPC multilevel converters. For both converter sides, the control strategytakes in account active and reactive power, which establishes ac grid currents in both ends, and guarantees the balancing of dc bus capacitor voltages inboth NPC converters. Additionally, the semiconductor switching frequency is minimised to reduce switching losses. The performance and robustness of the new fast predictive control strategy, and its capability to solve the DC capacitor voltage balancing problem of bipolar-connected back-to-back NPCconverters are evaluated.

New Technique for Uniform Voltage Sharing in Series Stacked Semiconductors

This paper describes the operation of a solid-state series stacked topology used as a serial and parallel switch in pulsed power applications. The proposed circuit, developed from the Marx generator concept, balances the voltage stress on each series stacked semiconductor, distributing the total voltage evenly. Experimental results from a 10 kV laboratory series stacked switch, using 1200 V semiconductors in a ten stages solid-state series stacked circuit, are reported and discussed, considering resistive, capacitive and inductive type loads for high and low duty factor voltage pulse operation.

Knowledge extraction from medium voltage load diagrams to support the definition of electrical tariffs

With the electricity market liberalization, distribution and retail companies are looking for better market strategies based on adequate information upon the consumption patterns of its electricity customers. In this environment all consumers are free to choose their electricity supplier. A fair insight on the customer´s behaviour will permit the definition of specific contract aspects based on the different consumption patterns. In this paper Data Mining (DM) techniques are applied to electricity consumption data from a utility client’s database. To form the different customer´s classes, and find a set of representative consumption patterns, we have used the Two-Step algorithm which is a hierarchical clustering algorithm. Each consumer class will be represented by its load profile resulting from the clustering operation. Next, to characterize each consumer class a classification model will be constructed with the C5.0 classification algorithm.

Constructing reference in children's narratives

In this paper we are concerned with the role played by adverbials in the construction of reference in children's narratives.

Start-up circuit for low-power indoor light energy harvesting applications

A start-up circuit, used in a micro-power indoor light energy harvesting system, is described. This start-up circuit achieves two goals: first, to produce a reset signal, power-on-reset (POR), for the energy harvesting system, and secondly, to temporarily shunt the output of the photovoltaic (PV) cells, to the output node of the system, which is connected to a capacitor. This capacitor is charged to a suitable value, so that a voltage step-up converter starts operating, thus increasing the output voltage to a larger value than the one provided by the PV cells. A prototype of the circuit was manufactured in a 130 nm CMOS technology, occupying an area of only 0.019 mm(2). Experimental results demonstrate the correct operation of the circuit, being able to correctly start-up the system, even when having an input as low as 390 mV using, in this case, an estimated energy of only 5.3 pJ to produce the start-up.

Avaliação do desempenho de um sistema híbrido de tomografia por emissão de positrões e tomografia computorizada

Mestrado em Medicina Nuclear.

Optical demultiplexer based on an a-SiC:H voltage controlled device

In this paper we present results on the use of a semiconductor heterostructure based on a-SiC:H as a wavelength-division demultiplexer for the visible light spectrum. The proposed device is composed of two stacked p-i-n photodiodes with intrinsic absorber regions adjusted to short and long wavelength absorption and carrier collection. An optoelectronic characterisation of the device was performed in the visible spectrum. Demonstration of the device functionality for WDM applications was done with three different input channels covering the long, the medium and the short wavelengths in the visible range. The recovery of the input channels is explained using the photocurrent spectral dependence on the applied voltage. An electrical model of the WDM device is proposed and supported by the solution of the respective circuit equations. Short range optical communications constitute the major application field however other applications are foreseen. (C) 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A 5GHz/1.8V CMOS Active Balun Integrated with LNA

The development of high performance monolithic RF front-ends requires innovative RF circuit design to make the best of a good technology. A fully differential approach is usually preferred, due to its well-known properties. Although the differential approach must be preserved inside the chip, there are cases where the input signal is single-ended such as RF image filters and IF filters in a RF receiver. In these situations, a stage able to convert single-ended into differential signals (balun) is needed. The most cited topology, which is capable of providing high gain, consists on a differential stage with one of the two inputs grounded. Unfortunately, this solution has some drawbacks when implemented monolithically. This work presents the design and simulated results of an innovative high-performance monolithic single to differential converter, which overcomes the limitations of the circuits.The integration of the monolithic active balun circuit with an LNA on a 0.18μm CMOS process is also reported. The circuits presented here are aimed at 802.11a. Section 2 describes the balun circuit and section 3 presents its performance when it is connected to a conventional single-ended LNA. Section 4 shows the simulated performance results focused at phase/amplitude balance and noise figure. Finally, the last section draws conclusions and future work.

A 5GHz1.8V Low Power CMOS Low-Noise Amplifier

Wireless local-area networks (WLANs) have been deployed as office and home communications infrastructures worldwide. The diversification of the standards, such as IEEE 802.11 series demands the design of RF front-ends. Low power consumption is one of the most important design concerns in the application of those technologies. To maintain competitive hardware costs, CMOS has been used since it is the best solution for low cost and high integration processing, allowing analog circuits to be mixed with digital ones. In the receiver chain, the low noise amplifier (LNA) is one of the most critical blocks in a transceiver design. The sensitivity is mainly determined by the LNA noise figure and gain. It interfaces with the pre-select filter and the mixer. Furthermore, since it is the first gain stage, care must be taken to provide accurate input match, low-noise figure, good linearity and a sufficient gain over a wide band of operation. Several CMOS LNAs have been reported during the last decade, showing that the most research has been done at 802.11/b and GSM standards (900-2400MHz spectrum) and more recently at 802.11/a (5GHz band). One of the more significant disadvantages of 802.11/b is that the frequency band is crowded and subject to interference from other technologies, as is 2.4GHz cordless phones and Bluetooth. As the demand for radio-frequency integrated circuits, operating at higher frequency bands, increases, the IEEE 802.11/a standard becomes a very attractive option to wireless communication system developers. This paper presents the design and implementation of a low power, low noise amplifier aimed at IEEE 802.11a for WLAN applications. It was designed to be integrated with an active balun and mixer, representing the first step toward a fully integrated monolithic WLAN receiver. All the required circuits are integrated at the same die and are powered by 1.8V supply source. Preliminary experimental results (S-parameters) are shown and promise excellent results. The LNA circuit design details are illustrated in Section 2. Spectre simulation results focused at gain, noise figure (NF) and input/output matching are presented in Section 3. Finally, conclusions and comparison with other recently reported LNAs are made in Section 4, followed by future work.

EGNOS based virtual reference stations

We propose the use of the European Geostationary Navigation Overlay Service (EGNOS) data - real time on line data provided by SISNeT - to develop Virtual Reference Stations and, thus, increase the quality of the Position, Velocity an Time (PVT) solution of receivers unable to interface directly with EGNOS. A Virtual Reference Station (VRS) is a concept where the existence of a differential reference station located near a mobile rover is simulated by software in order to increase the accuracy of the PVT solution of the mobile GNSS receiver.

Enhanced Race-to-halt: a leakage-aware energy management approach for dynamic priority systems

With progressing CMOS technology miniaturization, the leakage power consumption starts to dominate the dynamic power consumption. The recent technology trends have equipped the modern embedded processors with the several sleep states and reduced their overhead (energy/time) of the sleep transition. The dynamic voltage frequency scaling (DVFS) potential to save energy is diminishing due to efficient (low overhead) sleep states and increased static (leakage) power consumption. The state-of-the-art research on static power reduction at system level is based on assumptions that cannot easily be integrated into practical systems. We propose a novel enhanced race-to-halt approach (ERTH) to reduce the overall system energy consumption. The exhaustive simulations demonstrate the effectiveness of our approach showing an improvement of up to 8 % over an existing work.

An IEEE 802.15.4 protocol implementation (in nesC/TinyOS): reference guide v1.0

This technical report is to provide a reference guide to the implementation of the IEEE 802.15.4 protocol in nesC/TinyOS for the MICAz motes. The implementation is provided as a tool that can be used to implement, test and evaluate the current functionalities defined in the protocol standard as well as to enable the development of functionalities not yet implemented and new add-ons to the protocol.

Multilevel high-voltage pulse generation based on a new modular solid-state switch

This paper describes a modular solid-state switching cell derived from the Marx generator concept to be used in topologies for generating multilevel unipolar and bipolar high-voltage (HV) pulses into resistive loads. The switching modular cell comprises two ON/OFF semiconductors, a diode, and a capacitor. This cell can be stacked, being the capacitors charged in series and their voltages balanced in parallel. To balance each capacitor voltage without needing any parameter measurement, a vector decision diode algorithm is used in each cell to drive the two switches. Simulation and experimental results, for generating multilevel unipolar and bipolar HV pulses into resistive loads are presented.