On variable frequency microwave processing of heterogeneous chip-on-board assemblies

Variable Frequency Microwave (VFM) processing of heterogeneous chip-on-board assemblies is assessed using a multiphysics modelling approach. The Frequency Agile Microwave Oven Bonding System (FAMOBS) is capable of rapidly processing individual packages on a Chip-On-Board (COB) assembly. This enables each package to be processed in an optimal manner, with temperature ramp rate, maximum temperature and process duration tailored to the specific package, a significant benefit in assemblies containing disparate package types. Such heterogeneous assemblies may contain components such as large power modules alongside smaller modules containing low thermal budget materials with highly disparate processing requirements. The analysis of two disparate packages has been assessed numerically to determine the applicability of the dual section microwave system to curing heterogeneous devices and to determine the influence of differing processing requirements of optimal process parameters.

Investigation of wall-slip effect on paste release characteristic in flip-chip stencil printing process

As the trend toward further miniaturisation of pocket and handheld consumer electronic products continues apace, the requirements for even smaller solder joints will continue. With further reductions in the size of solder joints, the reliability of solder joints will become more and more critical to the long-term performance of electronic products. Solder joints play an important role in electronics packaging, serving both as electrical interconnections between the components and the board, and as mechanical support for components. With world-wide legislation for the removal/reduction of lead and other hazardous materials from electrical and electronic products, the electronics manufacturing industry has been faced with an urgent search for new lead-free solder alloy systems and other solder alternatives. In order to achieve high volume, low cost production, the stencil printing process and subsequent wafer bumping of solder paste has become indispensable. There is wide agreement in industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance. The printing of ICAs and lead-free solder pastes through the very small stencil apertures required for flip chip applications was expected to result in increased stencil clogging and incomplete transfer of paste to the printed circuit pads. Paste release from the stencil apertures is dependent on the interaction between the solder paste, surface pad and aperture wall; including its shape. At these very narrow aperture sizes the paste rheology becomes crucial for consistent paste withdrawal because for smaller paste volumes surface tension effects become dominant over viscous flow. Successful aperture filling and release will greatly depend on the rheology of the paste material. Wall-slip plays an important role in characterising the flow behaviour of solder paste materials. The wall- slip arises due to the various attractive and repulsive forces acting between the solder particles and the walls of the measuring geometry. These interactions could lead to the presence of a thin solvent layer adjacent to the wall, which gives rise to slippage. The wall slip effect can play an important role in ensuring successful paste release after the printing process. The aim of this study was to investigate the influence of the paste microstructure on slip formation for the paste materials (lead-free solder paste and isotropic conductive adhesives). The effect of surface roughness on the paste viscosity was investigated. It was also found that altering the surface roughness of the parallel plate measuring geometry did not significantly eliminate wall slip as was expected. But results indicate that the use of a relatively rough surface helps to increase paste adhesion to the plates, inducing structural breakdown of the paste. Most importantly, the study also demonstrated on how the wall slip formation in the paste material could be utilised for understanding of the paste microstructure and its flow behaviour

Viscoelastic properties of solder paste and isotropic conductive adhesives used for flip-chip assembly

The printing of pastes (solder pastes and isotropic conductive adhesives) through very small stencil apertures required for flip-chip pitch sizes is expected to result in increased stencil clogging and incomplete transfer of paste to the printed circuit board pads. There is wide agreement in industry that the paste printing process accounts for the majority of assembly defects, and most defects originate from poor understanding of the effect of printing process parameters on printing performance.

A methodology for characterising new lead-free solder paste formulations used for flip-chip assembly applications

The paper reports on the investigation of the rheological behaviour new lead-free solder pastes formulations for use in flip-chip assembly applications. The study is made up of three parts; namely the evaluation of the effect of plate geometry, the effect of temperature and processing environment and the effect of torsional frequencies on the rheological measurements. Different plate geometries and rheological tests were used to evaluate new formulations in terms of wall slip characteristics, linear viscoelastic region and shear thinning behaviour. A technique which combines the use of the creep-recovery and dynamic frequency sweep tests was used to further characterise the paste structure, rheological behaviour and the processing performance of the new paste formulations. The technique demonstrated in this study has wide utility for R & D personnel involved in new paste formulation, for implementing quality control procedures used in paste manufacture and packaging and for qualifying new flip-chip assembly lines

Effect of long-term aging on the rheological characteristics and printing performance of lead-free solder pastes used for flip-chip assembly

Stencil printing of solder pastes is a critical stage in the SMT assembly process as a high proportion of the solder-related defects can be attributed to this stage. As the trend towards product miniaturization continues, there is a greater need for better understanding of the rheological behaviour and printing performance of new paste formulations. This fundamental understanding is crucial for achieving the repeatable solder paste deposits from board-to-board and pad-to-pad required for more reliable solder interconnections. The paper concerns a study on the effect of ageing on the rheological characteristics and printing performance of new lead-free solder pastes formulations used for flip-chip assembly applications. The objective is to correlate the rheological characteristics of aged paste samples to their printing performance. The methodology developed can be used for bench-marking new lead-free paste formulations in terms of shelf life, the potential deterioration in rheological characteristics and their printing performance.

Modelling of the time-dependent flow behaviour of lead-free solder pastes used for flip-chip assembly applications

The market for solder paste materials in the electronic manufacturing and assembly sector is very large and consists of material and equipment suppliers and end users. These materials are used to bond electronic components (such as flip-chip, CSP and BGA) to printed circuit boards (PCB's) across a range of dimensions where the solder interconnects can be in the order of 0.05mm to 5mm in size. The non-Newtonian flow properties exhibited by solder pastes during its manufacture and printing/deposition phases have been of practical concern to surface mount engineers and researchers for many years. The printing of paste materials through very small-sized stencil apertures is known to lead to increased stencil clogging and incomplete transfer of paste to the substrate pads. At these very narrow aperture sizes the paste rheology and particle-wall interactions become crucial for consistent paste withdrawal. These non-Newtonian effects must be understood so that the new paste formulations can be optimised for consistent printing. The focus of the study reported in this paper is the characterisation of the rheological properties of solder pastes and flux mediums, and the evaluation of the effect of these properties on the pastes' printing performance at the flip-chip assembly application level. Solder pastes are known to exhibit a thixotropic behaviour, which is recognised by the decrease in apparent viscosity of paste material with time when subjected to a constant shear rate. The proper characterisation of this time-dependent theological behaviour of solder pastes is crucial for establishing the relationships between the pastes' structure and flow behaviour; and for correlating the physical parameters with paste printing performance. In this paper, we present a number of methods which have been developed for characterising the time-dependent and non-Newtonian rheological behaviour of solder pastes and flux mediums as a function of shear rates. We also present results of the study of the rheology of the solder pastes and flux mediums using the structural kinetic modelling approach, which postulates that the network structure of solder pastes breaks down irreversibly under shear, leading to time and shear dependent changes in the flow properties. Our results show that for the solder pastes used in the study, the rate and extent of thixotropy was generally found to increase with increasing shear rate. The technique demonstrated in this study has wide utility for R&D personnel involved in new paste formulation, for implementing quality control procedures used in solder paste manufacture and packaging; and for qualifying new flip-chip assembly lines

Open-ended microwave oven for flip-chip assembly

A novel open-ended waveguide cavity resonator for the microwave curing of bumps, underfills and encapsulants is described. The open oven has the potential to provide fast alignment of devices during flip-chip assembly, direct chip attach, surface mount assembly or wafer-scale level packaging. The prototype microwave oven was designed to operate at X-band for ease of testing, although a higher frequency version is planned. The device described in the paper takes the form of a waveguide cavity resonator. It is approximately square in cross-section and is filled with a low-loss dielectric with a relative permittivity of 6. It is excited by end-fed probes in order to couple power preferentially into the TM3,3,k mode with the object of forming nine 'hot-spots' in the open end. Low power tests using heat sensitive film demonstrate clearly that selective heating in multiple locations in the open end of the oven is achievable.

Linear QR architecture for a single chip adaptive beamformer

This paper presents the design of a novel single chip adaptive beamformer capable of performing 50 Gflops, (Giga-floating-point operations/second). The core processor is a QR array implemented on a fully efficient linear systolic architecture, derived using a mapping that allows individual processors for boundary and internal cell operations. In addition, the paper highlights a number of rapid design techniques that have been used to realise this system. These include an architecture synthesis tool for quickly developing the circuit architecture and the utilisation of a library of parameterisable silicon intellectual property (IP) cores, to rapidly develop detailed silicon designs.