Floating-point exponentiation units for reconfigurable computing

The high performance and capacity of current FPGAs makes them suitable as acceleration co-processors. This article studies the implementation, for such accelerators, of the floating-point power function xy as defined by the C99 and IEEE 754-2008 standards, generalized here to arbitrary exponent and mantissa sizes. Last-bit accuracy at the smallest possible cost is obtained thanks to a careful study of the various subcomponents: a floating-point logarithm, a modified floating-point exponential, and a truncated floating-point multiplier. A parameterized architecture generator in the open-source FloPoCo project is presented in details and evaluated.

300 GHz CMOS video detection using broadband and active planar antennas

Using CMOS transistors for terahertz detection is currently a disruptive technology that offers the direct integration of a terahertz detector with video preamplifiers. The detectors are based on the resistive mixer concept and performance mainly depends on the following parameters: type of antenna, electrical parameters (gate to drain capacitor and channel length of the CMOS device) and foundry. Two different 300 GHz detectors are discussed: a single transistor detector with a broadband antenna and a differential pair driven by a resonant patch antenna.

Two design methods for radial line slot antennas with arbitrary or beam pattern

Two design procedures for Radial Line Slot Antennas (RLSAs) with circular polarization and either maximum gain or an arbitrary shaped pattern are proposed. Firstly, a method to design a RLSA with any desired pattern is presented. It is based on an optimization algorithm and some measures to ensure its fast convergence and stability need to be taken. Secondly, a fast technique to calculate the length and the position of every slot in a high gain RLSA with uniform field distribution is described. Both procedures are vali dated with the design of three antennas with different characteristics.

Reconfigurable video code (RVC) : aplicación para automatizar la asignación de procesos RUC a los núcleos de un sistema multiprocesador

El esquema actual que existe en el ámbito de la normalización y el diseño de nuevos estándares de codificación de vídeo se está convirtiendo en una tarea difícil de satisfacer la evolución y dinamismo de la comunidad de codificación de vídeo. El problema estaba centrado principalmente en poder explotar todas las características y similitudes entre los diferentes códecs y estándares de codificación. Esto ha obligado a tener que rediseñar algunas partes comunes a varios estándares de codificación. Este problema originó la aparición de una nueva iniciativa de normalización dentro del comité ISO/IEC MPEG, llamado Reconfigurable Video Coding (RVC). Su principal idea era desarrollar un estándar de codificación de vídeo que actualizase e incrementase progresivamente una biblioteca de los componentes, aportando flexibilidad y la capacidad de tener un código reconfigurable mediante el uso de un nuevo lenguaje orientado a flujo de Actores/datos denominado CAL. Este lenguaje se usa para la especificación de la biblioteca estándar y para la creación de instancias del modelo del decodificador. Más tarde, se desarrolló un nuevo estándar de codificación de vídeo denominado High Efficiency Video Coding (HEVC), que actualmente se encuentra en continuo proceso de actualización y desarrollo, que mejorase la eficiencia y compresión de la codificación de vídeo. Obviamente se ha desarrollado una visión de HEVC empleando la metodología de RVC. En este PFC, se emplean diferentes implementaciones de estándares empleando RVC. Por ejemplo mediante los decodificadores Mpeg 4 Part 2 SP y Mpeg 4 Part 10 CBP y PHP así como del nuevo estándar de codificación HEVC, resaltando las características y utilidad de cada uno de ellos. En RVC los algoritmos se describen mediante una clase de actores que intercambian flujos de datos (tokens) para realizar diferentes acciones. El objetivo de este proyecto es desarrollar un programa que, partiendo de los decodificadores anteriormente mencionados, una serie de secuencia de vídeo en diferentes formatos de compresión y una distribución estándar de los actores (para cada uno de los decodificadores), sea capaz de generar diferentes distribuciones de los actores del decodificador sobre uno o varios procesadores del sistema sobre el que se ejecuta, para conseguir la mayor eficiencia en la codificación del vídeo. La finalidad del programa desarrollado en este proyecto es la de facilitar la realización de las distribuciones de los actores sobre los núcleos del sistema, y obtener las mejores configuraciones posibles de una manera automática y eficiente. ABSTRACT. The current scheme that exists in the field of standardization and the design of new video coding standards is becoming a difficult task to meet the evolving and dynamic community of video encoding. The problem was centered mainly in order to exploit all the features and similarities between different codecs and encoding standards. This has forced redesigning some parts common to several coding standards. This problem led to the emergence of a new initiative for standardization within the ISO / IEC MPEG committee, called Reconfigurable Video Coding (RVC). His main idea was to develop a video coding standard and gradually incrementase to update a library of components, providing flexibility and the ability to have a reconfigurable code using a new flow -oriented language Actors / data called CAL. This language is used for the specification of the standard library and to the instantiation model decoder. Later, a new video coding standard called High Efficiency Video Coding (HEVC), which currently is in continuous process of updating and development, which would improve the compression efficiency and video coding is developed. Obviously has developed a vision of using the methodology HEVC RVC. In this PFC, different implementations using RVC standard are used. For example, using decoders MPEG 4 Part 2 SP and MPEG 4 Part 10 CBP and PHP and the new coding standard HEVC, highlighting the features and usefulness of each. In RVC, the algorithms are described by a class of actors that exchange streams of data (tokens) to perform different actions. The objective of this project is to develop a program that, based on the aforementioned decoders, a series of video stream in different compression formats and a standard distribution of actors (for each of the decoders), is capable of generating different distributions decoder actors on one or more processors of the system on which it runs, to achieve greater efficiency in video coding. The purpose of the program developed in this project is to facilitate the realization of the distributions of the actors on the cores of the system, and get the best possible settings automatically and efficiently.

Sensitivity analysis for active matched antennas with non-foster elements

During the last years many researchers have been working on the active matching or on non-Foster matching networks for one- and two-port electrically small antennas (ESAs). A new parameter on the sensitivity of the two-port electrically small antenna when loaded with a non-F oster network is presented. This sensitivity analysis will allow us to choose what kind of antennas can be properly matched with non-Foster networks and their position in order to optimi ze the performance of the design. Then, a typical high Q two-port antenna will be harder to match over a broad bandwidth, since |S21| is very small and only agrees with |S11| over very small frequency bands, yielding very large sensitivity values. However, for these two-port antennas, if high levels of coupling can be engineered for a high Q multiple-port antenna, the return and insertion losses can be similar over larger bandwidths and, hence, the sensitivity can be kept low over larger bandwidths, enabling broader impedance matched bandwidths to be achieved, even for highly resonant antennas.

Transmitter-side antennas correlation in SVD-assisted MIMO systems

MIMO techniques allow increasing wireless channel performance by decreasing the BER and increasing the channel throughput and in consequence are included in current mobile communication standards. MIMO techniques are based on benefiting the existence of multipath in wireless communications and the application of appropriate signal processing techniques. The singular value decomposition (SVD) is a popular signal processing technique which, based on the perfect channel state information (PCSI) knowledge at both the transmitter and receiver sides, removes inter-antenna interferences and improves channel performance. Nevertheless, the proximity of the multiple antennas at each front-end produces the so called antennas correlation effect due to the similarity of the various physical paths. In consequence, antennas correlation drops the MIMO channel performance. This investigation focuses on the analysis of a MIMO channel under transmitter-side antennas correlation conditions. First, antennas correlation is analyzed and characterized by the correlation coefficients. The analysis describes the relation between antennas correlation and the appearance of predominant layers which significantly affect the channel performance. Then, based on the SVD, pre- and post-processing is applied to remove inter-antenna interferences. Finally, bit- and power allocation strategies are applied to reach the best performance. The resulting BER reveals that antennas correlation effect diminishes the channel performance and that not necessarily all MIMO layers must be activated to obtain the best performance.

Design and demonstration of an electronically scanned reflectarray antenna at 100 GHz using multiresonant cells based on liquid crystals

The design, fabrication and measured results are presented for a reconfigurable reflectarray antenna based on liquid crystals (LC) which operates above 100 GHz. The antenna has been designed to provide beam scanning capabilities over a wide angular range, a large bandwidth and reduced Side-Lobe Level. Measured radiation patterns are in good agreement with simulations, and show that the antenna generates an electronically steerable beam in one plane over an angular range of 55º in the frequency band from 96 to 104 GHz. The Side Lobes Level is lower than -13 dB for all the scan angles and -18 dB is obtained over 16% of the scan range. The measured performance is significantly better than previously published results for this class of electronically tunable antenna, and moreover verifies the accuracy of the proposed procedure for LC modeling and antenna design.

Introduction to Special issue on Reconfigurable computing and FPGAs

During the last three decades, FPGA technology has quickly evolved to become a major subject of research in computer and electrical engineering as it has been identified as a powerful alternative for creating highly efficient computing systems. FPGA devices offer substantial performance improvements when compared against traditional processing architectures via custom design and reconfiguration capabilities.

A Transportable Reflectarray Antenna for Satellite Ku-band Emergency Communications

The design of a Ku-band reconfigurable reflectarray antenna for emergency satellite communications is presented. Bidirectional high data rate satellite links are needed in emergency conditions where other telecommunication infrastructures are not available. In order to operate in this type of scenario, an antenna should be deployable, transportable, and easily repointable. The need of an automatic and fast satellite location and pointing system leads to a completely electronic reconfigurable antenna. The operative bandwidth is from 10.7 to 12.5 GHz for reception and from 14 up to 14.5 GHz for transmission (30% of relative bandwidth). The selected antenna architecture is based on a dual reflectarray system comprising a passive subreflectarray and an active main reflectarray made of reconfigurable 1-bit elementary cells based on PIN diodes.

Reflectarray antennas for dual polarization and broadband telecom satellite applications

A reflectarray antenna with improved performance is proposed to operate in dual-polarization and transmit-receive frequencies in Ku-band for broadcast satellite applications. The reflectarray element contains two orthogonal sets of four coplanar parallel dipoles printed on two surfaces, each set combining lateral and broadside coupling. A 40-cm prototype has been designed, manufactured, and tested. The lengths of the coupled dipoles in the reflectarray cells have been optimized to produce a collimated beam in dual polarization in the transmit and receive bands. The measured radiation patterns confirm the high performance of the antenna in terms of bandwidth (27%), low losses, and low levels of cross polarization. Some preliminary simulations at 11.95 GHz for a 1.2-m antenna with South American coverage are presented to show the potential of the proposed antenna for spaceborne antennas in Ku-band.

Reconfigurable computing for Monte Carlo simulations: results and prospects of the Janus project

We describe Janus, a massively parallel FPGA-based computer optimized for the simulation of spin glasses, theoretical models for the behavior of glassy materials. FPGAs (as compared to GPUs or many-core processors) provide a complementary approach to massively parallel computing. In particular, our model problem is formulated in terms of binary variables, and floating-point operations can be (almost) completely avoided. The FPGA architecture allows us to run many independent threads with almost no latencies in memory access, thus updating up to 1024 spins per cycle. We describe Janus in detail and we summarize the physics results obtained in four years of operation of this machine; we discuss two types of physics applications: long simulations on very large systems (which try to mimic and provide understanding about the experimental non equilibrium dynamics), and low-temperature equilibrium simulations using an artificial parallel tempering dynamics. The time scale of our non-equilibrium simulations spans eleven orders of magnitude (from picoseconds to a tenth of a second). On the other hand, our equilibrium simulations are unprecedented both because of the low temperatures reached and for the large systems that we have brought to equilibrium. A finite-time scaling ansatz emerges from the detailed comparison of the two sets of simulations. Janus has made it possible to perform spin glass simulations that would take several decades on more conventional architectures. The paper ends with an assessment of the potential of possible future versions of the Janus architecture, based on state-of-the-art technology.

Analysis of the spectral response of fractal antennas related with its geometry and current paths

Fractal antennas have been proposed to improve the bandwidth of resonant structures and optical antennas. Their multiband characteristics are of interest in radiofrequency and microwave technologies. In this contribution we link the geometry of the current paths built-in the fractal antenna with the spectral response. We have seen that the actual currents owing through the structure are not limited to the portion of the fractal that should be geometrically linked with the signal. This fact strongly depends on the design of the fractal and how the different scales are arranged within the antenna. Some ideas involving materials that could actively respond to the incoming radiation could be of help to spectrally select the response of the multiband design.

Detectivity comparison of bolometric optical antennas

The practical application of optical antennas in detection devices strongly depends on its ability to produce an acceptable signal-to-noise ratio for the given task. It is known that, due to the intrinsic problems arising from its sub-wavelength dimensions, optical antennas produce very small signals. The quality of these signals depends on the involved transduction mechanism. The contribution of different types of noise should be adapted to the transducer and to the signal extraction regime. Once noise is evaluated and measured, the specific detectivity, D*, becomes the parameter of interest when comparing the performance of antenna coupled devices with other detectors. However, this parameter involves some magnitudes that can be defined in several ways for optical antennas. In this contribution we are interested in the evaluation and comparison of D_ values for several bolometric optical antennas working in the infrared and involving two materials. At the same time, some material and geometrical parameters involved in the definition of noise and detectivity will be discussed to analyze the suitability of D_ to properly account for the performance of optical antennas.

A Survey on FPGA-Based Sensor Systems: Towards Intelligent and Reconfigurable Low-Power Sensors for Computer Vision, Control and Signal Processing

The current trend in the evolution of sensor systems seeks ways to provide more accuracy and resolution, while at the same time decreasing the size and power consumption. The use of Field Programmable Gate Arrays (FPGAs) provides specific reprogrammable hardware technology that can be properly exploited to obtain a reconfigurable sensor system. This adaptation capability enables the implementation of complex applications using the partial reconfigurability at a very low-power consumption. For highly demanding tasks FPGAs have been favored due to the high efficiency provided by their architectural flexibility (parallelism, on-chip memory, etc.), reconfigurability and superb performance in the development of algorithms. FPGAs have improved the performance of sensor systems and have triggered a clear increase in their use in new fields of application. A new generation of smarter, reconfigurable and lower power consumption sensors is being developed in Spain based on FPGAs. In this paper, a review of these developments is presented, describing as well the FPGA technologies employed by the different research groups and providing an overview of future research within this field.

An Electronic Reconfigurable Neural Architecture for Intrusion Detection

The explosive growth of the traffic in computer systems has made it clear that traditional control techniques are not adequate to provide the system users fast access to network resources and prevent unfair uses. In this paper, we present a reconfigurable digital hardware implementation of a specific neural model for intrusion detection. It uses a specific vector of characterization of the network packages (intrusion vector) which is starting from information obtained during the access intent. This vector will be treated by the system. Our approach is adaptative and to detecting these intrusions by using a complex artificial intelligence method known as multilayer perceptron. The implementation have been developed and tested into a reconfigurable hardware (FPGA) for embedded systems. Finally, the Intrusion detection system was tested in a real-world simulation to gauge its effectiveness and real-time response.