Digital control system programming from process control diagrams

A graphical process control language has been developed as a means of defining process control software. The user configures a block diagram describing the required control system, from a menu of functional blocks, using a graphics software system with graphics terminal. Additions may be made to the menu of functional blocks, to extend the system capability, and a group of blocks may be defined as a composite block. This latter feature provides for segmentation of the overall system diagram and the repeated use of the same group of blocks within the system. The completed diagram is analyzed by a graphics compiler which generates the programs and data structure to realise the run-time software. The run-time software has been designed as a data-driven system which allows for modifications at the run-time level in both parameters and system configuration. Data structures have been specified to ensure efficient execution and minimal storage requirements in the final control software. Machine independence has been accomodated as far as possible using CORAL 66 as the high level language throughout the entire system; the final run-time code being generated by a CORAL 66 compiler appropriate to the target processor.

Flow field analysis of some mixing and conveying screw element regions, within a closely intermeshing, co-rotating twin-screw extruder.

Grafting of antioxidants and other modifiers onto polymers by reactive extrusion, has been performed successfully by the Polymer Processing and Performance Group at Aston University. Traditionally the optimum conditions for the grafting process have been established within a Brabender internal mixer. Transfer of this batch process to a continuous processor, such as an extruder, has, typically, been empirical. To have more confidence in the success of direct transfer of the process requires knowledge of, and comparison between, residence times, mixing intensities, shear rates and flow regimes in the internal mixer and in the continuous processor.The continuous processor chosen for the current work in the closely intermeshing, co-rotating twin-screw extruder (CICo-TSE). CICo-TSEs contain screw elements that convey material with a self-wiping action and are widely used for polymer compounding and blending. Of the different mixing modules contained within the CICo-TSE, the trilobal elements, which impose intensive mixing, and the mixing discs, which impose extensive mixing, are of importance when establishing the intensity of mixing. In this thesis, the flow patterns within the various regions of the single-flighted conveying screw elements and within both the trilobal element and mixing disc zones of a Betol BTS40 CICo-TSE, have been modelled using the computational fluid dynamics package Polyflow. A major obstacle encountered when solving the flow problem within all of these sets of elements, arises from both the complex geometry and the time-dependent flow boundaries as the elements rotate about their fixed axes. Simulation of the time dependent boundaries was overcome by selecting a number of sequential 2D and 3D geometries, used to represent partial mixing cycles. The flow fields were simulated using the ideal rheological properties of polypropylene and characterised in terms of velocity vectors, shear stresses generated and a parameter known as the mixing efficiency. The majority of the large 3D simulations were performed on the Cray J90 supercomputer situated at the Rutherford-Appleton laboratories, with pre- and postprocessing operations achieved via a Silicon Graphics Indy workstation. A mechanical model was constructed consisting of various CICo-TSE elements rotating within a transparent outer barrel. A technique has been developed using coloured viscous clays whereby the flow patterns and mixing characteristics within the CICo-TSE may be visualised. In order to test and verify the simulated predictions, the patterns observed within the mechanical model were compared with the flow patterns predicted by the computational model. The flow patterns within the single-flighted conveying screw elements in particular, showed good agreement between the experimental and simulated results.

Computer aided design and manufacture for three dimensional milling

Advances in both computer technology and the necessary mathematical models capable of capturing the geometry of arbitarily shaped objects has led to the development in this thesis of a surface generation package called 'IBSCURF' aimed at providing a more economically viable solution to free-form surface manufacture. A suit of computer programs written in FORTRAN 77 has been developed to provide computer aids for every aspect of work in designing and machining free-form surfaces. A vector-valued parametric method was used for shape description and a lofting technique employed for the construction of the surface. The development of the package 'IBSCURF' consists of two phases. The first deals with CAD. The design process commences in defining the cross-sections which are represented by uniform B-spline curves as approximations to give polygons. The order of the curve and the position and number of the polygon vertices can be used as parameters for the modification to achieve the required curves. When the definitions of the sectional curves is complete, the surface is interpolated over them by cubic cardinal splines. To use the CAD function of the package to design a mould for a plastic handle, a mathematical model was developed. To facilitate the integration of design and machining using the mathematical representation of the surface, the second phase of the package is concerned with CAM which enables the generation of tool offset positions for ball-nosed cutters and a general post-processor has been developed which automatically generates NC tape programs for any CNC milling machine. The two phases of these programs have been successfully implemented, as a CAD/CAM package for free-form surfaces on the VAX 11/750 super-minicomputer with graphics facilities for displaying drawings interactively on the terminal screen. The development of this package has been beneficial in all aspects of design and machining of free form surfaces.

Computer integrated system for form-roll manufacture

Computer integrated manufacture has brought about great advances in manufacturing technology and its recognition is world wide. Cold roll forming of thin-walled sections, and in particular the design and manufacture of form-rolls, the special tooling used in the cold roll forming process, is but one such area where computer integrated manufacture can make a positive contribution. The work reported in this thesis, concerned with the development of an integrated manufacturing system for assisting the design and manufacture of form-rolls, was undertaken in collaboration with a leading manufacturer of thin-walled sections. A suit of computer programs, written in FORTRAN 77, have been developed to provide computer aids for every aspect of work in form-roll design and manufacture including cost estimation and stock control aids. The first phase of the development programme dealt with the establishment of CAD facilities for form-roll design, comprising the design of the finished section, the flower pattern, the roll design and the interactive roll editor program. Concerning the CAM facilities, dealt with in the second phase, an expert system roll machining processor and a general post-processor have been developed for considering the roll geometry and automatically generating NC tape programs for any required CNC lathe system. These programs have been successfully implemented, as an integrated manufacturing software system, on the VAX 11/750 super-minicomputer with graphics facilities for displaying drawings interactively on the terminal screen. The development of the integrated system has been found beneficial in all aspects of form-roll design and manufacture. Design and manufacturing lead times have been reduced by several weeks, quality has improved considerably and productivity has increased. The work has also demonstrated the promising nature of the expert systems approach to computer integrated manufacture.

Improved design of all-optical processor for modular arithmetic

A new improved design of an all-optical processor that performs modular arithmetic is presented. The modulo-processor is based on all-optical circuit of interconnected semiconductor optical amplifier logic gates. The design allows processing times of less than 1 µs for 16-bit operation at 10 Gb/s and up to 32-bit operation at 100 Gb/s.

Processing and rendering of Fourier domain optical coherence tomography images at a line rate over 524 kHz using a graphics processing unit

In Fourier domain optical coherence tomography (FD-OCT), a large amount of interference data needs to be resampled from the wavelength domain to the wavenumber domain prior to Fourier transformation. We present an approach to optimize this data processing, using a graphics processing unit (GPU) and parallel processing algorithms. We demonstrate an increased processing and rendering rate over that previously reported by using GPU paged memory to render data in the GPU rather than copying back to the CPU. This avoids unnecessary and slow data transfer, enabling a processing and display rate of well over 524,000 A-scan/s for a single frame. To the best of our knowledge this is the fastest processing demonstrated to date and the first time that FD-OCT processing and rendering has been demonstrated entirely on a GPU.

Design of a multi-processor control systems

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Design and analysis of an all-optical processor for modular arithmetic

We present a logical design of an all-optical processor that performs modular arithmetic. The overall design is based a set of interconnected modules that use all-optical gates to perform simple logical functions. The all-optical logic gates are based on the semiconductor optical amplifier nonlinear loop. Simulation results are presented and some practical design issues are discussed.

Design of fast core node processor for packet forwarding without header modification in optical networks

We present a design of a fast all-optical core-node processor that performs packet-forwarding in optical networks without header-modification. The design is based on bit-serial architecture using TOADs as logic-gates that perform modulo-arithmetic to forward packets.

Networks of Evolutionary Processors: Java Implementation of a Threaded Processor

This paper is focused on a parallel JAVA implementation of a processor defined in a Network of Evolutionary Processors. Processor description is based on JDom, which provides a complete, Java-based solution for accessing, manipulating, and outputting XML data from Java code. Communication among different processor to obtain a fully functional simulation of a Network of Evolutionary Processors will be treated in future. A safe-thread model of processors performs all parallel operations such as rules and filters. A non-deterministic behavior of processors is achieved with a thread for each rule and for each filter (input and output). Different results of a processor evolution are shown.

Using Problems to Introduce some Tools and Technologies for Implementation of Graphics and Animation in C#

This paper is devoted to the learning of event programming by using Visual C# in specialized training in Informatics in high schools. Some basic tools and technologies for the implementation of graphics and animation in C# are discussed. Two example problems are proposed.

Interactive 3D Visualization of Bézier Curves using Java Open Graphics Library (JOGL)

We present a new program tool for interactive 3D visualization of some fundamental algorithms for representation and manipulation of Bézier curves. The program tool has an option for demonstration of one of their most important applications - in graphic design for creating letters by means of cubic Bézier curves. We use Java applet and JOGL as our main visualization techniques. This choice ensures the platform independency of the created applet and contributes to the realistic 3D visualization. The applet provides basic knowledge on the Bézier curves and is appropriate for illustrative and educational purposes. Experimental results are included.

Evaluating the SEE sensitivity of a 45nm SOI Multi-core Processor due to 14 MeV Neutrons

The aim of this work is to evaluate the SEE sensitivity of a multi-core processor having implemented ECC and parity in their cache memories. Two different application scenarios are studied. The first one configures the multi-core in Asymmetric Multi-Processing mode running a memory-bound application, whereas the second one uses the Symmetric Multi-Processsing mode running a CPU-bound application. The experiments were validated through radiation ground testing performed with 14 MeV neutrons on the Freescale P2041 multi-core manufactured in 45nm SOI technology. A deep analysis of the observed errors in cache memories was carried-out in order to reveal vulnerabilities in the cache protection mechanisms. Critical zones like tag addresses were affected during the experiments. In addition, the results show that the sensitivity strongly depends on the application and the multi-processsing mode used.