ROAZ and ROAZ II Autonomous Surface Vehicle Design and Implementation

International Lifesaving Congress 2007, La Coruna, Spain, December, 2007

Design of a tool to study the fate of Chlamydia trachomatis infected cells

Chlamydia trachomatis has a unique obligate intracellular developmental cycle that ends by the lysis of the cell and/or the extrusion of the bacteria in order to allow for re-infections. While Chlamydia trachomatis infections are often asymptomatic the diagnosis of Chlamydia trachomatis is usually late, occurring after manifestation of persistency. Investigations on the consequences of long-term infections and the molecular mechanisms behind it will reveal light to what extent bacteria can modulate host cell function and what the ultimate fate of host cells after clearance of an infection is. Such studies on the host cell fate could be greatly facilitated if the infected cells become permanently marked during and after the infection. Therefore, this project intends to develop a new genetic tool that would allow permanently labeling of Chlamydia trachomatis host cells. The plan was to generate a Chlamydia trachomatis strain that encodes a recombinant CRE recombinase, fused to a secretory effector function of the Chlamydia type 3 secretion system (T3SS). Upon translocation into the host cell, this recombinant CRE enzyme could then, owing to its site-specific recombination function, switch a reporter gene contained in the host cell genome. To this end, the reporter line carried a membrane-tagged tdTomato (mT) gene flanked by two LoxP sequences followed by a GFP gene. The translocation of the recombinant CRE recombinase into this cell line was designed to trigger the recombination of the LoxP sites whereby the cells would turn from red fluorescence to green as an irreversible label of the infected cells. Successful execution of this mechanism would allow to draw a direct link between Chlamydia trachomatis infection and the subsequent fate of the infected cell.

Object-oriented inheritance of statecharts for control applications

This paper discusses how object-oriented iuheritance can be re-interpreted if statecharts are used for modelling the dynamic behaviour of an object. The support of inheritance of statecharts allows the improvement of systems' development by easing the reutilization of parts of already developed euccessful systems, aad by promoting the iterative and continuous models' refinement advocated by the operatioaal approach. Statechart is the formalism used within UML to specify reactive state.based behaviours. This paper covers the use of statecharts within the modelling of embedded systems for industrial control applxications, where performance and memory usage are main concerns.

Investigation into the feasibility of a West of Ireland Pumped Storage System

Ireland’s remote position on the tip of Europe ensures that the country is vulnerable to uncertainty of supply. The reliance on conventional sources of electricity has ensured that escalated prices and high carbon emissions have been witnessed whilst opportunities that inherent resources provide, such as the wind, have not been capitalised upon. The intermittent nature of the wind make it difficult to maximise its potential as in many cases the highest wind speeds are highest when demand is low. The West of Ireland’s combination of wind speeds and unique topography makes it suitable for and innovative wind powered pumped storage system, which can essentially regulate the wind generated electricity and integrate further penetration of renewable energy. In addition, its location along the Atlantic Ocean provides further scope for innovation as seawater can be integrated into the system design. The construction of such an unprecedented project in combination with increased interconnectors has the potential to make Ireland a rechargeable battery for Europe. However, such ambitious plans are at the very early stages and are in direct contrast to current events in the Irish energy market. This study focuses on the feasibility of West of Ireland pumped storage systems. Entailed within this is an extensive desk study, a detailed site selection process and a feasibility study of grid connection. To increase opportunities to identify the best possible site, the feasibility study was focused on the Galway and Mayo areas solely.

Disseny d'un cronòmetre i d'un freqüencímetre integrats en un NIOS controlats sobre μClinux

El projecte que es presenta permet analitzar els avantatges i inconvenients d’una programació orientada a hardware i d’una programació orientada a software a partir del desenvolupament de dos dissenys, un cronòmetre i un freqüencímetre en cadascun dels modes de programació. Donat que en les dues aplicacions es requereix alta precisió de temps (μs) i flexibilitat en el control, la solució final que es proposa és un disseny “mixt” amb dos mòduls hardware específics (cronòmetre i freqüencímetre) integrats en un NIOS/CPU sobre una FPGA. Els dos mòduls es controlen per software sobre un sistema Linux empotrat (μCLinux).

Dynamic bandwidth management as part of an integrated network management system based on distributed agents

We present a system for dynamic network resource configuration in environments with bandwidth reservation and path restoration mechanisms. Our focus is on the dynamic bandwidth management results, although the main goal of the system is the integration of the different mechanisms that manage the reserved paths (bandwidth, restoration, and spare capacity planning). The objective is to avoid conflicts between these mechanisms. The system is able to dynamically manage a logical network such as a virtual path network in ATM or a label switch path network in MPLS. This system has been designed to be modular in the sense that in can be activated or deactivated, and it can be applied only in a sub-network. The system design and implementation is based on a multi-agent system (MAS). We also included details of its architecture and implementation

Performance evaluation of MPEG-4 Video encoder on Adres

Actualment un típic embedded system (ex. telèfon mòbil) requereix alta qualitat per portar a terme tasques com codificar/descodificar a temps real; han de consumir poc energia per funcionar hores o dies utilitzant bateries lleugeres; han de ser el suficientment flexibles per integrar múltiples aplicacions i estàndards en un sol aparell; han de ser dissenyats i verificats en un període de temps curt tot i l’augment de la complexitat. Els dissenyadors lluiten contra aquestes adversitats, que demanen noves innovacions en arquitectures i metodologies de disseny. Coarse-grained reconfigurable architectures (CGRAs) estan emergent com a candidats potencials per superar totes aquestes dificultats. Diferents tipus d’arquitectures han estat presentades en els últims anys. L’alta granularitat redueix molt el retard, l’àrea, el consum i el temps de configuració comparant amb les FPGAs. D’altra banda, en comparació amb els tradicionals processadors coarse-grained programables, els alts recursos computacionals els permet d’assolir un alt nivell de paral•lelisme i eficiència. No obstant, els CGRAs existents no estant sent aplicats principalment per les grans dificultats en la programació per arquitectures complexes. ADRES és una nova CGRA dissenyada per I’Interuniversity Micro-Electronics Center (IMEC). Combina un processador very-long instruction word (VLIW) i un coarse-grained array per tenir dues opcions diferents en un mateix dispositiu físic. Entre els seus avantatges destaquen l’alta qualitat, poca redundància en les comunicacions i la facilitat de programació. Finalment ADRES és un patró enlloc d’una arquitectura concreta. Amb l’ajuda del compilador DRESC (Dynamically Reconfigurable Embedded System Compile), és possible trobar millors arquitectures o arquitectures específiques segons l’aplicació. Aquest treball presenta la implementació d’un codificador MPEG-4 per l’ADRES. Mostra l’evolució del codi per obtenir una bona implementació per una arquitectura donada. També es presenten les característiques principals d’ADRES i el seu compilador (DRESC). Els objectius són de reduir al màxim el nombre de cicles (temps) per implementar el codificador de MPEG-4 i veure les diferents dificultats de treballar en l’entorn ADRES. Els resultats mostren que els cícles es redueixen en un 67% comparant el codi inicial i final en el mode VLIW i un 84% comparant el codi inicial en VLIW i el final en mode CGA.

Design of Optical Systems With Extended Depth of Field: an Educational Approach to Wavefront Coding Techniques

A practical activity designed to introduce wavefront coding techniques as a method to extend the depth of field in optical systems is presented. The activity is suitable for advanced undergraduate students since it combines different topics in optical engineering such as optical system design, aberration theory, Fourier optics, and digital image processing. This paper provides the theoretical background and technical information for performing the experiment. The proposed activity requires students able to develop a wide range of skills since they are expected to deal with optical components, including spatial light modulators, and develop scripts to perform some calculations.

A Computer Based Information System for County Equipment Cost Records, Interim Report, HR-173, 1975

This report describes the work accomplished to date on research project HR-173, A Computer Based Information System for County Equipment Cost Records, and presents the initial design for this system. The specific topics discussed here are findings from the analysis of information needs, the system specifications developed from these findings, and the proposed system design based upon the system specifications. The initial system design will include tentative input designs for capturing input data, output designs to show the output formats and the items to be output for use in decision making, file design showing the organization of information to be kept on each piece of equipment in the computer data file, and general system design explaining how the entire system will operate. The Steering Committee appointed by Iowa Highway Research Board is asked to study this report, make appropriate suggestions, and give approval to the proposed design subject to any suggestions made. This approval will permit the designer to proceed promptly with the development of the computer program implementation phase of the design.

Attachment of Combination Rails to Concrete Parapets Utilizing Epoxy Adhesive Anchors, RPFP-IOWA-1, 2015

The Iowa Department of Transportation (IaDOT) was interested in investigating the use of epoxy adhesive anchorages for the attachment of posts used in the BR27C combination bridge rail system. Alternative anchorage concepts were developed using a modified version of the ACI 318-11 procedures for embedded anchor design. Four design concepts were developed for review by IaDOT, including: (1) a four-bolt square anchorage, (2) a four-bolt spread anchorage, (3) a twobolt centered anchorage, and (4) a two-bolt offset anchorage. IaDOT representatives selected the four-bolt spread anchorage and the two-bolt offset anchorage as the preferred designs for evaluation. In addition to these two proposed configurations, IaDOT also requested that the researchers evaluate a third option that had been previously installed on the US-20 bridge near Hardin, IA. The proposed alternative anchorages and the original cast-in-place anchorage for the BR27C combination bridge rail were evaluated through dynamic component testing. The test of the original cast-in-place anchorage was used a baseline for comparison with the alternative designs. Test no. IBP-1 of the original cast-in-place anchorage developed a peak load of 22.9 kips (101.9 kN) at a deflection of 1.5 in. (38 mm). All three of the tested alternative anchorages provided greater load capacity than the original cast-in-place design and were deemed acceptable surrogates. Of the three alternative designs, the two-bolt offset design was deemed the best option.

Embedded Monitoring Server

This study investigates, designs, and implements an inexpensive application that allows local and remote monitoring of a home. The application consists of an array of sensors for monitoring different conditions in a home environment and also for accessing the devices that might be connected to the system. Only a few sensors are initially involved in this study and information about the temperature level, forced entry detection, smoke and water leakage detection can be obtained at any time from any location with an Internet connection. The application software (coded in C language) runs on an embedded system which is basically a wireless Linksys router running on a GNU/Linux based firmware for embedded systems. Interaction between the sensors and the application software is achieved through an implemented sensor interfacing circuit. The communication with the sensor interfacing unit is done through the serial port, and accessibility of the connected sensors is achieved through a telnet client. The sensors can be accessed from local and remote locations with the sensors giving reliable information. The resulting application shows that it is possible to use the router for other applications other than what it is intended for.

DFMA- Analysis and Aspects of Applying Internet Based Collaborative Design for Axial Eccentric Oil-Pump Design

The integrated system of design for manufacturing and assembly (DFMA) and internet based collaborative design are presented to support product design, manufacturing process, and assembly planning for axial eccentric oil-pump design. The presented system manages and schedules group oriented collaborative activities. The design guidelines of internet based collaborative design & DFMA are expressed. The components and the manufacturing stages of axial eccentric oil-pump are expressed in detail. The file formats of the presented system include the data types of collaborative design of the product, assembly design, assembly planning and assembly system design. Product design and assembly planning can be operated synchronously and intelligently and they are integrated under the condition of internet based collaborative design and DFMA. The technologies of collaborative modelling, collaborative manufacturing, and internet based collaborative assembly for the specific pump construction are developed. A seven-security level is presented to ensure the security of the internet based collaborative design system.

Taajuusmuuttajan ohjelmiston testaus

Tämän diplomityön tavoitteena oli kehittää menetelmiä ja ohjeitataajuusmuuttajan sulautetun ohjelmiston kehityksen aikaiseen testaukseen. Soveltuvia menetelmiä etsittiin tutkimalla laajasti kirjallisuutta sekä selvittämälläyrityksen testauskäytäntöä. Tutkittuja kirjallisuudesta löytyneitä menetelmä olivat testauskehykset, simulointi ja staattinen sekä automaattinen testaus. Kirjallisuudesta etsittiin myös menetelmiä, joiden avulla testausprosessia voidaan helpottaa tai muuten parantaa. Tällaisista menetelmistä tutkittiin muun muassa testidatan valintaa, testauslähtöistä kehitystä sekä testattavuuden parantamista. Lisäksi selvitettiin uudelleenkäytettävien testien ohjelmointiin soveltuvia ohjelmointikieliä. Haastatteluiden ja dokumentaation avulla saatiin hyvä käsitys yrityksessä vallitsevasta testauskäytännöstä sekä sen ongelmakohdista. Testauksen ongelmiksi havaittiin testausprosessin järjestelmällisyyden puute sekä tarve suunnittelijoiden testauskoulutukseen. Testausprosessin parantamiseksi esitetään moduulitestauskehyksen käyttöönottoa. Lisäksi suunnittelijoiden testauskoulutuksella arvioidaan olevan suuri vaikutus koko testausprosessiin. Testitapausten suunnitteluun esitetään menetelmiä, joiden avulla voidaan suunnitella kattavampia testejä.

Software Security Design and Testing

Elektroninen kaupankäynti ja pankkipalvelut ovat herättäneet toiminnan jatkuvuuden kannalta erittäin kriittisen kysymyksen siitä, kuinka näitä palveluja pystytään suojaamaan järjestäytynyttä rikollisuutta ja erilaisia hyväksikäyttöjä vastaan.

Performance evaluation of MPEG-4 Video encoder on Adres

Actualment un típic embedded system (ex. telèfon mòbil) requereix alta qualitat per portar a terme tasques com codificar/descodificar a temps real; han de consumir poc energia per funcionar hores o dies utilitzant bateries lleugeres; han de ser el suficientment flexibles per integrar múltiples aplicacions i estàndards en un sol aparell; han de ser dissenyats i verificats en un període de temps curt tot i l’augment de la complexitat. Els dissenyadors lluiten contra aquestes adversitats, que demanen noves innovacions en arquitectures i metodologies de disseny. Coarse-grained reconfigurable architectures (CGRAs) estan emergent com a candidats potencials per superar totes aquestes dificultats. Diferents tipus d’arquitectures han estat presentades en els últims anys. L’alta granularitat redueix molt el retard, l’àrea, el consum i el temps de configuració comparant amb les FPGAs. D’altra banda, en comparació amb els tradicionals processadors coarse-grained programables, els alts recursos computacionals els permet d’assolir un alt nivell de paral•lelisme i eficiència. No obstant, els CGRAs existents no estant sent aplicats principalment per les grans dificultats en la programació per arquitectures complexes. ADRES és una nova CGRA dissenyada per I’Interuniversity Micro-Electronics Center (IMEC). Combina un processador very-long instruction word (VLIW) i un coarse-grained array per tenir dues opcions diferents en un mateix dispositiu físic. Entre els seus avantatges destaquen l’alta qualitat, poca redundància en les comunicacions i la facilitat de programació. Finalment ADRES és un patró enlloc d’una arquitectura concreta. Amb l’ajuda del compilador DRESC (Dynamically Reconfigurable Embedded System Compile), és possible trobar millors arquitectures o arquitectures específiques segons l’aplicació. Aquest treball presenta la implementació d’un codificador MPEG-4 per l’ADRES. Mostra l’evolució del codi per obtenir una bona implementació per una arquitectura donada. També es presenten les característiques principals d’ADRES i el seu compilador (DRESC). Els objectius són de reduir al màxim el nombre de cicles (temps) per implementar el codificador de MPEG-4 i veure les diferents dificultats de treballar en l’entorn ADRES. Els resultats mostren que els cícles es redueixen en un 67% comparant el codi inicial i final en el mode VLIW i un 84% comparant el codi inicial en VLIW i el final en mode CGA.