NUMERICAL AND EXPERIMENTAL STUDY ON LIQUID-SOLID FLOW IN A HYDROCYCLONE

Hydrocyclones are widely used in industry, of which the geometrical design using CFD techniques is gaining more popularity in recent years. In this study, the Euler-Euler approach and the Reynolds stress model are applied to simulate the liquid-solid flowfield in a hydrocyclone. The methodology is validated by a good agreement between experimental data and numerical results. Within the research range, the simulation indicates that the liquid-solid separation mainly occurs in the conical segment, and increasing conical height or decreasing cylindrical height helps to improve the grade efficiencies of solid particles. Based on these results, two of the same hydrocyclones are designed and installed in series to establish a liquid-solid separation system. Many experiments are then conducted under different conditions, in which the effects of the water cut and the second hydrocyclone on the separation are investigated. The results also confirm that smaller solid particles are more susceptible to the inlet conditions, and the second hydrocyclone plays a more important role as the water cut reduces.

Marco-reloj-despertador basado en FPGA

Gordon E. Moore, cofundador de Intel, predijo en una publicación del año 1965 que aproximadamente cada dos años se duplicaría el número de transistores presentes en un circuito integrado, debido a las cada vez mejores tecnologías presentes en el proceso de elaboración [1]. A esta ley se la conoce como Ley de Moore y su cumplimiento se ha podido constatar hasta hoy en día. Gracias a ello, con el paso del tiempo cada vez se presentan en el mercado circuitos integrados más potentes, con mayores prestaciones para realizar tareas cada vez más complejas. Un tipo de circuitos integrados que han podido evolucionar de forma importante son los dispositivos de lógica programable, circuitos integrados que permiten implementar sobre ellos las funciones lógicas deseadas. Hasta hace no muchos años, dichos dispositivos eran capaces de incorporar circuitos compuestos por unas pocas funciones lógicas, pero gracias al proceso de miniaturización predicho por la Ley de Moore, hoy en día son capaces de implementar circuitos tan complejos como puede ser un microprocesador; dichos dispositivos reciben el nombre de FPGA, siglas de Field Programmable Gate Array. El presente proyecto tiene como objetivo construir un marco de fotos digital con reloj y despertador programable, valiéndose para ello de la FPGA Cyclone II de Altera y una pantalla táctil de la casa Terasic. Con este fin, se documentará en primera instancia los dispositivos a utilizar con sus características y posibilidades que plantean, para pasar posteriormente al diseño de la aplicación y su implementación e integración en la placa para comprobar su correcto funcionamiento.

Generación automática de VHDL mediante Simulink HDL coder y aplicación al procesado de señales

Gordon E. Moore, co-fundador de Intel, predijo en una publicación del año 1965 que aproximadamente cada dos años se duplicaría el número de transistores presentes en un circuito integrado, debido a las cada vez mejores tecnologías presentes en el proceso de elaboración. A esta ley se la conoce como Ley de Moore y su cumplimiento se ha podido constatar hasta hoy en día. Gracias a ello, con el paso del tiempo cada vez se presentan en el mercado circuitos integrados más potentes, con mayores prestaciones para realizar tareas cada vez más complejas. Un tipo de circuitos integrados que han podido evolucionar de forma importante por dicho motivo, son los dispositivos de lógica programable, circuitos integrados que permiten implementar sobre ellos las funciones lógicas que desee implementar el usuario. Hasta hace no muchos años, dichos dispositivos eran capaces de implementar circuitos compuestos por unas pocas funciones lógicas, pero gracias al proceso de miniaturización predicho por la Ley de Moore, hoy en día son capaces de implementar circuitos tan complejos como puede ser un microprocesador; dichos dispositivos reciben el nombre de FPGA, siglas de Field Programmable Gate Array. Debido a la mayor capacidad y por lo tanto a diseños más complejos implementados sobre las FPGA, en los últimos años han aparecido herramientas cuyo objetivo es hacer más fácil el proceso de ingeniería dentro de un desarrollo en este tipo de dispositivos, como es la herramienta HDL Coder de la compañía MathWorks, creadores también Matlab y Simulink, unas potentes herramientas usadas ampliamente en diferentes ramas de la ingeniería. El presente proyecto tiene como objetivo evaluar el uso de dicha herramienta para el procesado digital de señales, usando para ello una FPGA Cyclone II de la casa Altera. Para ello, se empezará analizando la herramienta escogida comparándola con herramientas de la misma índole, para a continuación seleccionar una aplicación de procesado digital de señal a implementar. Tras diseñar e implementar la aplicación escogida, se deberá simular en PC para finalmente integrarla en la placa de evaluación seleccionada y comprobar su correcto funcionamiento. Tras analizar los resultados de la aplicación de implementada, concretamente un analizador de la frecuencia fundamental de una señal de audio, se ha comprobado que la herramienta HDL Coder, es adecuada para este tipo de desarrollos, facilitando enormemente los procesos tanto de implementación como de validación gracias al mayor nivel de abstracción que aporta.

Stimulating investment in pearl farming in Solomon Islands: Final report

The overall objective of the project is the reduction of poverty in rural areas of Solomon Islands through creation of livelihoods based on sustainable aquaculture. This fits within the over-arching goals of the WorldFish Center in the Pacific to reduce poverty and hunger in rural communities, and with the Ministry of Fisheries and Marine Resources (MFMR) to stimulate rural development and to develop aquaculture. It has been recognised that the nature of the pearl farming industry means that a high chance of success requires a long term investment from an established pearl farming organisation. This project has been specifically designed to compile the elements of a pre-feasibility study to provide offshore pearl companies with sufficient information to investigate the potential for long-term investment in pearl farming in Solomon Islands. This report also includes the following 6 appendices: Appendix I) Past research and development on black-lip pearl oysters in Solomon Islands; Appendix II) Suitability of habitats in the Solomon Islands and other regions of the Pacific for growth of black-lip and silver-lip pearl oysters; Appendix III) Water temperature and cyclone frequency in the Solomon Islands and other key regions of the Pacific: implications for pearl farming; Appendix IV) Abundance, size structure and quality of silver-lip pearl oysters in Solomon Islands; Appendix V) Solomon Islands: the investment climate for pearl farming; Appendix VI) Pearl farming policy and management guidelines.

The use of otolith morphology to indicate the stock structure of common coral trout (Plectropomus leopardus) on the Great Barrier Reef, Australia

We investigated the use of otolith morphology to indicate the stock structure of an exploited serranid coral reef fish, Plectropomus leopardus, on the Great Barrier Reef (GBR), Australia. Otoliths were measured by traditional one-and two-dimensional measures (otolith length, width, area, perimeter, circularity, and rectangularity), as well as by Fourier analysis to capture the finer details of otolith shape. Variables were compared among four regions of the GBR separated by hundreds of kilometers, as well as among three reefs within each region, hundreds of meters to tens of kilometers apart. The temporal stability in otolith structure was examined by comparing two cohorts of fully recruited four-year-old P. leopardus collected two years before and two years after a signif icant disturbance in the southern parts of the GBR caused by a large tropical cyclone in March 1997. Results indicated the presence of at least two stocks of P. leopardus, although the structure of each stock varied depending on the cohort considered. The results highlight the importance of incorporating data from several years in studies using otolith morphology to discriminate temporary and possibly misleading signals from those that indicate persistent spatial structure in stocks. We conclude that otolith morphology can be used as an initial step to direct further research on groups of P. leopardus that have lived at least a part of their life in different environments.

柱型旋流器内单相流场压降的实验研究

对新型油水分离器关键装置柱型旋流器进行了性能实验研究,得到了压降,压降比与进口流量和溢流比之间的关系.结果表明,柱型旋流器内压降随着流量的增大而增大,呈抛物线型增长;压降比与溢流比之间呈线性关系.给出了计算旋流器压降的经验关系式.这些结果对柱型旋流器的设计运行和操作控制有着重要的指导作用,目前已用于南海平台油水分离器的现场实验

用VHDL实现的23位快速浮点数加减法器

With the development of LSI, FPGA/CPLD has been used more and more in the fields of digital signal processing and au-tocontrol and so on. And with the development of the techniques of digital processing, for fitting the system’s function, it should be a higher requirement to speed and used-resource to compute the floating point numbers. The author introduces a high speed adder-subtracter of the 23 bit’s floating point numbers, which is carried out with the parallel arithmetic and the computational speed cou...中文文摘：随着大规模集成电路的不断发展,FPGA/CPLD在数字信号处理、自动控制等方面得到了越来越多的应用。并且伴随着数字化处理技术的不断发展,为满足系统功能的要求,对浮点数运算的速度以及相应占用的资源也就提出了更高的要求。笔者即介绍了以VHDL语言为基础,采用并行算法且计算速度达到33MHz的,对23位标准浮点数实现的高速浮点加减法运算器,并以Cyclone II芯片EP2C20F484为硬件环境,最终进行时序模拟仿真,从而验证该浮点加减法器的正确性和快速特性。

基于Nios-Ⅱ用于加速器监控系统的通用型可重配置嵌入式微控制器

FPGA and dedicated micro-controller chips are widely used in HIRFL-CSR monitor and control systems.This paper discusses the characteristics of HIRFL-CSR s dedicated micro-controllers and it s requirement for micro-controllers. Using programmable technology and Nios-Ⅱ processor,we have designed and implemented a reconfigurable embedded micro(controller in altera cycloneⅡ2c35f484 FPGA. The micro-controller which has low hardware cost and 185 MHz maximum operating frequency can replace the dedicated micro-cont...中文文摘：讨论并参考了冷却储存环目前使用的专用微控制器的特点和其对微控制器的需求,采用可编程技术和Nios-Ⅱ处理器,在altera-cycloneII2c35f484芯片内实现可重构微控制器。该微控制器硬件资源消耗少,最大工作频率可达185MHz,可代替目前在监控系统中大量使用的专用微控制器芯片,减小硬件设计复杂度、节约成本。

HIRFL-CSR电源数字控制系统硬件平台设计

论述用于兰州重离子加速器冷却存储环(HIRFL-CSR)磁铁电源控制系统的数字控制系统硬件平台设计。该系统基于1mmBGA封装的ALTER corporation的cycloneⅢFPGA芯片,嵌入运行数字调节器软件算法,满足了针对具体被控对象参数要求的调节控制。用ARM(Advanced RISC Machines)作调节控制系统的核心处理器,完成系统的多线程任务处理;同时嵌入千兆光纤接口,实现外接DSP板处理数据的直接传输,提高了系统的实时性。该硬件平台实现了HIRFL-CSR电源系统的稳定、可靠和实时控制。

Responses of summertime extreme wave heights to local climate variations in the East China Sea

We detected the responses of summertime extreme wave heights (H-top10, average of the highest 10% of significant wave heights in June, July and August) to local climate variations in the East China Sea by applying an empirical orthogonal function analysis to Htop10 derived from the WAVEWATCH- III wave model driven by 6 hourly sea surface wind fields from ERA-40 reanalysis over the period 1958-2002. Decreases in H-top10 in the northern East China Sea ( Yellow Sea) correspond to attenuation of the East Asian Summer Monsoon, while increases in the south are primarily due to enhancement of tropical cyclone activities in the western North Pacific.

Role of snow depth in spring of Tibetan Plateau in onset of South China Sea summer monsoon

The role of snow depth of Tibetan Plateau in the onset of South China Sea summer monsoon and the influence of ENSO on snow depth of Tibetan Plateau are investigated with use of data from ECMWF reanalysis and NCEP/NCAR reanalysis. The results are as follows: (1) The snow depth data from ECMWF reanalysis are tested and reliable, and can be used to study the influence of snow depth of Tibetan Plateau on the onset of South China Sea summer monsoon; (2) Anomaly of snow depth of Tibetan Plateau causes anomaly in air temperature and its contrast between the Indian Ocean and the continent resulting in easterly wind anomaly over 500 hPa and hence as well as in the atmospheric circulation in the lower layer. For the year of negative anomaly of snow depth a westerly wind anomaly with a cyclone pair takes place, while for positive anomaly of snow depth an easterly anomaly occurs with an anticyclone pair; (3) While positive anomaly of SST occurs in the eastern Pacific Ocean, positive anomaly of air pressure also takes place over the eastern Indian Ocean and the South China Sea, causing stronger meridional pressure gradient between the ocean and continent and then westerly wind anomaly. At the same time, the atmospheric pressure increases in the northern Tibetan Plateau, northerly wind gets stronger, and subtropical front strengthens. All of these are favorable for snowfall over Tibetan Plateau.

The main phosphorous sources in the Changjiang estuary

Analysis using historical data on the phosphate sources in Changjiang (Yangtze River) estuary show that phosphate was supplied equally from the east, south, west and north of the estuary. These sources include the Changjiang River, the Taiwan Warm Current (TWC), a cyclone-type eddy, and the 32A degrees N Upwelling, supplying different phosphates in different times, ways and intensities. The magnitude of their supplying phosphate concentration was related with the size in the order of the Changjiang River < the TWC < the 32A degrees N Upwelling < the cyclone-type eddy, and the duration of the supplying was: the Changjiang River > the TWC > the cyclone-type eddy > the 32A degrees N Upwelling. The four sources supplied a great deal of phosphate so that the phosphate concentration in the estuary was kept above 0.2 mu mol/L in previous years, satisfying the phytoplankton growth. The horizontal and vertical distribution of the phosphate concentration showed that near shallow marine areas at 122A degrees E/31A degrees N, the TWC in low nutrient concentration became an upwelling through sea bottom and brought up nutrients from sea bottom to marine surface. In addition, horizontal distribution of phosphate concentration was consistent with that of algae: Rhizosolenia robusta, Rhizosolenia calcaravis and Skeletonema, which showed that no matter during high water or low water of Changjiang River, these species brought by the TWC became predominant species. Therefore, the authors believe that the TWC flowed from south to north along the coast and played a role in deflecting the Changjiang River flow from the southern side.

大气季节内振荡对东亚夏季风活动的影响研究

利用ERA40逐日再分析资料、NCEP/NCAR2逐日再分析资料、中国740个测站日降水资料、上海台风研究所提供的西太平洋热带气旋资料、Kaplan等重建的月平均SSTA资料、NOAA逐日长波辐射（OLR）等资料，应用离散功率谱分析、带通滤波、EOF分析等统计方法，研究了东亚夏季风(EASM）的移动特征、东亚地区季节内振荡(ISO)的基本特征、季节内振荡对东亚夏季风活动的影响、季节内振荡对东亚夏季风异常活动的影响机理。主要结论如下： （1）综合动力和热力因素定义了可动态描述东亚夏季风移动和强度的指数，并利用该指数研究了东亚夏季风的爆发和移动的季节内变化及其年际和年代际变化特征。研究发现，气候平均东亚夏季风前沿分别在28候、33候、36候、38候、40候、44候出现了明显的跳跃。东亚夏季风活动具有显著的年际变率，主要由于季风前沿在某些区域异常停滞和突然跨越北跳或南撤引起，造成中国东部旱涝灾害频繁发生。东亚夏季风的活动具有明显的年代际变化，在1965年、1980年、1994年发生了突变，造成中国东部降水由“南旱北涝”向“南涝北旱”的转变。 （2）东亚季风区季节内变化具有10~25d和30~60d两个波段的季节内振荡周期，以30-60d为主。存在三个主要低频模态，第一模态主要表征了EASM在长江中下游和华北地区活动期间的低频形势；第二模态印度洋-菲律宾由低频气旋式环流控制，主要表现了ISO在EASM爆发期间的低频形势；第三模态主要出现在EASM在华南和淮河活动期间的低频形势。第一模态和第三模态是代表东亚夏季风活动异常的主要低频形势。 （3）热带和副热带地区ISO总是沿垂直切变风的垂直方向传播。因此，在南海-菲律宾东北风垂直切变和副热带西太平洋北风垂直切变下，大气热源激发菲律宾附近交替出现的低频气旋和低频反气旋不断向西北传播，副热带西太平洋ISO以向西传播为主。中高纬度地区，乌拉尔山附近ISO以向东、向南移动或局地振荡为主；北太平洋中部ISO在某些情况下向南、向西传播。 （4）季风爆发期，伴随着热带东印度洋到菲律宾一系列低频气旋和低频反气旋， 冷空气向南输送，10~25天和30~60天季节内振荡低频气旋同时传入南海加快了南海夏季风的爆发。在气候态下，ISO活动表现的欧亚- 太平洋（EAP）以及太平洋-北美（PNA）低频波列分布特征(本文提出的EAP和PNA低频波列与传统意义上的二维定点相关得到的波列不同)。这种低频分布形式使得欧亚和太平洋中高纬度的槽、脊及太平洋副热带高压稳定、加强，东亚地区的低频波列则成为热带和中高纬度ISO相互作用影响东亚夏季风活动的纽带。不同的阶段表现不同的低频模态，30~60d低频模态的转变加快了EASM推进过程中跳跃性；30-60d低频模态的维持使得EASM前沿相对停滞。 （5）30-60d滤波场，菲律宾海域交替出现的低频气旋和低频反气旋不断向西北传播到南海-西太平洋一带。当南海-西太平洋地区低频气旋活跃时，季风槽加强、东伸，季风槽内热带气旋（TC）频数增加；当南海-西太平洋低频反气旋活跃时，季风槽减弱、西退，TC处于间歇期，生成位置不集中。 （6）在El Nino态下，大气季节内振荡偏弱，北传特征不明显，但ISO由中高纬度北太平洋中部向南和副热带西太平洋向西的传播特征显著，东亚地区ISO活动以第三模态为主，EASM集中停滞在华南和淮河流域，常伴随着持续性区域暴雨的出现，易造成华南和江淮流域洪涝灾害，长江和华北持续干旱。在La Nina态下，大气季节内振荡活跃，且具有明显的向北传播特征，PNA低频波列显著，东亚地区ISO活动以第一模态单峰为主；EASM主要停滞在长江中下游和华北地区，这些地区出现异常持续强降水，华南和淮河流域多干旱；在El Nino态向La Nina态转换期，ISO活动以第一模态双峰为主，长江中下游常常出现二度梅。

运动目标检测方法及其实时实现技术研究

运动目标检测是计算机视觉研究领域的一项重要课题，具有广阔的应用前景和较高的学术价值。实现可靠、快速的运动目标检测并将其相应算法固化为硬件结构具有非常重要的意义。 本文首先深入研究了基于动态场景的运动目标检测算法，详细讨论了相邻帧差法及其改进方法：三帧差分法，并提出了一种融合相位一致性边缘检测的帧间差分方法；接着在研究了背景差分法的基础上讨论了背景获取和更新机制；然后探讨了块匹配法的基本原理及其匹配准则和快速搜索策略。 其次在研究了基于时空梯度光流计算方法的基础上，结合基于全局和局部约束的混合模型，将PM非线性扩散模型引入到了光流计算过程，同时为了加速计算和克服亮度不变模型对大运动矢量的不适应性，采取了多尺度的计算策略。实验结果表明，该方法对噪声具有较强的鲁棒性并且能够较好的保持目标的运动边缘。 最后开发了一种基于Altera公司Cyclone II系列FPGA芯片的运动目标检测系统，详细介绍了系统的硬件电路设计和相关模块的FPGA实现过程。采用FPGA的实现方案，使得系统的设计灵活、集成度高。

PROFIBUS-DP从站通信控制器的设计与实现

PROFIBUS是一种国际化、开放式、不依赖于设备生产厂商的现场总线标准，PROFIBUS-DP作为PROFIBUS的一个分支，以其成熟性、实时性、可靠性和稳定性，在全球范围内的工业自动化领域获得了最为广泛的应用。PROFIBUS-DP协议比较复杂, 目前只有少数国外厂商提供专用的PROFIBUS-DP协议芯片，而国内对于PROFIBUS-DP总线的应用基本以购买国外自动化设备厂商的PROFIBUS-DP通信芯片为主，导致我国的自动化行业难以掌握核心技术。因此研究和开发具有自主知识产权的PROFIBUS-DP通信芯片具有广阔的前景和重要的意义。本文通过深入研究PROFIBUS-DP协议，提出了一套完整的设计方案，并设计出符合PROFIBUS-DP协议的IP核，为最终PROFIBUS-DP通信芯片的实现打下了坚实的基础。 本文详细的介绍了PROFIBUS-DP从站通信控制器的设计实现过程。首先通过分析PROFIBUS-DP协议以及参考国外现有的芯片资料，结合自身研究，提出了PROFIBUS-DP从站通信控制器的整体设计方案，给出了设计的整体框图；其次在整体设计方案的基础上详细介绍了各个功能模块的实现方法，以此为基础，采用自顶向下的设计方法，对各个模块进行详细的设计，并给出了Verilog语言实现RTL编码以及核心功能模块的仿真波形图；最后采用ALTERA公司的Cyclone EP1C6 的FPGA芯片和Philips公司的P89LV51RD2 MCU搭建了一个标准化的智能型从站，并采用ProfiCore和ProfiScrit搭建了PROFIBUS-DP从站控制器的系统级验证环境，进行了系统级验证，充分证实了设计方案的可行性。