Reciclagem de poliestireno expandido: compósito com fibras de algodão para a confecção de placas de circuito impresso

In this work polymeric composites reinforced with cotton fibers, from the textile industry, were developed in order to manufacture printed circuit boards. It was used expanded polystyrene (EPS) as a thermoplastic matrix by melting it. For the obtention of 10% and 15% of fiber volume fraction in cotton fibers composites, it was used wasted cotton fibers as an incentive of recycling and reusing of the domestic and industrial wastes as well as for Expanded Polystyrene(EPS). The mechanical properties of the composites were evaluated by tensile and flexural strength from standardized test methods. Composites were characterized by a Scanning Electron Microscopy (SEM), Thermogravimetry (TG/DTG), Differential Scanning Calorimetry (DSC) and dielectric analysis. The analysis of the results showed that fiber in the composite directly influenced in the thermal and mechanical properties

Reciclagem de poliestireno expandido: compósito com fibras de sisal para confecção de placas de circuito impresso

In this work polystyrene composites reinforced with recycled sisal fibers were processed, in order to apply in the manufacture of printed circuit boards. A thermoplastic matrix of recycled polystyrene was used, this material came from waste expanded polystyrene (EPS) used in appliance's packages. Composites were prepared with 15% and 25% of sisal fibers. To obtain the composites, wasted EPS and natural sisal fibers were chosen, to encourage recycling and reuse of household waste and also the use of renewable resources. The composites were analyzed by standard tensile and flexural test, in order to verify the mechanical properties of the material. The characterization of the composite was done by scanning electron microscopy (SEM) , thermogravimetry (TGA / DTG) , differential scanning calorimetry (DSC) and dielectric analysis . The analysis of the results showed that the percentage of fibers in the composite influences directly the thermal and mechanical properties. Plates with a lower percentage of fibers showed superior properties at a higher percentage. The composite material obtained is easy to process and it's use is feasible for the confection of printed circuit boards, considering it's mechanical, thermal and insulative properties

Analysis of the influence of baffles and shields on the cooling of a digital transmission equipment

In this work design criteria for cooling of electronic systems used in a digital transmission equipment are considered. An experimental study using a simulated electronic equipment in which vertically oriented circuit boards are aligned to form vertical channels is carried out. Resistors are used to simulate actual components. The temperature of several components in the printed circuit boards are measured and the influence of the baffles and shields on the cooling effect are discussed. It was observed that the use of the baffles reduce the temperature levels and, the use of shields, although protecting the components from magnetic effects, cause an increase in the temperature levels.

Low-Profile Dual Circularly Polarized Antenna Array for Satellite Communications in the X Band

A planar antenna is introduced that works as a portable system for X-band satellite communications. This antenna is low-profile and modular with dimensions of 40 × 40 × 2.5 × cm. It is composed of a square array of 144 printed circuit elements that cover a wide bandwidth (14.7%) for transmission and reception along with dual and interchangeable circular polarization. A radiation efficiency above 50% is achieved by a low-loss stripline feeding network. This printed antenna has a 3 dB beamwidth of 5°, a maximum gain of 26 dBi and an axial ratio under 1.9 dB over the entire frequency band. The complete design of the antenna is shown, and the measurements are compared with simulations to reveal very good agreement.

Exploration of RVC applications using an ARM multicore processor = Exploración de aplicaciones RVC empleando un procesador ARM multinúcleo

Single core capabilities have reached their maximum clock speed; new multicore architectures provide an alternative way to tackle this issue instead. The design of decoding applications running on top of these multicore platforms and their optimization to exploit all system computational power is crucial to obtain best results. Since the development at the integration level of printed circuit boards are increasingly difficult to optimize due to physical constraints and the inherent increase in power consumption, development of multiprocessor architectures is becoming the new Holy Grail. In this sense, it is crucial to develop applications that can run on the new multi-core architectures and find out distributions to maximize the potential use of the system. Today most of commercial electronic devices, available in the market, are composed of embedded systems. These devices incorporate recently multi-core processors. Task management onto multiple core/processors is not a trivial issue, and a good task/actor scheduling can yield to significant improvements in terms of efficiency gains and also processor power consumption. Scheduling of data flows between the actors that implement the applications aims to harness multi-core architectures to more types of applications, with an explicit expression of parallelism into the application. On the other hand, the recent development of the MPEG Reconfigurable Video Coding (RVC) standard allows the reconfiguration of the video decoders. RVC is a flexible standard compatible with MPEG developed codecs, making it the ideal tool to integrate into the new multimedia terminals to decode video sequences. With the new versions of the Open RVC-CAL Compiler (Orcc), a static mapping of the actors that implement the functionality of the application can be done once the application executable has been generated. This static mapping must be done for each of the different cores available on the working platform. It has been chosen an embedded system with a processor with two ARMv7 cores. This platform allows us to obtain the desired tests, get as much improvement results from the execution on a single core, and contrast both with a PC-based multiprocessor system. Las posibilidades ofrecidas por el aumento de la velocidad de la frecuencia de reloj de sistemas de un solo procesador están siendo agotadas. Las nuevas arquitecturas multiprocesador proporcionan una vía de desarrollo alternativa en este sentido. El diseño y optimización de aplicaciones de descodificación de video que se ejecuten sobre las nuevas arquitecturas permiten un mejor aprovechamiento y favorecen la obtención de mayores rendimientos. Hoy en día muchos de los dispositivos comerciales que se están lanzando al mercado están integrados por sistemas embebidos, que recientemente están basados en arquitecturas multinúcleo. El manejo de las tareas de ejecución sobre este tipo de arquitecturas no es una tarea trivial, y una buena planificación de los actores que implementan las funcionalidades puede proporcionar importantes mejoras en términos de eficiencia en el uso de la capacidad de los procesadores y, por ende, del consumo de energía. Por otro lado, el reciente desarrollo del estándar de Codificación de Video Reconfigurable (RVC), permite la reconfiguración de los descodificadores de video. RVC es un estándar flexible y compatible con anteriores codecs desarrollados por MPEG. Esto hace de RVC el estándar ideal para ser incorporado en los nuevos terminales multimedia que se están comercializando. Con el desarrollo de las nuevas versiones del compilador específico para el desarrollo de lenguaje RVC-CAL (Orcc), en el que se basa MPEG RVC, el mapeo estático, para entornos basados en multiprocesador, de los actores que integran un descodificador es posible. Se ha elegido un sistema embebido con un procesador con dos núcleos ARMv7. Esta plataforma nos permitirá llevar a cabo las pruebas de verificación y contraste de los conceptos estudiados en este trabajo, en el sentido del desarrollo de descodificadores de video basados en MPEG RVC y del estudio de la planificación y mapeo estático de los mismos.

Sonar bat for visually impaired people

Visually impaired people have many difficulties when traveling because it is impossible for them to detect obstacles that stand in their way. Bats instead of using the sight to detect these obstacles use a method based on ultrasounds, as their sense of hearing is much more developed than that of sight. The aim of the project is to design and build a device based on the method used by the bats to detect obstacles and transmit this information to people with vision problems to improve their skills. The method involves sending ultrasonic waves and analyzing the echoes produced when these waves collide with an obstacle. The sent signals are pulses and the information needed is the time elapsed from we send a pulse to receive the echo produced. The speed of sound is fixed within the same environment, so measuring the time it takes the wave to make the return trip, we can easily know the distance where the object is located. To build the device we have to design the necessary circuits, fabricate printed circuit boards and mount the components. We also have to design a program that would work within the digital part, which will be responsible for performing distance calculations and generate the signals with the information for the user. The circuits are the emitter and the receiver. The transmitter circuit is responsible for generating the signals that we will use. We use an ultrasonic transmitter which operates at 40 kHz so the sent pulses have to be modulated with this frequency. For this we generate a 40 kHz wave with an astable multivibrator formed by NAND gates and a train of pulses with a timer. The signal is the product of these two signals. The circuit of the receiver is a signal conditioner which transforms the signals received by the ultrasonic receiver in square pulses. The received signals have a 40 kHz carrier, low voltage and very different shapes. In the signal conditioner we will amplify the voltage to appropriate levels, eliminate the component of 40 kHz and make the shape of the pulses square to use them digitally. To simplify the design and manufacturing process in the digital part of the device we will use the Arduino platform. The pulses sent and received echoes enter through input pins with suitable voltage levels. In the Arduino, our program will poll these two signals storing the time when a pulse occurs. These time values are analyzed and used to generate an audible signal with the user information. This information is stored in the frequency of the signal, so that the generated signal frequency varies depending on the distance at which the objects are. RESUMEN Las personas con discapacidad visual tienen muchas dificultades a la hora de desplazarse ya que les es imposible poder detectar los obstáculos que se interpongan en su camino. Los murciélagos en vez de usar la vista para detectar estos obstáculos utilizan un método basado en ultrasonidos, ya que su sentido del oído está mucho más desarrollado que el de la vista. El objetivo del proyecto es diseñar y construir un dispositivo basado en el método usado por los murciélagos para detectar obstáculos y que pueda ser usado por las personas con problemas en la vista para mejorar sus capacidades. El método utilizado consiste en enviar ondas de ultrasonidos y analizar el eco producido cuando estas ondas chocan con algún obstáculo. Las señales enviadas tendrán forma de pulsos y la información necesaria es el tiempo transcurrido entre que enviamos un pulso y recibimos el eco producido. La velocidad del sonido es fija dentro de un mismo entorno, por lo que midiendo el tiempo que tarda la onda en hacer el viaje de ida y vuelta podemos fácilmente conocer la distancia a la que se encuentra el objeto. Para construir el dispositivo tendremos que diseñar los circuitos necesarios, fabricar las placas de circuito impreso y montar los componentes. También deberemos diseñar el programa que funcionara dentro de la parte digital, que será el encargado de realizar los cálculos de la distancia y de generar las señales con la información para el usuario. Los circuitos diseñados corresponden uno al emisor y otro al receptor. El circuito emisor es el encargado de generar las señales que vamos a emitir. Vamos a usar un emisor de ultrasonidos que funciona a 40 kHz por lo que los pulsos que enviemos van a tener que estar modulados con esta frecuencia. Para ello generamos una onda de 40 kHz mediante un multivibrador aestable formado por puertas NAND y un tren de pulsos con un timer. La señal enviada es el producto de estas dos señales. El circuito de la parte del receptor es un acondicionador de señal que transforma las señales recibidas por el receptor de ultrasonidos en pulsos cuadrados. Las señales recibidas tienen una portadora de 40 kHz para poder usarlas con el receptor de ultrasonidos, bajo voltaje y formas muy diversas. En el acondicionador de señal amplificaremos el voltaje a niveles adecuados además de eliminar la componente de 40 kHz y conseguir pulsos cuadrados que podamos usar de forma digital. Para simplificar el proceso de diseño y fabricación en la parte digital del dispositivo usaremos la plataforma Arduino. Las señales correspondientes el envío de los pulsos y a la recepción de los ecos entraran por pines de entrada después de haber adaptado los niveles de voltaje. En el Arduino, nuestro programa sondeara estas dos señales almacenando el tiempo en el que se produce un pulso. Estos valores de tiempo se analizan y se usan para generar una señal audible con la información para el usuario. Esta información ira almacenada en la frecuencia de la señal, por lo que la señal generada variará su frecuencia en función de la distancia a la que se encuentren los objetos.

Multiple Input-Output Bidirectional Solid State Transformer Based on a Series Resonant Converter

Las fuentes de alimentación de modo conmutado (SMPS en sus siglas en inglés) se utilizan ampliamente en una gran variedad de aplicaciones. La tarea más difícil para los diseñadores de SMPS consiste en lograr simultáneamente la operación del convertidor con alto rendimiento y alta densidad de energía. El tamaño y el peso de un convertidor de potencia está dominado por los componentes pasivos, ya que estos elementos son normalmente más grandes y más pesados que otros elementos en el circuito. Para una potencia de salida dada, la cantidad de energía almacenada en el convertidor que ha de ser entregada a la carga en cada ciclo de conmutación, es inversamente proporcional a la frecuencia de conmutación del convertidor. Por lo tanto, el aumento de la frecuencia de conmutación se considera un medio para lograr soluciones más compactas con los niveles de densidad de potencia más altos. La importancia de investigar en el rango de alta frecuencia de conmutación radica en todos los beneficios que se pueden lograr: además de la reducción en el tamaño de los componentes pasivos, el aumento de la frecuencia de conmutación puede mejorar significativamente prestaciones dinámicas de convertidores de potencia. Almacenamiento de energía pequeña y el período de conmutación corto conducen a una respuesta transitoria del convertidor más rápida en presencia de las variaciones de la tensión de entrada o de la carga. Las limitaciones más importantes del incremento de la frecuencia de conmutación se relacionan con mayores pérdidas del núcleo magnético convencional, así como las pérdidas de los devanados debido a los efectos pelicular y proximidad. También, un problema potencial es el aumento de los efectos de los elementos parásitos de los componentes magnéticos - inductancia de dispersión y la capacidad entre los devanados - que causan pérdidas adicionales debido a las corrientes no deseadas. Otro factor limitante supone el incremento de las pérdidas de conmutación y el aumento de la influencia de los elementos parásitos (pistas de circuitos impresos, interconexiones y empaquetado) en el comportamiento del circuito. El uso de topologías resonantes puede abordar estos problemas mediante el uso de las técnicas de conmutaciones suaves para reducir las pérdidas de conmutación incorporando los parásitos en los elementos del circuito. Sin embargo, las mejoras de rendimiento se reducen significativamente debido a las corrientes circulantes cuando el convertidor opera fuera de las condiciones de funcionamiento nominales. A medida que la tensión de entrada o la carga cambian las corrientes circulantes incrementan en comparación con aquellos en condiciones de funcionamiento nominales. Se pueden obtener muchos beneficios potenciales de la operación de convertidores resonantes a más alta frecuencia si se emplean en aplicaciones con condiciones de tensión de entrada favorables como las que se encuentran en las arquitecturas de potencia distribuidas. La regulación de la carga y en particular la regulación de la tensión de entrada reducen tanto la densidad de potencia del convertidor como el rendimiento. Debido a la relativamente constante tensión de bus que se encuentra en arquitecturas de potencia distribuidas los convertidores resonantes son adecuados para el uso en convertidores de tipo bus (transformadores cc/cc de estado sólido). En el mercado ya están disponibles productos comerciales de transformadores cc/cc de dos puertos que tienen muy alta densidad de potencia y alto rendimiento se basan en convertidor resonante serie que opera justo en la frecuencia de resonancia y en el orden de los megahercios. Sin embargo, las mejoras futuras en el rendimiento de las arquitecturas de potencia se esperan que vengan del uso de dos o más buses de distribución de baja tensión en vez de una sola. Teniendo eso en cuenta, el objetivo principal de esta tesis es aplicar el concepto del convertidor resonante serie que funciona en su punto óptimo en un nuevo transformador cc/cc bidireccional de puertos múltiples para atender las necesidades futuras de las arquitecturas de potencia. El nuevo transformador cc/cc bidireccional de puertos múltiples se basa en la topología de convertidor resonante serie y reduce a sólo uno el número de componentes magnéticos. Conmutaciones suaves de los interruptores hacen que sea posible la operación en las altas frecuencias de conmutación para alcanzar altas densidades de potencia. Los problemas posibles con respecto a inductancias parásitas se eliminan, ya que se absorben en los Resumen elementos del circuito. El convertidor se caracteriza con una muy buena regulación de la carga propia y cruzada debido a sus pequeñas impedancias de salida intrínsecas. El transformador cc/cc de puertos múltiples opera a una frecuencia de conmutación fija y sin regulación de la tensión de entrada. En esta tesis se analiza de forma teórica y en profundidad el funcionamiento y el diseño de la topología y del transformador, modelándolos en detalle para poder optimizar su diseño. Los resultados experimentales obtenidos se corresponden con gran exactitud a aquellos proporcionados por los modelos. El efecto de los elementos parásitos son críticos y afectan a diferentes aspectos del convertidor, regulación de la tensión de salida, pérdidas de conducción, regulación cruzada, etc. También se obtienen los criterios de diseño para seleccionar los valores de los condensadores de resonancia para lograr diferentes objetivos de diseño, tales como pérdidas de conducción mínimas, la eliminación de la regulación cruzada o conmutación en apagado con corriente cero en plena carga de todos los puentes secundarios. Las conmutaciones en encendido con tensión cero en todos los interruptores se consiguen ajustando el entrehierro para obtener una inductancia magnetizante finita en el transformador. Se propone, además, un cambio en los señales de disparo para conseguir que la operación con conmutaciones en apagado con corriente cero de todos los puentes secundarios sea independiente de la variación de la carga y de las tolerancias de los condensadores resonantes. La viabilidad de la topología propuesta se verifica a través una extensa tarea de simulación y el trabajo experimental. La optimización del diseño del transformador de alta frecuencia también se aborda en este trabajo, ya que es el componente más voluminoso en el convertidor. El impacto de de la duración del tiempo muerto y el tamaño del entrehierro en el rendimiento del convertidor se analizan en un ejemplo de diseño de transformador cc/cc de tres puertos y cientos de vatios de potencia. En la parte final de esta investigación se considera la implementación y el análisis de las prestaciones de un transformador cc/cc de cuatro puertos para una aplicación de muy baja tensión y de decenas de vatios de potencia, y sin requisitos de aislamiento. Abstract Recently, switch mode power supplies (SMPS) have been used in a great variety of applications. The most challenging issue for designers of SMPS is to achieve simultaneously high efficiency operation at high power density. The size and weight of a power converter is dominated by the passive components since these elements are normally larger and heavier than other elements in the circuit. If the output power is constant, the stored amount of energy in the converter which is to be delivered to the load in each switching cycle is inversely proportional to the converter’s switching frequency. Therefore, increasing the switching frequency is considered a mean to achieve more compact solutions at higher power density levels. The importance of investigation in high switching frequency range comes from all the benefits that can be achieved. Besides the reduction in size of passive components, increasing switching frequency can significantly improve dynamic performances of power converters. Small energy storage and short switching period lead to faster transient response of the converter against the input voltage and load variations. The most important limitations for pushing up the switching frequency are related to increased conventional magnetic core loss as well as the winding loss due to the skin and proximity effect. A potential problem is also increased magnetic parasitics – leakage inductance and capacitance between the windings – that cause additional loss due to unwanted currents. Higher switching loss and the increased influence of printed circuit boards, interconnections and packaging on circuit behavior is another limiting factor. Resonant power conversion can address these problems by using soft switching techniques to reduce switching loss incorporating the parasitics into the circuit elements. However the performance gains are significantly reduced due to the circulating currents when the converter operates out of the nominal operating conditions. As the input voltage or the load change the circulating currents become higher comparing to those ones at nominal operating conditions. Multiple Input-Output Many potential gains from operating resonant converters at higher switching frequency can be obtained if they are employed in applications with favorable input voltage conditions such as those found in distributed power architectures. Load and particularly input voltage regulation reduce a converter’s power density and efficiency. Due to a relatively constant bus voltage in distributed power architectures the resonant converters are suitable for bus voltage conversion (dc/dc or solid state transformation). Unregulated two port dc/dc transformer products achieving very high power density and efficiency figures are based on series resonant converter operating just at the resonant frequency and operating in the megahertz range are already available in the market. However, further efficiency improvements of power architectures are expected to come from using two or more separate low voltage distribution buses instead of a single one. The principal objective of this dissertation is to implement the concept of the series resonant converter operating at its optimum point into a novel bidirectional multiple port dc/dc transformer to address the future needs of power architectures. The new multiple port dc/dc transformer is based on a series resonant converter topology and reduces to only one the number of magnetic components. Soft switching commutations make possible high switching frequencies to be adopted and high power densities to be achieved. Possible problems regarding stray inductances are eliminated since they are absorbed into the circuit elements. The converter features very good inherent load and cross regulation due to the small output impedances. The proposed multiple port dc/dc transformer operates at fixed switching frequency without line regulation. Extensive theoretical analysis of the topology and modeling in details are provided in order to compare with the experimental results. The relationships that show how the output voltage regulation and conduction losses are affected by the circuit parasitics are derived. The methods to select the resonant capacitor values to achieve different design goals such as minimum conduction losses, elimination of cross regulation or ZCS operation at full load of all the secondary side bridges are discussed. ZVS turn-on of all the switches is achieved by relying on the finite magnetizing inductance of the Abstract transformer. A change of the driving pattern is proposed to achieve ZCS operation of all the secondary side bridges independent on load variations or resonant capacitor tolerances. The feasibility of the proposed topology is verified through extensive simulation and experimental work. The optimization of the high frequency transformer design is also addressed in this work since it is the most bulky component in the converter. The impact of dead time interval and the gap size on the overall converter efficiency is analyzed on the design example of the three port dc/dc transformer of several hundreds of watts of the output power for high voltage applications. The final part of this research considers the implementation and performance analysis of the four port dc/dc transformer in a low voltage application of tens of watts of the output power and without isolation requirements.

Diseño y simulación térmica de HB-LEDs con Autodesk y PCB para ensayos

Este PFC es un trabajo muy práctico, los objetivos fueron impuestos por el tutor, como parte del desarrollo de herramientas (software y hardware) que serán utilizados posteriormente a nivel de docencia e investigación. El PFC tiene dos áreas de trabajo, la principal y primera que se expone es la utilización de una herramienta de simulación térmica para caracterizar dispositivos semiconductores con disipador, la segunda es la expansión de una tarjeta de adquisición de datos con unas PCBs diseñadas, que no estaban disponibles comercialmente. Se ha probado y configurado “Autodesk 2013 Inventor Fusion” y “Autodesk 2013 Simulation and Multiphysics” para simulación térmica de dispositivos de alta potencia. Estas aplicaciones son respectivamente de diseño mecánico y simulación térmica, y la UPM dispone actualmente de licencia. En esta parte del proyecto se realizará un manual de utilización, para que se continúe con esta línea de trabajo en otros PFC. Además se han diseñado mecánicamente y simulado térmicamente diodos LED de alta potencia luminosa (High Brightness Lights Emitting Diodes, HB-LEDs), tanto blancos como del ultravioleta cercano (UVA). Las simulaciones térmicas son de varios tipos de LEDs que actualmente se están empleando y caracterizando térmicamente en Proyectos Fin de Carrera y una Tesis doctoral. En la segunda parte del PFC se diseñan y realizan unas placas de circuito impreso (PCB) cuya función es formar parte de sistemas de instrumentación de adquisición automática de datos basados en LabVIEW. Con esta instrumentación se pueden realizar ensayos de fiabilidad y de otro tipo a dispositivos y sistemas electrónicos. ABSTRACT. The PFC is a very practical work, the objectives were set by the tutor, as part of the development of tools (software and hardware) that will be used later at level of teaching and research. The PFC has two parts, the first one explains the use of a software tool about thermal simulation to characterize devices semiconductors with heatsink, and second one is the expansion of card data acquisition with a PCBs designed, which were not available commercially. It has been tested and configured "Autodesk 2013 Inventor Fusion" and "Autodesk 2013 Simulation Multiphysics” for thermal simulation of high power devices. These applications are respectively of mechanical design and thermal simulation, and the UPM has at present license. In this part of the project a manual of use will be realized, so that it is continued by this line of work in other PFC. Also they have been designed mechanically and simulated thermally LEDs light (High Brightness Lights Emitting Diodes , HB- LEDs) both white and ultraviolet. Thermal simulations are several types of LEDs are now being used in thermally characterizing in Thesis and PhD. In the second part of the PFC there are designed and realized circuit board (PCB) whose function is to be a part of instrumentation systems of automatic acquisition based on LabVIEW data. With this instrumentation can perform reliability testing and other electronic devices and systems.

Reciclagem de resíduos eletroeletrônicos: um estudo cinético da lixiviação ácida de ferro de placas de circuito impresso de microcomputadores.

O aumento no consumo mundial de novos aparelhos eletroeletrônicos aliado à redução no tempo de vida útil destes equipamentos tem como principal consequência ao meio ambiente a geração de resíduos. No Brasil, com a instituição da Política Nacional de Resíduos Sólidos, criou-se a obrigatoriedade legal da responsabilidade dos fabricantes pela logística reversa dos equipamentos eletroeletrônicos, incentivando pesquisas para o desenvolvimento dos métodos de reciclagem e tratamento dos materiais descartados. O processo de lixiviação foi avaliado como alternativa à etapa de separação magnética presente nas atuais rotas hidrometalúrgicas para recuperação de metais valiosos de placas de circuito impresso. Para avaliar a composição das placas, foi realizado ensaio de dissolução em água régia. As amostras foram moídas e submetidas a ensaios de lixiviação com ácido sulfúrico nas concentrações de 1 e 2mol/L, às temperaturas de 75ºC, 85ºC e 95ºC, durante 24 horas. Com ácido sulfúrico 2mol/L a 95ºC, o tempo necessário para se obter 100% de extração do ferro foi de 2 horas. Nestas condições, não foi detectada a presença de cobre dissolvido. A cinética da reação é controlada por reação química e obedece a equação .=1(1)3. A energia de ativação aparente do processo equivale a 90kJ/mol.

Synthesis of Silver Nanoparticle Based Conductive Inks for Additively Manufactured Electronics

Thesis (Master's)--University of Washington, 2016-06

Optimal production planning for PCB assembly

It is indisputable that printed circuit boards (PCBs) play a vital role in our daily lives. With the ever-increasing applications of PCBs, one of the crucial ways to increase a PCB manufacturer’s competitiveness in terms of operation efficiency is to minimize the production time so that the products can be introduced to the market sooner. Optimal Production Planning for PCB Assembly is the first book to focus on the optimization of the PCB assembly lines’ efficiency. This is done by: • integrating the component sequencing and the feeder arrangement problems together for both the pick-and-place machine and the chip shooter machine; • constructing mathematical models and developing an efficient and effective heuristic solution approach for the integrated problems for both types of placement machines, the line assignment problem, and the component allocation problem; and • developing a prototype of the PCB assembly planning system. The techniques proposed in Optimal Production Planning for PCB Assembly will enable process planners in the electronics manufacturing industry to improve the assembly line’s efficiency in their companies. Graduate students in operations research can familiarise themselves with the techniques and the applications of mathematical modeling after reading this advanced introduction to optimal production planning for PCB assembly.

A heuristic approach for component scheduling on a high-speed PCB assembly machine

The collect-and-place machine is one of the most widely used placement machines for assembling electronic components on the printed circuit boards (PCBs). Nevertheless, the number of researches concerning the optimisation of the machine performance is very few. This motivates us to study the component scheduling problem for this type of machine with the objective of minimising the total assembly time. The component scheduling problem is an integration of the component sequencing problem, that is, the sequencing of component placements; and the feeder arrangement problem, that is, the assignment of component types to feeders. To solve the component scheduling problem efficiently, a hybrid genetic algorithm is developed in this paper. A numerical example is used to compare the performance of the algorithm with different component grouping approaches and different population sizes.

Polypropylene as a reductive agent for dehalogenation of brominated organic compounds

A new method for debromination of organics by a reductive medium like polypropylene is investigated. The reaction is carried out in inert atmosphere to avoid rapid oxidation of the polymer. Through this detoxification procedure, hydrogen bromide and small brominated alkanes are formed. Experiments in closed ampoules are carried out with tetrabromobisphenol A, dibromophenol, pentabromodiphenyl ether, dichlorophenol and an oil formed by pyrolysis of printed circuit boards in the Haloclean® process. The reaction is examined under isothermal conditions in a temperature range between 300 and 400°C and a residence time between 10 and 30 min. Optimal conditions were found at 350°C and at a residence time of 20 min. As chlorinated phenols are not destroyed under these conditions, the process may be a valuable procedure to gain hydrogen bromide out of mixtures of halogenated feed materials. Also, under atmospheric pressure, a reaction between polypropylene and brominated compounds takes place as could be proved by thermogravimetric analysis. Bromobenzene has an accelerating effect on the rate of weight loss of the polymer, but at higher concentrations, it can also be slowed down. © 2003 Elsevier Ltd. All rights reserved.

Scavenging of halogen in recycling of halogen-based polymer materials

Pyrolytic recycling of materials for electronics and automotive is attractive because of the possibility of recovery of fuel and of precious metals from printed circuit. Due to the complexity of their composition an appropriate pre-treatment has to be performed in order to limit the evolution of dangerous halogen containing compounds which strongly impair the fuel quality. An advantageous pyrolysis approach implies the attempt of mineralisation of the organic bromine to the not volatile and harmless inorganic form using strong bases such as NaOH and KOH to reduce the amount of volatile and increasing the residue. The char stability is greatly variable depending on the substrate. Mg(OH)2 and Ca(OH)2 behave in a similar manner but to a lower extent. Carbonates and reducing agent such as LiAlH have been tested as well and their ability to scavenge bromine is discussed in terms of effectiveness and mechanism.

A heuristic algorithm to generate test program sequences for moving probe electronic test equipment

The electronics industry, is experiencing two trends one of which is the drive towards miniaturization of electronic products. The in-circuit testing predominantly used for continuity testing of printed circuit boards (PCB) can no longer meet the demands of smaller size circuits. This has lead to the development of moving probe testing equipment. Moving Probe Test opens up the opportunity to test PCBs where the test points are on a small pitch (distance between points). However, since the test uses probes that move sequentially to perform the test, the total test time is much greater than traditional in-circuit test. While significant effort has concentrated on the equipment design and development, little work has examined algorithms for efficient test sequencing. The test sequence has the greatest impact on total test time, which will determine the production cycle time of the product. Minimizing total test time is a NP-hard problem similar to the traveling salesman problem, except with two traveling salesmen that must coordinate their movements. The main goal of this thesis was to develop a heuristic algorithm to minimize the Flying Probe test time and evaluate the algorithm against a "Nearest Neighbor" algorithm. The algorithm was implemented with Visual Basic and MS Access database. The algorithm was evaluated with actual PCB test data taken from Industry. A statistical analysis with 95% C.C. was performed to test the hypothesis that the proposed algorithm finds a sequence which has a total test time less than the total test time found by the "Nearest Neighbor" approach. Findings demonstrated that the proposed heuristic algorithm reduces the total test time of the test and, therefore, production cycle time can be reduced through proper sequencing.