864 resultados para Hardware gráfico


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A crescente evolução dos dispositivos contendo circuitos integrados, em especial os FPGAs (Field Programmable Logic Arrays) e atualmente os System on a chip (SoCs) baseados em FPGAs, juntamente com a evolução das ferramentas, tem deixado um espaço entre o lançamento e a produção de materiais didáticos que auxiliem os engenheiros no Co- Projecto de hardware/software a partir dessas tecnologias. Com o intuito de auxiliar na redução desse intervalo temporal, o presente trabalho apresenta o desenvolvimento de documentos (tutoriais) direcionados a duas tecnologias recentes: a ferramenta de desenvolvimento de hardware/software VIVADO; e o SoC Zynq-7000, Z-7010, ambos desenvolvidos pela Xilinx. Os documentos produzidos são baseados num projeto básico totalmente implementado em lógica programável e do mesmo projeto implementado através do processador programável embarcado, para que seja possível avaliar o fluxo de projeto da ferramenta para um projeto totalmente implementado em hardware e o fluxo de projeto para o mesmo projeto implementado numa estrutura de harware/software.

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This Thesis has the main target to make a research about FPAA/dpASPs devices and technologies applied to control systems. These devices provide easy way to emulate analog circuits that can be reconfigurable by programming tools from manufactures and in case of dpASPs are able to be dynamically reconfigurable on the fly. It is described different kinds of technologies commercially available and also academic projects from researcher groups. These technologies are very recent and are in ramp up development to achieve a level of flexibility and integration to penetrate more easily the market. As occurs with CPLD/FPGAs, the FPAA/dpASPs technologies have the target to increase the productivity, reducing the development time and make easier future hardware reconfigurations reducing the costs. FPAA/dpAsps still have some limitations comparing with the classic analog circuits due to lower working frequencies and emulation of complex circuits that require more components inside the integrated circuit. However, they have great advantages in sensor signal condition, filter circuits and control systems. This thesis focuses practical implementations of these technologies to control system PID controllers. The result of the experiments confirms the efficacy of FPAA/dpASPs on signal condition and control systems.

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Com as transformações no design da informação, também sofreram alterações os processos de comunicação visual. O estudo pretendeu compreender a transmissão de informações em um website de moda. A pesquisa evidenciou que as informações foram passadas, principalmente, através de imagens. Estas se mostraram eficientes em explicar, sentir, transmitir e sensibilizar o conteúdo para o usuário.

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In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

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In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

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Teollisuuden palveluiden on huomattu olevan potentiaalinen lisätulojen lähde. Teollisuuden palveluiden dynaamisessa maailmassa räätälöinti ja kyky toimia nopeasti ovat kriittisiä asiakastyytyväisyyden ja kilpailuedun luomisprosessin osia. Toimitusketjussa käytetyn ajan lyhentämisellä voidaan saavuttaa sekä paremmat vasteajat, että alhaisemmat kokonaiskustannukset. Tutkielman tavoitteena on kuvata teollisuuden palveluiden dynaamista ympäristöä: asiakastarvetta, sekä mahdollisuuksia kaventaa pyydetyn ja saavutetun toimitusajan välistä eroa. Tämä toteutetaan pääosin strategisen toimitusajan hallinnan keinoin. Langattomien tietoliikenneverkkojen operaattorit haluavat vähentää ydinosaamiseensa kuulumatomiin toimintoihin, kuten ylläpitoon sitoutuneita pääomia. Tutkielman case osiossa varaosapalvelujen toimitusketjun kysyntä-, materiaali- ja informaatiovirtoja analysoidaan niin kvalitatiivisten haastatteluiden, sisäisten dokumenttien, kuin kvantitatiivisten tilastollisten menetelmienkin avulla. Löydöksiä peilataan vallitsevaa toimitusketjun ja ajanhallinnan paradigmaa vasten. Tulokset osoittavat, että vahvan palvelukulttuurin omaksuminen ja kokonaisvaltainen toimitusketjun tehokkuuden mittaaminen ovat ajanhallinnan lähtökohtia teollisuuden palveluissa.

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Letter to S.D. Woodruff from A. Jeffrey importer of Hardware, Iron, Steel, and Window Glass of St. Catharines, Ont. A. Jeffrey says that he will be able to supply Mr. Woodruff with glass and iron pipe, June 7, 1875.

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Letter to S.D. Woodruff from A. Jeffrey importer of Hardware, Iron, Steel, and Window Glass of St. Catharines, Ont. regarding breakage and freight, June 23, 1875.

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Receipt from A. Jeffrey importer of Hardware, Iron, Steel, Nails and etc. regarding payment received on glass panes, Nov. 12, 1875.

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Receipt from Pratt and Company for hardware, Aug. 22, 1876.

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Receipt from W.J. McCalla, Groceries, Hardware, Paints and Oils, St. Catharines for groceries and cutlery, March 21, 1887.

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Receipt from A. Jeffrey, Hardware, St. Catharines for hardware items, April 1, 1887.

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Tesis (Maestro en Ciencias de la Administración con Especialidad en Relaciones Industriales) UANL, 2010.

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Tesis (Maestría en Artes con orientación en Artes Visuales) UANL, 2014.