POPT: uma abordagem de ensino de programação orientada a problema e testes

There is a growing interest of the Computer Science education community for including testing concepts on introductory programming courses. Aiming at contributing to this issue, we introduce POPT, a Problem-Oriented Programming and Testing approach for Introductory Programming Courses. POPT main goal is to improve the traditional method of teaching introductory programming that concentrates mainly on implementation and neglects testing. POPT extends POP (Problem Oriented Programing) methodology proposed on the PhD Thesis of Andrea Mendonça (UFCG). In both methodologies POPT and POP, students skills in dealing with ill-defined problems must be developed since the first programming courses. In POPT however, students are stimulated to clarify ill-defined problem specifications, guided by de definition of test cases (in a table-like manner). This paper presents POPT, and TestBoot a tool developed to support the methodology. In order to evaluate the approach a case study and a controlled experiment (which adopted the Latin Square design) were performed. In an Introductory Programming course of Computer Science and Software Engineering Graduation Programs at the Federal University of Rio Grande do Norte, Brazil. The study results have shown that, when compared to a Blind Testing approach, POPT stimulates the implementation of programs of better external quality the first program version submitted by POPT students passed in twice the number of test cases (professor-defined ones) when compared to non-POPT students. Moreover, POPT students submitted fewer program versions and spent more time to submit the first version to the automatic evaluation system, which lead us to think that POPT students are stimulated to think better about the solution they are implementing. The controlled experiment confirmed the influence of the proposed methodology on the quality of the code developed by POPT students

Portable Hardness tester for timber classification

Hardness is a property largely used in material specifications, mechanical and metallurgical research and quality control of several materials. Specifically for timber, Janka hardness is a simple, quick and easy test, with good correlations with the compression parallel to grain strength, a strong reference in structural classification for this material. More recently, international studies have reported the use of Brinell hardness for timber assessment which resumes the advantages previously mentioned for Janka hardness and make it easier to be performed in the field, especially because of the lower magnitude of the involved loads. A first generation of an equipment for field evaluation of hardness in wood - Portable Hardness tester for wood - based on Brinell hardness has already been developed by the Research Group on Forest Products from FCA/UNESP, Brazil, with very good correlations between the evaluated hardness and several other mechanical properties of the material when performing tests with different species of native and reforested wood (traditionally used as ties - sleepers - in railways). This paper presents results obtained in the experimental program with the first generation of this equipment and preliminary tests with its second generation, which uses accelerometers to substitute the indentation measurements in wood. For the first generation of the equipment functional and calibration tests were carried out using 16 native and reforestation timber lots, among there E. citriodora, E. tereticornis, E. saligna, E. urophylla, E. grandis, Goupia glabra and Bagassa guianenses, with different origins and ages. The results obtained confirm its potential in the classification of specimens, with inclusion errors varying from 4.5% to 16.6%.

The resistivity piezocone for high resolution geo-environmental site investigation: A Brazilian example

A suit able decision-making on managing a contaminated site characterization program is strongly dependent of the diagnosis process. A detailed diagnosis can be done based on a Conceptual Site Model (CSM) elaboration using high resolution site characterization tools. The piezocone (CPTu) test is a high resolution tool which allows attaching several specific sensors, like the resistivity probe. This hybrid device is called the resistivity piezocone (RCPTu). A simulated geo-environmental site characterization program was performed on an erosion site using different tools (direct push tools soil samplers, hollow stem auger (HSA) drilling and RCPTu tests) to develop the CSM for a site similar to the Brazilian conditions. It was observed a good agreement between the site profiles interpreted by the different methods. The resistivity sensor attached to the piezocone improved the interpretation and the decision-making process on site was significantly better for the CSM elaboration. The RCPTu test data also allowed identifying the hydrogeological heterogeneities. The present study shows that the RCPTu test is also a useful and powerful tool to development an accurate CSM in a Brazilian condition, especially in an approach that prioritizes high resolution geo-environmental investigation. © 2013 Taylor & Francis Group.

Boas práticas de manejo de bezerras leiteiras na fase de cria e potenciais efeitos na recria

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

On reducing test length for FSMs with extra states

A long-standing problem when testing from a deterministic finite state machine is to guarantee full fault coverage even if the faults introduce extra states in the implementations. It is well known that such tests should include the sequences in a traversal set which contains all input sequences of length defined by the number of extra states. This paper suggests the SPY method, which helps reduce the length of tests by distributing sequences of the traversal set and reducing test branching. It is also demonstrated that an additional assumption about the implementation under test relaxes the requirement of the complete traversal set. The results of the experimental comparison of the proposed method with an existing method indicate that the resulting reduction can reach 40%. Experimental results suggest that the additional assumption about the implementation can help in further reducing the test suite length. Copyright (C) 2011 John Wiley & Sons, Ltd.

Software for subjective visual vertical assessment: an observational cross-sectional study

Spatial orientation in relation to the gravitational axis is significantly important for the maintenance of the posture, gait and for most of the human's motor activities. The subjective visual vertical exam evaluates the individual's perception of vertical orientation. Objectives: The aims of this study were (1) to develop a virtual system to evaluate the subjective visual vertical exam, (2) to provide a simple tool to clinical practice and (3) to assess the subjective visual vertical values of h ealthy subjects using the new software. Study Design: observational cross-sectional study. Methods: Thirty healthy volunteers performed the subjective visual vertical exam in both static and dynamic conditions. The exam consisted in adjusting a virtual line in the vertical position using the computer mouse. For the static condition, the virtual line was projected in a white background. For the dynamic condition, black circles rotated in clockwise or counterclockwise directions. Six measurements were taken and the mean deviations in relation to the real vertical calculated. Results: The mean values of subjective visual vertical measurements were: static -0.372 degrees; +/- 1.21; dynamic clockwise 1.53 degrees +/- 1.80 and dynamic counterclockwise -1.11 degrees +/- 2.46. Conclusion: This software showed to be practical and accurate to be used in clinical routines.

Design and Performance Evaluation of Network-on-Chip Communication Protocols and Architectures

The scale down of transistor technology allows microelectronics manufacturers such as Intel and IBM to build always more sophisticated systems on a single microchip. The classical interconnection solutions based on shared buses or direct connections between the modules of the chip are becoming obsolete as they struggle to sustain the increasing tight bandwidth and latency constraints that these systems demand. The most promising solution for the future chip interconnects are the Networks on Chip (NoC). NoCs are network composed by routers and channels used to inter- connect the different components installed on the single microchip. Examples of advanced processors based on NoC interconnects are the IBM Cell processor, composed by eight CPUs that is installed on the Sony Playstation III and the Intel Teraflops pro ject composed by 80 independent (simple) microprocessors. On chip integration is becoming popular not only in the Chip Multi Processor (CMP) research area but also in the wider and more heterogeneous world of Systems on Chip (SoC). SoC comprehend all the electronic devices that surround us such as cell-phones, smart-phones, house embedded systems, automotive systems, set-top boxes etc... SoC manufacturers such as ST Microelectronics , Samsung, Philips and also Universities such as Bologna University, M.I.T., Berkeley and more are all proposing proprietary frameworks based on NoC interconnects. These frameworks help engineers in the switch of design methodology and speed up the development of new NoC-based systems on chip. In this Thesis we propose an introduction of CMP and SoC interconnection networks. Then focusing on SoC systems we propose: • a detailed analysis based on simulation of the Spidergon NoC, a ST Microelectronics solution for SoC interconnects. The Spidergon NoC differs from many classical solutions inherited from the parallel computing world. Here we propose a detailed analysis of this NoC topology and routing algorithms. Furthermore we propose aEqualized a new routing algorithm designed to optimize the use of the resources of the network while also increasing its performance; • a methodology flow based on modified publicly available tools that combined can be used to design, model and analyze any kind of System on Chip; • a detailed analysis of a ST Microelectronics-proprietary transport-level protocol that the author of this Thesis helped developing; • a simulation-based comprehensive comparison of different network interface designs proposed by the author and the researchers at AST lab, in order to integrate shared-memory and message-passing based components on a single System on Chip; • a powerful and flexible solution to address the time closure exception issue in the design of synchronous Networks on Chip. Our solution is based on relay stations repeaters and allows to reduce the power and area demands of NoC interconnects while also reducing its buffer needs; • a solution to simplify the design of the NoC by also increasing their performance and reducing their power and area consumption. We propose to replace complex and slow virtual channel-based routers with multiple and flexible small Multi Plane ones. This solution allows us to reduce the area and power dissipation of any NoC while also increasing its performance especially when the resources are reduced. This Thesis has been written in collaboration with the Advanced System Technology laboratory in Grenoble France, and the Computer Science Department at Columbia University in the city of New York.

Many-Core Architectures: Hardware-Software Optimization and Modeling Techniques

During the last few decades an unprecedented technological growth has been at the center of the embedded systems design paramount, with Moore’s Law being the leading factor of this trend. Today in fact an ever increasing number of cores can be integrated on the same die, marking the transition from state-of-the-art multi-core chips to the new many-core design paradigm. Despite the extraordinarily high computing power, the complexity of many-core chips opens the door to several challenges. As a result of the increased silicon density of modern Systems-on-a-Chip (SoC), the design space exploration needed to find the best design has exploded and hardware designers are in fact facing the problem of a huge design space. Virtual Platforms have always been used to enable hardware-software co-design, but today they are facing with the huge complexity of both hardware and software systems. In this thesis two different research works on Virtual Platforms are presented: the first one is intended for the hardware developer, to easily allow complex cycle accurate simulations of many-core SoCs. The second work exploits the parallel computing power of off-the-shelf General Purpose Graphics Processing Units (GPGPUs), with the goal of an increased simulation speed. The term Virtualization can be used in the context of many-core systems not only to refer to the aforementioned hardware emulation tools (Virtual Platforms), but also for two other main purposes: 1) to help the programmer to achieve the maximum possible performance of an application, by hiding the complexity of the underlying hardware. 2) to efficiently exploit the high parallel hardware of many-core chips in environments with multiple active Virtual Machines. This thesis is focused on virtualization techniques with the goal to mitigate, and overtake when possible, some of the challenges introduced by the many-core design paradigm.

Conceptualización de requerimientos: Propuesta de proceso y técnicas asociadas

El proceso de captura de requisitos constituye un proceso con connotaciones sociales relacionadas con diferentes personas (stakeholders), una circunstancia que hace que ciertos problemas se presenten cuando se lleva adelante el proceso de conceptualización de requisitos. Se propone un proceso de conceptualización de requisitos que se estructura en dos fases: (a) Análisis Orientado a al Problema: cuyo objetivo es comprender el problema dado por el usuario en el dominio en el que este se lleva a cabo, y (b) Análisis de Orientado al Producto: cuyo objetivo es obtener las funcionalidades que el usuario espera del producto de software a desarrollar, teniendo en cuenta la relación de estas con la realidad expresada por el usuario en su discurso. Se proponen seis técnicas que articulan cada una de las tareas que componen las fases de proceso propuesto.

A systematic mapping study on the open source software development process.

Abstract?Background: There is no globally accepted open source software development process to define how open source software is developed in practice. A process description is important for coordinating all the software development activities involving both people and technology. Aim: The research question that this study sets out to answer is: What activities do open source software process models contain? The activity groups on which it focuses are Concept Exploration, Software Requirements, Design, Maintenance and Evaluation. Method: We conduct a systematic mapping study (SMS). A SMS is a form of systematic literature review that aims to identify and classify available research papers concerning a particular issue. Results: We located a total of 29 primary studies, which we categorized by the open source software project that they examine and by activity types (Concept Exploration, Software Requirements, Design, Maintenance and Evaluation). The activities present in most of the open source software development processes were Execute Tests and Conduct Reviews, which belong to the Evaluation activities group. Maintenance is the only group that has primary studies addressing all the activities that it contains. Conclusions: The primary studies located by the SMS are the starting point for analyzing the open source software development process and proposing a process model for this community. The papers in our paper pool that describe a specific open source software project provide more regarding our research question than the papers that talk about open source software development without referring to a specific open source software project.

Modelización tridimensional de ensayos de adherencia tipo viga del refuerzo NSM-FRP en hormigón

El uso de refuerzos NSM‐FRP en estructuras de hormigón armado se ha incrementado considerablemente en los últimos años como método de refuerzo estructural. Los ensayos de arrancamiento en viga de los refuerzos NSM‐FRP permiten el estudio del comportamiento de la unión pegada. El principal objetivo del presente trabajo aborda la simulación numérica de este tipo de ensayos, con el propósito de caracterizar correctamente la adherencia entre las barras de NSM‐FRP y el hormigón. En una fase inicial se simuló un modelo bidimensional para conseguir evaluar y verificar el comportamiento de los elementos cohesivos y ver su comportamiento primero ante diferentes modelos de material y segundo ante un modo mixto de fallo, debido a la aplicación simultanea de carga axial y carga cortante. En una segunda fase se creó un modelo tridimensional para estudiar el arrancamiento de una barra de material compuesto insertada en hormigón, creando un modelo de material de hormigón y viendo el comportamiento cualitativo del sistema ante variaciones en los parámetros de los diferentes materiales. En la tercera fase, la más importante del presente trabajo, se abordó la simulación numérica del ensayo de arrancamiento en viga. Se simularon todos los componentes del ensayo y se evaluaron diferentes alternativas para representar la interfase NSM‐FRP ‐ hormigón, usando elementos cohesivos y diferentes distribuciones de los mismos en la interfase. Para conseguir representar lo más fielmente posible las condiciones del ensayo, se diseñó también un controlador PID que permite realizar las simulaciones numéricas mediante un control en desplazamientos, lo cual permite capturar más correctamente el comportamiento de reblandecimiento de la unión pegada. El controlador PID aplica técnicas de ingeniería de control para conseguir calcular a priori la amplitud necesaria del desplazamiento impuesto que provoque una evolución establecida en una variable interna del sistema. La variable usada para correlacionar los ensayos es la diferencia en desplazamientos entre dos puntos y se escoge una evolución lineal de la misma, pero en la tesis también se exponen los resultados de escoger otras posibles variables internas con diferentes evoluciones. Se compararon las simulaciones numéricas con resultados de mediciones experimentales previamente publicadas. Los resultados carga‐deslizamiento obtenidos encajan bien con los datos experimentales. El modelo propuesto es también capaz de predecir el modo de fallo en la interfase NSM‐FRP ‐ hormigón. Finalmente, también se han llevado a cabo estudios paramétricos, para evaluar la influencia de cada parámetro en los resultados. También se realizó un estudio cualitativo de cómo se comporta la unión pegada en cada momento de la simulación, mediante el uso macros y gráficas tridimensionales, para conseguir una mejor visualización y facilitar el análisis de los resultados. ABSTRACT The use of near‐surface mounted FRP reinforcement in reinforced concrete structures has seen a considerable increase in recent years as a strengthening method. Beam pull‐out tests for near‐surface reinforcement allow obtaining the local bond‐slip behavior of a bonded joint. The main objective of the current work deals with the three‐dimensional modeling of this kind of test with the purpose of characterizing suitably the mechanics of bond between FRP rods and concrete. In an initial stage, a two bidimensional in order to evaluate and to verify the behavior of the cohesive elements. Its behavior was evaluated first testing different material models and second testing the behavior when mixed mode failure appears, due to simultaneous axial and shear load. In a second stage a tridimensional model was created in order to study the pull‐out of an inserted beam of composite material in concrete. A concrete material model was created and the influence of each material parameter was studied qualitatively. The third part, the most relevant of the present work, the numerical simulation of the Beam Pull‐Out test was faced. All the parts of the Beam Pull‐Out test were included inthe simulation and different alternatives to represent the FRP bar – concrete interface have been evaluated, using cohesive elements and different distributions of them. In order to reproduce the test conditions more reliably, a PID controller has also been designed to conduct suitably the numerical tests in order to properly capture the softening branch of the load‐slip behaviour. The PID controller applies control techniques to calculate a priori the necessary amplitude of the load in order to achieve a given evolution through the simulation of an internal variable previously chosen. The variable used in order to correlate the simulation with the test results is the difference in displacements between two points and a linear evolution was chosen, but in the thesis the results of choosing other possible internal variables with different evolutions are also shown. The numerical FE simulations were compared with experimental measurements previously published. Load‐slip predictions compare well with the corresponding experimental data. The proposed model is also able to predict the failure mode at the FRP‐concrete interface. Some parametric studies have also been carried out, in order to evaluate the influence of each material parameter in the results. A qualitative study of the behaviour of the joint was also performed, using the results of the numeric simulations and through the use of macros and 3D graphs, the tensional state of each point of the joint can be visualized in each moment of the simulation.

Extração de casos de teste utilizando Redes de Petri hierárquicas e validação de resultados utilizando OWL.

Este trabalho propõe dois métodos para teste de sistemas de software: o primeiro extrai ideias de teste de um modelo desenvolvido em rede de Petri hierárquica e o segundo valida os resultados após a realização dos testes utilizando um modelo em OWL-S. Estes processos aumentam a qualidade do sistema desenvolvido ao reduzir o risco de uma cobertura insuficiente ou teste incompleto de uma funcionalidade. A primeira técnica apresentada consiste de cinco etapas: i) avaliação do sistema e identificação dos módulos e entidades separáveis, ii) levantamento dos estados e transições, iii) modelagem do sistema (bottom-up), iv) validação do modelo criado avaliando o fluxo de cada funcionalidade e v) extração dos casos de teste usando uma das três coberturas de teste apresentada. O segundo método deve ser aplicado após a realização dos testes e possui cinco passos: i) primeiro constrói-se um modelo em OWL (Web Ontology Language) do sistema contendo todas as informações significativas sobre as regras de negócio da aplicação, identificando as classes, propriedades e axiomas que o regem; ii) em seguida o status inicial antes da execução é representado no modelo através da inserção das instâncias (indivíduos) presentes; iii) após a execução dos casos de testes, a situação do modelo deve ser atualizada inserindo (sem apagar as instâncias já existentes) as instâncias que representam a nova situação da aplicação; iv) próximo passo consiste em utilizar um reasoner para fazer as inferências do modelo OWL verificando se o modelo mantém a consistência, ou seja, se não existem erros na aplicação; v) finalmente, as instâncias do status inicial são comparadas com as instâncias do status final, verificando se os elementos foram alterados, criados ou apagados corretamente. O processo proposto é indicado principalmente para testes funcionais de caixa-preta, mas pode ser facilmente adaptado para testes em caixa branca. Obtiveram-se casos de testes semelhantes aos que seriam obtidos em uma análise manual mantendo a mesma cobertura do sistema. A validação provou-se condizente com os resultados esperados, bem como o modelo ontológico mostrouse bem fácil e intuitivo para aplicar manutenções.

Aplicação de modelos de defeitos na geração de conjuntos de teste completos a partir de Sistemas de Transição com Entrada/Saída

O Teste Baseado em Modelos (TBM) emergiu como uma estratégia promissora para minimizar problemas relacionados à falta de tempo e recursos em teste de software e visa verificar se a implementação sob teste está em conformidade com sua especificação. Casos de teste são gerados automaticamente a partir de modelos comportamentais produzidos durante o ciclo de desenvolvimento de software. Entre as técnicas de modelagem existentes, Sistemas de Transição com Entrada/Saída (do inglês, Input/Output Transition Systems - IOTSs), são modelos amplamente utilizados no TBM por serem mais expressivos do que Máquinas de Estado Finito (MEFs). Apesar dos métodos existentes para geração de testes a partir de IOTSs, o problema da seleção de casos de testes é um tópico difícil e importante. Os métodos existentes para IOTS são não-determinísticos, ao contrário da teoria existente para MEFs, que fornece garantia de cobertura completa com base em um modelo de defeitos. Esta tese investiga a aplicação de modelos de defeitos em métodos determinísticos de geração de testes a partir de IOTSs. Foi proposto um método para geração de conjuntos de teste com base no método W para MEFs. O método gera conjuntos de teste de forma determinística além de satisfazer condições de suficiência de cobertura da especificação e de todos os defeitos do domínio de defeitos definido. Estudos empíricos avaliaram a aplicabilidade e eficácia do método proposto: resultados experimentais para analisar o custo de geração de conjuntos de teste utilizando IOTSs gerados aleatoriamente e um estudo de caso com especificações da indústria mostram a efetividade dos conjuntos gerados em relação ao método tradicional de Tretmans.

An application of fuzzy logic for hardware/software partitioning in embedded systems

Hardware/Software partitioning (HSP) is a key task for embedded system co-design. The main goal of this task is to decide which components of an application are to be executed in a general purpose processor (software) and which ones, on a specific hardware, taking into account a set of restrictions expressed by metrics. In last years, several approaches have been proposed for solving the HSP problem, directed by metaheuristic algorithms. However, due to diversity of models and metrics used, the choice of the best suited algorithm is an open problem yet. This article presents the results of applying a fuzzy approach to the HSP problem. This approach is more flexible than many others due to the fact that it is possible to accept quite good solutions or to reject other ones which do not seem good. In this work we compare six metaheuristic algorithms: Random Search, Tabu Search, Simulated Annealing, Hill Climbing, Genetic Algorithm and Evolutionary Strategy. The presented model is aimed to simultaneously minimize the hardware area and the execution time. The obtained results show that Restart Hill Climbing is the best performing algorithm in most cases.

Algoritmos metaheurísticos en el problema del particionado hardware/software de sistemas embebidos

El particionado hardware/software es una tarea fundamental en el co-diseño de sistemas embebidos. En ella se decide, teniendo en cuenta las métricas de diseño, qué componentes se ejecutarán en un procesador de propósito general (software) y cuáles en un hardware específico. En los últimos años se han propuesto diversas soluciones al problema del particionado dirigidas por algoritmos metaheurísticos. Sin embargo, debido a la diversidad de modelos y métricas utilizadas, la elección del algoritmo más apropiado sigue siendo un problema abierto. En este trabajo se presenta una comparación de seis algoritmos metaheurísticos: Búsqueda aleatoria (Random search), Búsqueda tabú (Tabu search), Recocido simulado (Simulated annealing), Escalador de colinas estocástico (Stochastic hill climbing), Algoritmo genético (Genetic algorithm) y Estrategia evolutiva (Evolution strategy). El modelo utilizado en la comparación está dirigido a minimizar el área ocupada y el tiempo de ejecución, las restricciones del modelo son consideradas como penalizaciones para incluir en el espacio de búsqueda otras soluciones. Los resultados muestran que los algoritmos Escalador de colinas estocástico y Estrategia evolutiva son los que mejores resultados obtienen en general, seguidos por el Algoritmo genético.