A Feasibility Study on Embedded Micro-Electromechanical Sensors and Systems (MEMS) for Monitoring Highway Structures, TR-575, 2011

Micro-electromechanical systems (MEMS) provide vast improvements over existing sensing methods in the context of structural health monitoring (SHM) of highway infrastructure systems, including improved system reliability, improved longevity and enhanced system performance, improved safety against natural hazards and vibrations, and a reduction in life cycle cost in both operating and maintaining the infrastructure. Advancements in MEMS technology and wireless sensor networks provide opportunities for long-term continuous, real-time structural health monitoring of pavements and bridges at low cost within the context of sustainable infrastructure systems. The primary objective of this research was to investigate the use of MEMS in highway structures for health monitoring purposes. This study focused on investigating the use of MEMS and their potential applications in concrete through a comprehensive literature review, a vendor survey, and a laboratory study, as well as a small-scale field study. Based on the comprehensive literature review and vendor survey, the latest information available on off-the-shelf MEMS devices, as well as research prototypes, for bridge, pavement, and traffic applications were synthesized. A commercially-available wireless concrete monitoring system based on radio-frequency identification (RFID) technology and off-the-shelf temperature and humidity sensors were tested under controlled laboratory and field conditions. The test results validated the ability of the RFID wireless concrete monitoring system in accurately measuring the temperature both inside the laboratory and in the field under severe weather conditions. In consultation with the project technical advisory committee (TAC), the most relevant MEMS-based transportation infrastructure research applications to explore in the future were also highlighted and summarized.

Silicon quantum dots embedded in a SiO2 matrix: From structural study to carrier transport properties

We study the details of electronic transport related to the atomistic structure of silicon quantum dots embedded in a silicon dioxide matrix using ab initio calculations of the density of states. Several structural and composition features of quantum dots (QDs), such as diameter and amorphization level, are studied and correlated with transport under transfer Hamiltonian formalism. The current is strongly dependent on the QD density of states and on the conduction gap, both dependent on the dot diameter. In particular, as size increases, the available states inside the QD increase, while the QD band gap decreases due to relaxation of quantum confinement. Both effects contribute to increasing the current with the dot size. Besides, valence band offset between the band edges of the QD and the silica, and conduction band offset in a minor grade, increases with the QD diameter up to the theoretical value corresponding to planar heterostructures, thus decreasing the tunneling transmission probability and hence the total current. We discuss the influence of these parameters on electron and hole transport, evidencing a correlation between the electron (hole) barrier value and the electron (hole) current, and obtaining a general enhancement of the electron (hole) transport for larger (smaller) QD. Finally, we show that crystalline and amorphous structures exhibit enhanced probability of hole and electron current, respectively.

Embedded Monitoring Server

This study investigates, designs, and implements an inexpensive application that allows local and remote monitoring of a home. The application consists of an array of sensors for monitoring different conditions in a home environment and also for accessing the devices that might be connected to the system. Only a few sensors are initially involved in this study and information about the temperature level, forced entry detection, smoke and water leakage detection can be obtained at any time from any location with an Internet connection. The application software (coded in C language) runs on an embedded system which is basically a wireless Linksys router running on a GNU/Linux based firmware for embedded systems. Interaction between the sensors and the application software is achieved through an implemented sensor interfacing circuit. The communication with the sensor interfacing unit is done through the serial port, and accessibility of the connected sensors is achieved through a telnet client. The sensors can be accessed from local and remote locations with the sensors giving reliable information. The resulting application shows that it is possible to use the router for other applications other than what it is intended for.

Performance analysis of software run-time behaviour using 3D-visualisation

Monimutkaisen tietokonejärjestelmän suorituskykyoptimointi edellyttää järjestelmän ajonaikaisen käyttäytymisen ymmärtämistä. Ohjelmiston koon ja monimutkaisuuden kasvun myötä suorituskykyoptimointi tulee yhä tärkeämmäksi osaksi tuotekehitysprosessia. Tehokkaampien prosessorien käytön myötä myös energiankulutus ja lämmöntuotto ovat nousseet yhä suuremmiksi ongelmiksi, erityisesti pienissä, kannettavissa laitteissa. Lämpö- ja energiaongelmien rajoittamiseksi on kehitetty suorituskyvyn skaalausmenetelmiä, jotka edelleen lisäävät järjestelmän kompleksisuutta ja suorituskykyoptimoinnin tarvetta. Tässä työssä kehitettiin visualisointi- ja analysointityökalu ajonaikaisen käyttäytymisen ymmärtämisen helpottamiseksi. Lisäksi kehitettiin suorituskyvyn mitta, joka mahdollistaa erilaisten skaalausmenetelmien vertailun ja arvioimisen suoritusympäristöstä riippumatta, perustuen joko suoritustallenteen tai teoreettiseen analyysiin. Työkalu esittää ajonaikaisesti kerätyn tallenteen helposti ymmärrettävällä tavalla. Se näyttää mm. prosessit, prosessorikuorman, skaalausmenetelmien toiminnan sekä energiankulutuksen kolmiulotteista grafiikkaa käyttäen. Työkalu tuottaa myös käyttäjän valitsemasta osasta suorituskuvaa numeerista tietoa, joka sisältää useita oleellisia suorituskykyarvoja ja tilastotietoa. Työkalun sovellettavuutta tarkasteltiin todellisesta laitteesta saatua suoritustallennetta sekä suorituskyvyn skaalauksen simulointia analysoimalla. Skaalausmekanismin parametrien vaikutus simuloidun laitteen suorituskykyyn analysoitiin.

Improving Information Problem Solving skills in Secondary Education through embedded instruction

This empirical study consists in an investigation of the effects, on the development of Information Problem Solving (IPS) skills, of a long-term embedded, structured and supported instruction in Secondary Education. Forty secondary students of 7th and 8th grades (13–15 years old) participated in the 2-year IPS instruction designed in this study. Twenty of them participated in the IPS instruction, and the remaining twenty were the control group. All the students were pre- and post-tested in their regular classrooms, and their IPS process and performance were logged by means of screen capture software, to warrant their ecological validity. The IPS constituent skills, the web search sub-skills and the answers given by each participant were analyzed. The main findings of our study suggested that experimental students showed a more expert pattern than the control students regarding the constituent skill ‘defining the problem’ and the following two web search sub-skills: ‘search terms’ typed in a search engine, and ‘selected results’ from a SERP. In addition, scores of task performance were statistically better in experimental students than in control group students. The paper contributes to the discussion of how well-designed and well-embedded scaffolds could be designed in instructional programs in order to guarantee the development and efficiency of the students’ IPS skills by using net information better and participating fully in the global knowledge society.

Sulautetun moniprosessorijärjestelmän suunnittelu sähkömoottorien ohjaus- ja valvontatarpeisiin

Universal Converter (UNICON) –projektin osana suunniteltiin sähkömoottorikäyttöjen ohjaukseen ja mittaukseen soveltuva digitaaliseen signaaliprosessoriin (DSP) pohjautuva sulautettu järjestelmä. Riittävän laskentatehon varmistamiseksi päädyttiin käyttämään moniprosessorijärjestelmää. Prosessorijärjestelmässä käytettävää DSP-piiriä valittaessa valintaperusteina olivat piirien tarjoama prosessointiteho ja moniprosessorituki. Analog Devices:n SHARC-sarjan DSP-piirit täyttivät parhaiten asetetut vaatimukset: Ne tarjoavat tehokkaan käskykannan lisäksi suuren sisäisen muistin ja sisäänrakennetun moniprosessorituen. Järjestelmän mittalaiteluonteisuudesta johtuen keskeinen suunnitteluparametri oli luoda nopeat tiedonsiirtoyhteydet mittausantureilta DSP-järjestelmään. Tämä toteutettiin käyttäen ohjelmointavia FPGA-logiikkapiirejä digitaalimuotoisen mittausdatan vastaanotossa ja esikäsittelyssä. Tiedonsiirtoyhteys PC-tietokoneelle toteutettiin käyttäen erityistä liityntäkorttia DSP-järjestelmän ja PC-tietokoneen välillä. Liityntäkortin päätehtävänä on puskuroida siirrettävä data. Järjestelyllä estetään PC-tietokoneen vaikutus DSP-järjestelmän toimintaan, jotta kyetään takaamaan järjestelmän reaaliaikainen toiminta kaikissa olosuhteissa.

Protocol Specific Embedded Operating System

Sulautettujen järjestelmien määrä kuten niiden sisältämä älykkyyskin ovat viime vuosina kasvaneet merkittävästi. Sulautettujen ohjelmistojen yleistymistä ja monipuolistumista on edesauttanut sulautettujen laitteistojen prosessointitehon merkittävä kehittyminen, jonka myötä entistä vaativampien ohjelmistojen totetuttaminen sulautetusti on mahdollistunut. Seuraavana sulautettujen järjestelmien kehitysaskeleena on nähtävissä järjestelmien kommunikointikyvyn paraneminen ja siten uusien ja uudentyyppisten sulautettujen ratkaisujen toteuttaminen. VTT on päättänyt tutkia sulautettujen järjestelmien kommunikointia ja kehittää sulautettun protokolla-alustan. Tutkimuksen perusta on CVOPS protokollajärjestelmä, jota jatkokehittämällä pyritään toteuttamaan sulautettu protokollajärjestelmä, µCVOPS. Tässä diplomityössä esitetään kommunikaation sulautetulle järjestelmälle asettamia vaatimuksia, järjestelmän suunnittelu ja prototyypitys sulautetulla laitteistolla. Prototyypitykseen on käytetty sulautettua DragonBall mikrokontrolleria jonka käyttöjärjestelmänä käytettiin sulautettua Linux:a. Tälle alustalle on tehty CVOPS:sta modifioitu versio, jolla µCVOPS:ia pystytään simuloimaan.

Tailoring the surface density of silicon nanocrystals embedded in SiOx single layers

In this article, we explore the possibility of modifying the silicon nanocrystal areal density in SiOx single layers, while keeping constant their size. For this purpose, a set of SiOx monolayers with controlled thickness between two thick SiO2 layers has been fabricated, for four different compositions (x=1, 1.25, 1.5, or 1.75). The structural properties of the SiO x single layers have been analyzed by transmission electron microscopy (TEM) in planar view geometry. Energy-filtered TEM images revealed an almost constant Si-cluster size and a slight increase in the cluster areal density as the silicon content increases in the layers, while high resolution TEM images show that the size of the Si crystalline precipitates largely decreases as the SiO x stoichiometry approaches that of SiO2. The crystalline fraction was evaluated by combining the results from both techniques, finding a crystallinity reduction from 75% to 40%, for x = 1 and 1.75, respectively. Complementary photoluminescence measurements corroborate the precipitation of Si-nanocrystals with excellent emission properties for layers with the largest amount of excess silicon. The integrated emission from the nanoaggregates perfectly scales with their crystalline state, with no detectable emission for crystalline fractions below 40%. The combination of the structural and luminescence observations suggests that small Si precipitates are submitted to a higher compressive local stress applied by the SiO2 matrix that could inhibit the phase separation and, in turn, promotes the creation of nonradiative paths.

Conceptual Design of Embedded Weather Display

The objective of this thesis work is to describe the Conceptual Design process of an embedded electronic display device. The work presents the following sub processes: definition of device specifications, introduction to the technological alternatives for system components and their comparison, comparative photometric measurements of selected display panels, and the design and building of a functional concept prototype. This work focuses mainly on electronics design, albeit the mechanical issues and fields of the software architecture that significantly affect the decisions are also discussed when necessary. The VESA Flat Panel Display Measurement (FPDM) 2.0 Standard was applied to the appropriate extent into photometric measurements. The results were analyzed against the requirement standards of a customer-specific display development project. An Active Matrix LCD was selected as the display of concept prototype, but also the excellent visual characteristics of Active Matrix OLED technology were noted. Should the reliability of the OLED products be significantly improved in the future, utilizing such products in the described application must be reconsidered.

RTOS Framework for Real-Time Control System

This thesis is done as a complementary part for the active magnet bearing (AMB) control software development project in Lappeenranta University of Technology. The main focus of the thesis is to examine an idea of a real-time operating system (RTOS) framework that operates in a dedicated digital signal processor (DSP) environment. General use real-time operating systems do not necessarily provide sufficient platform for periodic control algorithm utilisation. In addition, application program interfaces found in real-time operating systems are commonly non-existent or provided as chip-support libraries, thus hindering platform independent software development. Hence, two divergent real-time operating systems and additional periodic extension software with the framework design are examined to find solutions for the research problems. The research is discharged by; tracing the selected real-time operating system, formulating requirements for the system, and designing the real-time operating system framework (OSFW). The OSFW is formed by programming the framework and conjoining the outcome with the RTOS and the periodic extension. The system is tested and functionality of the software is evaluated in theoretical context of the Rate Monotonic Scheduling (RMS) theory. The performance of the OSFW and substance of the approach are discussed in contrast to the research theme. The findings of the thesis demonstrates that the forged real-time operating system framework is a viable groundwork solution for periodic control applications.

Performance evaluation of MPEG-4 Video encoder on Adres

Actualment un típic embedded system (ex. telèfon mòbil) requereix alta qualitat per portar a terme tasques com codificar/descodificar a temps real; han de consumir poc energia per funcionar hores o dies utilitzant bateries lleugeres; han de ser el suficientment flexibles per integrar múltiples aplicacions i estàndards en un sol aparell; han de ser dissenyats i verificats en un període de temps curt tot i l’augment de la complexitat. Els dissenyadors lluiten contra aquestes adversitats, que demanen noves innovacions en arquitectures i metodologies de disseny. Coarse-grained reconfigurable architectures (CGRAs) estan emergent com a candidats potencials per superar totes aquestes dificultats. Diferents tipus d’arquitectures han estat presentades en els últims anys. L’alta granularitat redueix molt el retard, l’àrea, el consum i el temps de configuració comparant amb les FPGAs. D’altra banda, en comparació amb els tradicionals processadors coarse-grained programables, els alts recursos computacionals els permet d’assolir un alt nivell de paral•lelisme i eficiència. No obstant, els CGRAs existents no estant sent aplicats principalment per les grans dificultats en la programació per arquitectures complexes. ADRES és una nova CGRA dissenyada per I’Interuniversity Micro-Electronics Center (IMEC). Combina un processador very-long instruction word (VLIW) i un coarse-grained array per tenir dues opcions diferents en un mateix dispositiu físic. Entre els seus avantatges destaquen l’alta qualitat, poca redundància en les comunicacions i la facilitat de programació. Finalment ADRES és un patró enlloc d’una arquitectura concreta. Amb l’ajuda del compilador DRESC (Dynamically Reconfigurable Embedded System Compile), és possible trobar millors arquitectures o arquitectures específiques segons l’aplicació. Aquest treball presenta la implementació d’un codificador MPEG-4 per l’ADRES. Mostra l’evolució del codi per obtenir una bona implementació per una arquitectura donada. També es presenten les característiques principals d’ADRES i el seu compilador (DRESC). Els objectius són de reduir al màxim el nombre de cicles (temps) per implementar el codificador de MPEG-4 i veure les diferents dificultats de treballar en l’entorn ADRES. Els resultats mostren que els cícles es redueixen en un 67% comparant el codi inicial i final en el mode VLIW i un 84% comparant el codi inicial en VLIW i el final en mode CGA.

Probing the (empirical) quantum structure embedded in the periodic table with an effective Bohr model

The atomic shell structure can be observed by inspecting the experimental periodic properties of the Periodic Table. The (quantum) shell structure emerges from these properties and in this way quantum mechanics can be explicitly shown considering the (semi-)quantitative periodic properties. These periodic properties can be obtained with a simple effective Bohr model. An effective Bohr model with an effective quantum defect (u) was considered as a probe in order to show the quantum structure embedded in the Periodic Table. u(Z) shows a quasi-smoothed dependence of Z, i.e., u(Z) ≈ Z2/5 - 1.