946 resultados para Delay tolerant network


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This work evaluates a spline-based smoothing method applied to the output of a glucose predictor. Methods:Our on-line prediction algorithm is based on a neural network model (NNM). We trained/validated the NNM with a prediction horizon of 30 minutes using 39/54 profiles of patients monitored with the Guardian® Real-Time continuous glucose monitoring system The NNM output is smoothed by fitting a causal cubic spline. The assessment parameters are the error (RMSE), mean delay (MD) and the high-frequency noise (HFCrms). The HFCrms is the root-mean-square values of the high-frequency components isolated with a zero-delay non-causal filter. HFCrms is 2.90±1.37 (mg/dl) for the original profiles.

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This paper presents a novel self-timed multi-purpose sensor especially conceived for Field Programmable Gate Arrays (FPGAs). The aim of the sensor is to measure performance variations during the life-cycle of the device, such as process variability, critical path timing and temperature variations. The proposed topology, through the use of both combinational and sequential FPGA elements, amplifies the time of a signal traversing a delay chain to produce a pulse whose width is the sensor’s measurement. The sensor is fully self-timed, avoiding the need for clock distribution networks and eliminating the limitations imposed by the system clock. One single off- or on-chip time-to-digital converter is able to perform digitization of several sensors in a single operation. These features allow for a simplified approach for designers wanting to intertwine a multi-purpose sensor network with their application logic. Employed as a temperature sensor, it has been measured to have an error of ±0.67 °C, over the range of 20–100 °C, employing 20 logic elements with a 2-point calibration.

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Nowadays, we can send audio on the Internet for multiples uses like telephony, broadcast audio or teleconferencing. The issue comes when you need to synchronize the sound from different sources because the network where we are going to work could lose packets and introduce delay in the delivery. This can also come because the sound cards could be work in different speeds. In this project, we will work with two computers emitting sound (one will simulate the left channel (mono) of a stereo signal, and the other the right channel) and connected with a third computer by a TCP network. The last computer must get the sound from both computers and reproduce it in a speaker properly (without delay). So, basically, the main goal of the project is to synchronize multi-track sound over a network. TCP networks introduce latency into data transfers. Streaming audio suffers from two problems: a delay and an offset between the channels. This project explores the causes of latency, investigates the affect of the inter-channel offset and proposes a solution to synchronize the received channels. In conclusion, a good synchronization of the sound is required in a time when several audio applications are being developed. When two devices are ready to send audio over a network, this multi-track sound will arrive at the third computer with an offset giving a negative effect to the listener. This project has dealt with this offset achieving a good synchronization of the multitrack sound getting a good effect on the listener. This was achieved thanks to the division of the project into several steps having constantly a good vision of the problem, a good scalability and having controlled the latency at all times. As we can see in the chapter 4 of the project, a lack of synchronization over c. 100μs is audible to the listener. RESUMEN. A día de hoy, podemos transmitir audio a través de Internet por varios motivos como pueden ser: una llamada telefónica, una emisión de audio o una teleconferencia. El problema viene cuando necesitas sincronizar ese sonido producido por los diferentes orígenes ya que la red a la que nos vamos a conectar puede perder los paquetes y/o introducir un retardo en las entregas de los mismos. Así mismo, estos retardos también pueden venir producidos por las diferentes velocidades a las que trabajan las tarjetas de sonido de cada dispositivo. En este proyecto, se ha trabajado con dos ordenadores emitiendo sonido de manera intermitente (uno se encargará de simular el canal izquierdo (mono) de la señal estéreo emitida, y el otro del canal derecho), estando conectados a través de una red TCP a un tercer ordenador, el cual debe recibir el sonido y reproducirlo en unos altavoces adecuadamente y sin retardo (deberá juntar los dos canales y reproducirlo como si de estéreo de tratara). Así, el objetivo principal de este proyecto es el de encontrar la manera de sincronizar el sonido producido por los dos ordenadores y escuchar el conjunto en unos altavoces finales. Las redes TCP introducen latencia en la transferencia de datos. El streaming de audio emitido a través de una red de este tipo puede sufrir dos grandes contratiempos: retardo y offset, los dos existentes en las comunicaciones entre ambos canales. Este proyecto se centra en las causas de ese retardo, investiga el efecto que provoca el offset entre ambos canales y propone una solución para sincronizar los canales en el dispositivo receptor. Para terminar, una buena sincronización del sonido es requerida en una época donde las aplicaciones de audio se están desarrollando continuamente. Cuando los dos dispositivos estén preparados para enviar audio a través de la red, la señal de sonido multi-canal llegará al tercer ordenador con un offset añadido, por lo que resultará en una mala experiencia en la escucha final. En este proyecto se ha tenido que lidiar con ese offset mencionado anteriormente y se ha conseguido una buena sincronización del sonido multi-canal obteniendo un buen efecto en la escucha final. Esto ha sido posible gracias a una división del proyecto en diversas etapas que proporcionaban la facilidad de poder solucionar los errores en cada paso dando una importante visión del problema y teniendo controlada la latencia en todo momento. Como se puede ver en el capítulo 4 del proyecto, la falta de sincronización sobre una diferencia de 100μs entre dos canales (offset) empieza a ser audible en la escucha final.

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Propagation of discharges in cortical and thalamic systems, which is used as a probe for examining network circuitry, is studied by constructing a one-dimensional model of integrate-and-fire neurons that are coupled by excitatory synapses with delay. Each neuron fires only one spike. The velocity and stability of propagating continuous pulses are calculated analytically. Above a certain critical value of the constant delay, these pulses lose stability. Instead, lurching pulses propagate with discontinuous and periodic spatio-temporal characteristics. The parameter regime for which lurching occurs is strongly affected by the footprint (connectivity) shape; bistability may occur with a square footprint shape but not with an exponential footprint shape. For strong synaptic coupling, the velocity of both continuous and lurching pulses increases logarithmically with the synaptic coupling strength gsyn for an exponential footprint shape, and it is bounded for a step footprint shape. We conclude that the differences in velocity and shape between the front of thalamic spindle waves in vitro and cortical paroxysmal discharges stem from their different effective delay; in thalamic networks, large effective delay between inhibitory neurons arises from their effective interaction via the excitatory cells which display postinhibitory rebound.

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A network of interacting proteins has been found that can account for the spontaneous oscillations in adenylyl cyclase activity that are observed in homogenous populations of Dictyostelium cells 4 h after the initiation of development. Previous biochemical assays have shown that when extracellular adenosine 3′,5′-cyclic monophosphate (cAMP) binds to the surface receptor CAR1, adenylyl cyclase and the MAP kinase ERK2 are transiently activated. A rise in the internal concentration of cAMP activates protein kinase A such that it inhibits ERK2 and leads to a loss-of-ligand binding by CAR1. ERK2 phosphorylates the cAMP phosphodiesterase REG A that reduces the internal concentration of cAMP. A secreted phosphodiesterase reduces external cAMP concentrations between pulses. Numerical solutions to a series of nonlinear differential equations describing these activities faithfully account for the observed periodic changes in cAMP. The activity of each of the components is necessary for the network to generate oscillatory behavior; however, the model is robust in that 25-fold changes in the kinetic constants linking the activities have only minor effects on the predicted frequency. Moreover, constant high levels of external cAMP lead to attenuation, whereas a brief pulse of cAMP can advance or delay the phase such that interacting cells become entrained.

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This paper reports on the development of an artificial neural network (ANN) method to detect laminar defects following the pattern matching approach utilizing dynamic measurement. Although structural health monitoring (SHM) using ANN has attracted much attention in the last decade, the problem of how to select the optimal class of ANN models has not been investigated in great depth. It turns out that the lack of a rigorous ANN design methodology is one of the main reasons for the delay in the successful application of the promising technique in SHM. In this paper, a Bayesian method is applied in the selection of the optimal class of ANN models for a given set of input/target training data. The ANN design method is demonstrated for the case of the detection and characterisation of laminar defects in carbon fibre-reinforced beams using flexural vibration data for beams with and without non-symmetric delamination damage.

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Distributed digital control systems provide alternatives to conventional, centralised digital control systems. Typically, a modern distributed control system will comprise a multi-processor or network of processors, a communications network, an associated set of sensors and actuators, and the systems and applications software. This thesis addresses the problem of how to design robust decentralised control systems, such as those used to control event-driven, real-time processes in time-critical environments. Emphasis is placed on studying the dynamical behaviour of a system and identifying ways of partitioning the system so that it may be controlled in a distributed manner. A structural partitioning technique is adopted which makes use of natural physical sub-processes in the system, which are then mapped into the software processes to control the system. However, communications are required between the processes because of the disjoint nature of the distributed (i.e. partitioned) state of the physical system. The structural partitioning technique, and recent developments in the theory of potential controllability and observability of a system, are the basis for the design of controllers. In particular, the method is used to derive a decentralised estimate of the state vector for a continuous-time system. The work is also extended to derive a distributed estimate for a discrete-time system. Emphasis is also given to the role of communications in the distributed control of processes and to the partitioning technique necessary to design distributed and decentralised systems with resilient structures. A method is presented for the systematic identification of necessary communications for distributed control. It is also shwon that the structural partitions can be used directly in the design of software fault tolerant concurrent controllers. In particular, the structural partition can be used to identify the boundary of the conversation which can be used to protect a specific part of the system. In addition, for certain classes of system, the partitions can be used to identify processes which may be dynamically reconfigured in the event of a fault. These methods should be of use in the design of robust distributed systems.

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An investigation is carried out into the design of a small local computer network for eventual implementation on the University of Aston campus. Microprocessors are investigated as a possible choice for use as a node controller for reasons of cost and reliability. Since the network will be local, high speed lines of megabit order are proposed. After an introduction to several well known networks, various aspects of networks are discussed including packet switching, functions of a node and host-node protocol. Chapter three develops the network philosophy with an introduction to microprocessors. Various organisations of microprocessors into multicomputer and multiprocessor systems are discussed, together with methods of achieving reliabls computing. Chapter four presents the simulation model and its implentation as a computer program. The major modelling effort is to study the behaviour of messages queueing for access to the network and the message delay experienced on the network. Use is made of spectral analysis to determine the sampling frequency while Sxponentially Weighted Noving Averages are used for data smoothing.

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Recently underwater sensor networks (UWSN) attracted large research interests. Medium access control (MAC) is one of the major challenges faced by UWSN due to the large propagation delay and narrow channel bandwidth of acoustic communications used for UWSN. Widely used slotted aloha (S-Aloha) protocol suffers large performance loss in UWSNs, which can only achieve performance close to pure aloha (P-Aloha). In this paper we theoretically model the performances of S-Aloha and P-Aloha protocols and analyze the adverse impact of propagation delay. According to the observation on the performances of S-Aloha protocol we propose two enhanced S-Aloha protocols in order to minimize the adverse impact of propagation delay on S-Aloha protocol. The first enhancement is a synchronized arrival S-Aloha (SA-Aloha) protocol, in which frames are transmitted at carefully calculated time to align the frame arrival time with the start of time slots. Propagation delay is taken into consideration in the calculation of transmit time. As estimation error on propagation delay may exist and can affect network performance, an improved SA-Aloha (denoted by ISA-Aloha) is proposed, which adjusts the slot size according to the range of delay estimation errors. Simulation results show that both SA-Aloha and ISA-Aloha perform remarkably better than S-Aloha and P-Aloha for UWSN, and ISA-Aloha is more robust even when the propagation delay estimation error is large. © 2011 IEEE.

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Contradiction is a cornerstone of human rationality, essential for everyday life and communication. We investigated electroencephalographic (EEG) and functional magnetic resonance imaging (fMRI) in separate recording sessions during contradictory judgments, using a logical structure based on categorical propositions of the Aristotelian Square of Opposition (ASoO). The use of ASoO propositions, while controlling for potential linguistic or semantic confounds, enabled us to observe the spatial temporal unfolding of this contradictory reasoning. The processing started with the inversion of the logical operators corresponding to right middle frontal gyrus (rMFG-BA11) activation, followed by identification of contradictory statement associated with in the right inferior frontal gyrus (rIFG-BA47) activation. Right medial frontal gyrus (rMeFG, BA10) and anterior cingulate cortex (ACC, BA32) contributed to the later stages of process. We observed a correlation between the delayed latency of rBA11 response and the reaction time delay during inductive vs. deductive reasoning. This supports the notion that rBA11 is crucial for manipulating the logical operators. Slower processing time and stronger brain responses for inductive logic suggested that examples are easier to process than general principles and are more likely to simplify communication. © 2014 Porcaro et al.

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Switched reluctance motor (SRM) drives are one competitive technology for traction motor drives. This paper proposes a novel and flexible SRM fault-tolerant topology with fault diagnosis, fault tolerance, and advanced control functions. The converter is composed of a single-phase bridge and a relay network, based on the traditional asymmetrical half-bridge driving topology. When the SRM-driving system is subjected to fault conditions including open-circuit and short-circuit faults, the proposed converter starts its fault-diagnosis procedure to locate the fault. Based on the relay network, the faulty part can be bypassed by the single-phase bridge arm, while the single-phase bridge arm and the healthy part of the converter can form a fault-tolerant topology to sustain the driving operation. A fault-tolerant control strategy is developed to decrease the influence of the fault. Furthermore, the proposed fault-tolerant strategy can be applied to three-phase 12/8 SRM and four-phase 8/6 SRM. Simulation results in MATLAB/Simulink and experiments on a three-phase 12/8 SRM and a four-phase 8/6 SRM validate the effectiveness of the proposed strategy, which may have significant economic implications in traction drive systems.

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Traffic incidents are a major source of traffic congestion on freeways. Freeway traffic diversion using pre-planned alternate routes has been used as a strategy to reduce traffic delays due to major traffic incidents. However, it is not always beneficial to divert traffic when an incident occurs. Route diversion may adversely impact traffic on the alternate routes and may not result in an overall benefit. This dissertation research attempts to apply Artificial Neural Network (ANN) and Support Vector Regression (SVR) techniques to predict the percent of delay reduction from route diversion to help determine whether traffic should be diverted under given conditions. The DYNASMART-P mesoscopic traffic simulation model was applied to generate simulated data that were used to develop the ANN and SVR models. A sample network that comes with the DYNASMART-P package was used as the base simulation network. A combination of different levels of incident duration, capacity lost, percent of drivers diverted, VMS (variable message sign) messaging duration, and network congestion was simulated to represent different incident scenarios. The resulting percent of delay reduction, average speed, and queue length from each scenario were extracted from the simulation output. The ANN and SVR models were then calibrated for percent of delay reduction as a function of all of the simulated input and output variables. The results show that both the calibrated ANN and SVR models, when applied to the same location used to generate the calibration data, were able to predict delay reduction with a relatively high accuracy in terms of mean square error (MSE) and regression correlation. It was also found that the performance of the ANN model was superior to that of the SVR model. Likewise, when the models were applied to a new location, only the ANN model could produce comparatively good delay reduction predictions under high network congestion level.

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The development of 3G (the 3rd generation telecommunication) value-added services brings higher requirements of Quality of Service (QoS). Wideband Code Division Multiple Access (WCDMA) is one of three 3G standards, and enhancement of QoS for WCDMA Core Network (CN) becomes more and more important for users and carriers. The dissertation focuses on enhancement of QoS for WCDMA CN. The purpose is to realize the DiffServ (Differentiated Services) model of QoS for WCDMA CN. Based on the parallelism characteristic of Network Processors (NPs), the NP programming model is classified as Pool of Threads (POTs) and Hyper Task Chaining (HTC). In this study, an integrated programming model that combines both of the two models was designed. This model has highly efficient and flexible features, and also solves the problems of sharing conflicts and packet ordering. We used this model as the programming model to realize DiffServ QoS for WCDMA CN. ^ The realization mechanism of the DiffServ model mainly consists of buffer management, packet scheduling and packet classification algorithms based on NPs. First, we proposed an adaptive buffer management algorithm called Packet Adaptive Fair Dropping (PAFD), which takes into consideration of both fairness and throughput, and has smooth service curves. Then, an improved packet scheduling algorithm called Priority-based Weighted Fair Queuing (PWFQ) was introduced to ensure the fairness of packet scheduling and reduce queue time of data packets. At the same time, the delay and jitter are also maintained in a small range. Thirdly, a multi-dimensional packet classification algorithm called Classification Based on Network Processors (CBNPs) was designed. It effectively reduces the memory access and storage space, and provides less time and space complexity. ^ Lastly, an integrated hardware and software system of the DiffServ model of QoS for WCDMA CN was proposed. It was implemented on the NP IXP2400. According to the corresponding experiment results, the proposed system significantly enhanced QoS for WCDMA CN. It extensively improves consistent response time, display distortion and sound image synchronization, and thus increases network efficiency and saves network resource.^

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Modern data centers host hundreds of thousands of servers to achieve economies of scale. Such a huge number of servers create challenges for the data center network (DCN) to provide proportionally large bandwidth. In addition, the deployment of virtual machines (VMs) in data centers raises the requirements for efficient resource allocation and find-grained resource sharing. Further, the large number of servers and switches in the data center consume significant amounts of energy. Even though servers become more energy efficient with various energy saving techniques, DCN still accounts for 20% to 50% of the energy consumed by the entire data center. The objective of this dissertation is to enhance DCN performance as well as its energy efficiency by conducting optimizations on both host and network sides. First, as the DCN demands huge bisection bandwidth to interconnect all the servers, we propose a parallel packet switch (PPS) architecture that directly processes variable length packets without segmentation-and-reassembly (SAR). The proposed PPS achieves large bandwidth by combining switching capacities of multiple fabrics, and it further improves the switch throughput by avoiding padding bits in SAR. Second, since certain resource demands of the VM are bursty and demonstrate stochastic nature, to satisfy both deterministic and stochastic demands in VM placement, we propose the Max-Min Multidimensional Stochastic Bin Packing (M3SBP) algorithm. M3SBP calculates an equivalent deterministic value for the stochastic demands, and maximizes the minimum resource utilization ratio of each server. Third, to provide necessary traffic isolation for VMs that share the same physical network adapter, we propose the Flow-level Bandwidth Provisioning (FBP) algorithm. By reducing the flow scheduling problem to multiple stages of packet queuing problems, FBP guarantees the provisioned bandwidth and delay performance for each flow. Finally, while DCNs are typically provisioned with full bisection bandwidth, DCN traffic demonstrates fluctuating patterns, we propose a joint host-network optimization scheme to enhance the energy efficiency of DCNs during off-peak traffic hours. The proposed scheme utilizes a unified representation method that converts the VM placement problem to a routing problem and employs depth-first and best-fit search to find efficient paths for flows.

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The purpose of this study was to analyze the network performance by observing the effect of varying network size and data link rate on one of the most commonly found network configurations. Computer networks have been growing explosively. Networking is used in every aspect of business, including advertising, production, shipping, planning, billing, and accounting. Communication takes place through networks that form the basis of transfer of information. The number and type of components may vary from network to network depending on several factors such as requirement and actual physical placement of the networks. There is no fixed size of the networks and they can be very small consisting of say five to six nodes or very large consisting of over two thousand nodes. The varying network sizes make it very important to study the network performance so as to be able to predict the functioning and the suitability of the network. The findings demonstrated that the network performance parameters such as global delay, load, router processor utilization, router processor delay, etc. are affected. The findings demonstrated that the network performance parameters such as global delay, load, router processor utilization, router processor delay, etc. are affected significantly due to the increase in the size of the network and that there exists a correlation between the various parameters and the size of the network. These variations are not only dependent on the magnitude of the change in the actual physical area of the network but also on the data link rate used to connect the various components of the network.