The European Power Hierarchy, Member State Trust, and Public Support for the Common Security and Defense Policy. Jean Monnet/Robert Schuman Paper Series Vol. 15 No. 2, August 2015

Existing studies focus on overall support for European integration while less work has been done on explaining public opinion on specific policy areas, such as the development of the Common Security and Defense Policy (CSDP). We hypothesize that the probability of supporting a CSDP increases with greater levels of trust in the European Union member states, most notably the more powerful members. This variable is critical since integration’s development is influenced strongly by, and dependent on, the resources of the relatively more powerful European member states. Binary logistic regression analyses using pooled repeated cross-sectional data from the Eurobarometer surveys conducted from 1992 to 1997 among individuals of 11 member states largely support these claims.

Mixed human saliva, its variations in composition and amylolytic power and the action of its freed enzyme, a series of observations and experiments from a chemical standpoint; submitted in partial fulfillment of the requirements for the degree of M.S. [in the] University of California.

Type-written manuscript.

Remarks on canal navigation : illustrative of the advantages of the use of steam, as a moving power on canals : With an appendix, containing a series of experiments, tables, &c. on which a number of proposed improvements are founded : Also, plans and descriptions of certain classes of steam boats, intended for the navigation of canals, and the adjoining branches of the sea /

On plates: H.G. James's Lithography, 9 Ridge Field, Manchester.

Series-L/parallel-tuned Class-E power amplifier analysis

An analysis of the operation of a new series-L/parallel-tuned Class-E amplifier and its equivalence to the classic shunt-C/series-tuned Class-E amplifier are presented. The first reported closed form design equations for the series-L/parallel-tuned topology operating under ideal switching conditions are given, including the switch current and voltage in steady state, the circuit component values, the peak values of switch current and voltage and the power-output capability. Theoretical analysis is confirmed by numerical simulation for a 500 mW (27 dBm), 10% bandwidth, 5 V series-L/parallel-tuned, then, shunt-C/series-tuned Class-E power amplifier, operating at 2.5 GHz. Excellent agreement between theory and simulation results is achieved.

Time series wind power forecasting based on variant Gaussian process and TLBO

Due to the variability and stochastic nature of wind power system, accurate wind power forecasting has an important role in developing reliable and economic power system operation and control strategies. As wind variability is stochastic, Gaussian Process regression has recently been introduced to capture the randomness of wind energy. However, the disadvantages of Gaussian Process regression include its computation complexity and incapability to adapt to time varying time-series systems. A variant Gaussian Process for time series forecasting is introduced in this study to address these issues. This new method is shown to be capable of reducing computational complexity and increasing prediction accuracy. It is further proved that the forecasting result converges as the number of available data approaches innite. Further, a teaching learning based optimization (TLBO) method is used to train the model and to accelerate
the learning rate. The proposed modelling and optimization method is applied to forecast both the wind power generation of Ireland and that from a single wind farm to show the eectiveness of the proposed method.

Informal strategies of power in the local planning system

Existing studies that question the role of planning as a state institution, whose interests it serves together with those disputing the merits of collaborative planning are all essentially concerned with the broader issue of power in society. Although there have been various attempts to highlight the distorting effects of power, the research emphasis to date has been focused on the operation of power within the formal structures that constitute the planning system. As a result, relatively little attention has been attributed to the informal strategies or tactics that can be utilised by powerful actors to further their own interests. This article seeks to address this gap by identifying the informal strategies used by the holders of power to bypass the formal structures of the planning system and highlight how these procedures are to a large extent systematic and (almost) institutionalised in a shadow planning system. The methodology consists of a series of semi-structured qualitative interviews with 20 urban planners working across four planning authorities within the Greater Dublin Area, Ireland. Empirical findings are offered that highlight the importance of economic power in the emergence of what essentially constitutes a shadow planning system. More broadly, the findings suggest that much more cognisance of the structural relations that govern how power is distributed in society is required and that ‘light touch’ approaches that focus exclusively on participation and deliberation need to be replaced with more radical solutions that look towards the redistribution of economic power between stakeholders.

The development of planar high-K/III-V p-channel MOSFETs for post-silicon CMOS

Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of In_x≥0.53Ga_1-xAs/In_0.52Al_0.48As and In_x≥0.1Ga_1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm²/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In_0.85Ga_0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (L_side) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH₄)₂S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al₂O₃/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×10¹²cm^-2eV^-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (I_d,sat=1.14mA/mm), double peaked transconductance (g_m=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (R_on=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of I_d,sat (11×), g_m (5.5×) and R_on (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (L_side) from 1μm down to 70nm improved I_d,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In_0.3Ga_0.7Sb-channel (I_d,sat=49.4mA/mm, g_m=12.3mS/mm, R_on=31.7kΩ.μm) and In_0.4Ga_0.6Sb-channel (I_d,sat=38mA/mm, g_m=11.9mS/mm, R_on=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.