A Dual Seven-Level Inverter Supply for an Open-End Winding Induction Motor Drive

This paper develops a seven-level inverter structure for open-end winding induction motor drives. The inverter supply is realized by cascading four two-level and two three-level neutral-point-clamped inverters. The inverter control is designed in such a way that the common-mode voltage (CMV) is eliminated. DC-link capacitor voltage balancing is also achieved by using only the switching-state redundancies. The proposed power circuit structure is modular and therefore suitable for fault-tolerant applications. By appropriately isolating some of the inverters, the drive can be operated during fault conditions in a five-level or a three-level inverter mode, with preserved CMV elimination and DC-link capacitor voltage balancing, within a reduced modulation range.

A Current Source Inverter Fed Induction Motor Drive with Power Factor Angle Control Using Microprocessor

This paper describes a method of adjusting the stator power factor angle for the control of an induction motor fed from a current source inverter (CSI) based on the concept of space vectors (or park vectors). It is shown that under steady state, if the torque angle is kept constant over the entire operating range, it has the advantage of keeping the slip frequency constant. This can be utilized to dispose of the speed feedback and simplify the control scheme for the drive, such that the stator voltage integral zero crossings alone can be used as a feedback for deciding the triggering instants of the CSI thyristors under stable operation of the system. A closed-loop control strategy is developed for the drive based on this principle, using a microprocessor-based control system and is implemented on a laboratory prototype CSI fed induction motor drive.

Harmonics in voltage-source PWM inverters

he performance of an induction motor fed by PWM inverters is mainly determined by the harmonic contents of the output voltage. This paper presents a method of numerically calculating the harmonics in the output voltage waveform. Equal pulse-width modulation and siunsoidal PWM are studied. Analysis has been done for single-phase and three-phase bridge inverters. A systematic procedure is given for computing the harmonics and the results are. tabulated.

High-Frequency Current Source Inverter

The frequency range of the current source inverter (CSI) is limited by the slow commutation process in the inverter circuit. A method to reduce the commutation time and to limit the commutation capacitor voltage is proposed. A brief description of the conventional CSI and a detailed analysis of the commutation intervals of the proposed circuit are given. The experimental waveforms observed in the laboratory verify the validity of the analysis.

Modeling and analysis of energy quantization effects on single electron inverter performance

In this paper, for the first time, the effects of energy quantization on single electron transistor (SET) inverter performance are analyzed through analytical modeling and Monte Carlo simulations. It is shown that energy quantization mainly changes the Coulomb blockade region and drain current of SET devices and thus affects the noise margin, power dissipation, and the propagation delay of SET inverter. A new analytical model for the noise margin of SET inverter is proposed which includes the energy quantization effects. Using the noise margin as a metric, the robustness of SET inverter is studied against the effects of energy quantization. A compact expression is developed for a novel parameter quantization threshold which is introduced for the first time in this paper. Quantization threshold explicitly defines the maximum energy quantization that an SET inverter logic circuit can withstand before its noise margin falls below a specified tolerance level. It is found that SET inverter designed with CT:CG=1/3 (where CT and CG are tunnel junction and gate capacitances, respectively) offers maximum robustness against energy quantization.

Modified current source inverter fed induction motor drive with reduced torque pulsations

A new technique for reducing the torque pulsations in a conventional current source inverter fed induction motor drive is presented. This does not attempt to improve the current waveforms, but modifies the airgap MMF directly. This is based on the use of a motor with two sets of balanced phase windings, with a 30 electrical degree phase difference between them, and each set being fed from a conventional current source inverter. The two inverters are further connected in series so that they can operate from the same current source. As a consequence of this arrangement, the voltage rating of the components of each inverter is reduced, along with reduced torque ripple. This scheme has been experimentally verified and compared with the performance of a conventional scheme.

Harmonic Analysis of Advanced Bus-Clamping PWM Techniques

Special switching sequences can be employed in space-vector-based generation of pulsewidth-modulated (PWM) waveforms for voltage-source inverters. These sequences involve switching a phase twice, switching the second phase once, and clamping the third phase in a subcycle. Advanced bus-clamping PWM (ABCPWM) techniques have been proposed recently that employ such switching sequences. This letter studies the spectral properties of the waveforms produced by these PWM techniques. Further, analytical closed-form expressions are derived for the total rms harmonic distortion due to these techniques. It is shown that the ABCPWM techniques lead to lower distortion than conventional space vector PWM and discontinuous PWM at higher modulation indexes. The findings are validated on a 2.2-kW constant $V/f$ induction motor drive and also on a 100-kW motor drive.

Space-Vector-Based Hybrid Pulsewidth Modulation Techniques for Reduced Harmonic Distortion and Switching Loss

Novel switching sequences can be employed in spacevector-based pulsewidth modulation (PWM) of voltage source inverters. Differentswitching sequences are evaluated and compared in terms of inverter switching loss. A hybrid PWM technique named minimum switching loss PWM is proposed, which reduces the inverter switching loss compared to conventional space vector PWM (CSVPWM) and discontinuous PWM techniques at a given average switching frequency. Further, four space-vector-based hybrid PWM techniques are proposed that reduce line current distortion as well as switching loss in motor drives, compared to CSVPWM. Theoretical and experimental results are presented.

A Proportional plus Multiresonant Controller for Three-Phase Four-Wire High-Frequency Link Inverter

A new solution for unbalanced and nonlinear loads in terms of power circuit topology and controller structure is proposed in this paper. A three-phase four-wire high-frequency ac-link inverter is adopted to cater to such loads. Use of high-frequency transformer results in compact and light-weight systems. The fourth wire is taken out from the midpoint of the isolation transformer in order to avoid the necessity of an extra leg. This makes the converter suitable for unbalanced loads and eliminates the requirements of bulky capacitor in half-bridge inverter. The closed-loop control is carried out in stationary reference frame using proportional + multiresonant controller (three separate resonant controller for fundamental, fifth and seventh harmonic components). The limitations on improving steady-state response of harmonic resonance controllers is investigated and mitigated using a lead-lag compensator. The proposed voltage controller is used along with an inner current loop to ensure excellent performance of the power converter. Simulation studies and experimental results with 1 kVA prototype under nonlinear and unbalanced loading conditions validate the proposed scheme.

Improved switching frequency variation control of hysteresis controlled voltage source inverter-fed IM drives using current error space vector

A constant switching frequency current error space vector-based hysteresis controller for two-level voltage source inverter-fed induction motor (IM) drives is proposed in this study. The proposed controller is capable of driving the IM in the entire speed range extending to the six-step mode. The proposed controller uses the parabolic boundary, reported earlier, for vector selection in a sector, but uses simple, fast and self-adaptive sector identification logic for sector change detection in the entire modulation range. This new scheme detects the sector change using the change in direction of current error along the axes jA, jB and jC. Most of the previous schemes use an outer boundary for sector change detection. So the current error goes outside the boundary six times during sector change, in one cycle,, introducing additional fifth and seventh harmonic components in phase current. This may cause sixth harmonic torque pulsations in the motor and spread in the harmonic spectrum of phase voltage. The proposed new scheme detects the sector change fast and accurately eliminating the chance of introducing additional fifth and seventh harmonic components in phase current and provides harmonic spectrum of phase voltage, which exactly matches with that of constant switching frequency voltage-controlled space vector pulse width modulation (VC-SVPWM)-based two-level inverter-fed drives.

A Hardware Grid Simulator to Test Grid-Connected Inverter Systems.

Grid-connected systems when put to use at the site would experience scenarios like voltage sag, voltage swell, frequency deviations and unbalance which are common in the real world grid. When these systems are tested at laboratory, these scenarios do not exist and an almost stiff voltage source is what is usually seen. But, to qualify the grid-connected systems to operate at the site, it becomes essential to test them under the grid conditions mentioned earlier. The grid simulator is a hardware that can be programmed to generate some of the typical conditions experienced by the grid-connected systems at site. It is an inverter that is controlled to act like a voltage source in series with a grid impedance. The series grid impedance is emulated virtually within the inverter control rather than through physical components, thus avoiding the losses and the need for bulky reactive components. This paper describes the design of a grid simulator. Control implementation issues are highlighted in the experimental results.

Elimination of common mode voltage and fifth and seventh harmonics in a multilevel inverter fed IM drive using 12-sided polygonal voltage spacephasor

A multilevel inverter with 12-sided polygonal voltage space vector structure is proposed in this paper. The present scheme provides elimination of common mode voltage variation and 5(th) and 7(th) order harmonics in the entire operating range of the drive. The proposed multi level structure is achieved by cascading only the conventional two-level inverters with asymmetrical DC link voltages. The bandwidths problems associated with conventional hexagonal voltage space vector structure current controllers, due to the presence of 5(th) and 7(th) harmonics, in the over modulation region, is absent in the present 12-sided structure. So a linear voltage control up to 12-step operation is possible, from the present twelve sided scheme, with less current control complexity. An open-end winding structure is used for the induction motor drive.

A Simple Five-Level Inverter Topology for Induction Motor Drive Using Conventional Two-Level Inverters and Flying Capacitor Technique

This paper proposes a new five-level inverter topology for open-end winding induction motor (IM) drive. The popular existing circuit configurations for five-level inverter include the NPC inverter and flying capacitor topologies. Compared to the NPC inverter, the proposed topology eliminates eighteen clamping diodes having different voltage ratings in the present circuit. Moreover it requires only one capacitor bank per phase, whereas flying capacitor schemes for five level topologies require six capacitor banks per phase. The proposed topology is realized by feeding the phase winding of an open-end induction motor with two-level inverters in series with flying capacitors. The flying capacitor voltages are balanced using the switching state redundancy for full modulation range. The proposed inverter scheme is capable of producing two-level to five-level pulse width modulated voltage across the phase winding depending on the modulation range. Additionally, in case of any switch failure in the flying capacitor connection, the proposed inverter topology can be operated as a three-level inverter for full modulation range. The proposed scheme is experimentally verified on a four pole, 5hp induction motor drive.

A Five-Level Inverter Scheme for a Four-Pole Induction Motor Drive by Feeding the Identical Voltage-Profile Windings From Both Sides

This paper presents a five-level inverter scheme with four two-level inverters for a four-pole induction motor (IM) drive. In a conventional three-phase four-pole IM, there exists two identical voltage-profile winding coil groups per phase around the armature, which are connected in series and spatially apart by two pole pitches. In this paper, these two identical voltage-profile pole-pair winding coils in each phase of the IM are disconnected and fed from four two-level inverters from four sides of the windings with one-fourth dc-link voltage as compared to a conventional five-level neutral-point-clamped inverter. The scheme presented in this paper does not require any special design modification for the induction machine. For this paper, a four-pole IM drive is used, and the scheme can be easily extended to IMs with more than four poles. The proposed scheme is experimentally verified on a four-pole 5-hp IM drive.