881 resultados para High repetition rate
Resumo:
We propose several all-pass spectrally-periodic optical structures composed of simple optical cavities for the implementation of repetition rate multipliers of periodic pulse train with uniform output train envelope by phase-only filtering, and analyze them in terms of robustness and accuracy.
Resumo:
We propose and analyze several simple all-pass spectrally-periodic optical structures, in terms of accuracy and robustness, for the implementation of repetition rate multipliers of periodic pulse train with uniform output train envelope, finding optimum solutions for multiplication factors of 3, 4, 6, and 12.
Resumo:
The letter presents a technique for Nth-order differentiation of periodic pulse train, which can simultaneously multiply the input repetition rate. This approach uses a single linearly chirped apodized fiber Bragg grating, which grating profile is designed to map the spectral response of the Nth-order differentiator, and the chirp introduces a dispersion that, besides space-to-frequency mapping, it also causes a temporal Talbot effect.
Resumo:
DUE TO COPYRIGHT RESTRICTIONS ONLY AVAILABLE FOR CONSULTATION AT ASTON UNIVERSITY LIBRARY AND INFORMATION SERVICES WITH PRIOR ARRANGEMENT
Resumo:
The WDM properties of dispersion managed (DM) solitons and the reduction in Gordon-Haus jitter means that it is possible to contemplate multiple channels each at 10 Gbit/s for transoceanic distances without the need for elaborate soliton control. This paper will concentrate on fundamental principles of DM solitons, but will use these principles to indicate optimum maps for future high-speed soliton systems.
Resumo:
Competing approaches exist, which allow control of phase noise and frequency tuning in mode-locked lasers, but no judgement of pros and cons based on a comparative analysis was presented yet. Here, we compare results of hybrid mode-locking, hybrid mode-locking with optical injection seeding, and sideband optical injection seeding performed on the same quantum dot laser under identical bias conditions. We achieved the lowest integrated jitter of 121 fs and a record large radio-frequency (RF) tuning range of 342 MHz with sideband injection seeding of the passively mode-locked laser. The combination of hybrid mode-locking together with optical injection-locking resulted in 240 fs integrated jitter and a RF tuning range of 167 MHz. Using conventional hybrid mode-locking, the integrated jitter and the RF tuning range were 620 fs and 10 MHz, respectively. © 2014 AIP Publishing LLC.
Resumo:
We describe the technique allowing for generation of low-noise wider frequency combs and pulses of shorter duration in quantum-dot mode-locked lasers. We compare experimentally noise stabilization techniques in semiconductor modelocked lasers. We discuss the benefits of electrical modulation of the laser absorber voltage (hybrid mode-locking), combination of hybrid mode-locking with optical injection seeding from the narrow linewidth continues wave master source and optical injection seeding of two coherent sidebands separated by the laser repetition rate. © 2014 SPIE.
Resumo:
The distribution of the secret key is the weakest link of many data encryption systems. Quantum key distribution (QKD) schemes provide attractive solutions [1], however their implementation remains challenging and their range and bit-rate are limited. Moreover, practical QKD systems, employ real-life components and are, therefore, vulnerable to diverse attack schemes [2]. Ultra-Long fiber lasers (UFLs) have been drawing much attention recently because of their fundamentally different properties compared to conventional lasers as well as their unique applications [3]. Here, we demonstrate a 100Bps, practically secure key distribution, over a 500km link, employing Raman gain UFL. Fig. 1(a) depicts a schematic of the UFL system. Each user has an identical set of two wavelength selective mirrors centered at l0 and l 1. In order to exchange a key-bit, each user independently choose one of these mirrors and introduces it as a laser reflector at their end. If both users choose identical mirrors, a clear signal develops and the bits in these cases are discarded. However if they choose complementary mirrors, (1, 0 or 0, 1 states), the UFL remains below lasing threshold and no signal evolves. In these cases, an eavesdropper can only detect noise and is unable to determine the mirror choice of the users, where the choice of mirrors represent a single key bit (e.g. Alice's choice of mirror is the key-bit). These bits are kept and added to the key. The absence of signal in the secure states faxilitates fast measurements to distinguish between the non-secure and the secure states and to determine the key-bit in the later case, Sequentially reapeating the single bit exchange protocol generate the entire keys of any desirable length. © 2013 IEEE.
Resumo:
Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)
Resumo:
Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.
In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.
Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.
Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.