Antenas planares integradas com FSSs para aplicações em sistemas de comunicações sem fio

This work presents a theoretical and experimental analysis about the properties of microstrip antennas with integrated frequency selective surfaces (Frequency Selective Surface - FSS). The integration occurs through the insertion of the FSS on ground plane of microstrip patch antenna. This integration aims to improve some characteristics of the antennas. The FSS using patch-type elements in square unit cells. Specifically, the simulated results are obtained using the commercial computer program CST Studio Suite® version 2011. From a standard antenna, designed to operate in wireless communication systems of IEEE 802.11 a / b / g / n the dimensions of the FSS are varied to obtain an optimization of some antenna parameters such as impedance matching and selectivity in the operating bands. After optimization of the investigated parameters are built two prototypes of microstrip patch antennas with and without the FSS ground plane. Comparisons are made of the results with the experimental results by 14 ZVB network analyzer from Rohde & Schwarz ®. The comparison aims to validate the simulations performed and show the improvements obtained with the FSS in integrated ground plane antenna. In the construction of prototypes, we used dielectric substrates of the type of Rogers Corporation RT-3060 with relative permittivity equal to 10.2 and low loss tangent. Suggestions for continued work are presented

Caracterização de superfícies seletivas de freqüência e de antenas fractais para aplicações em redes sem fio

This work aims to investigate the behavior of fractal elements in planar microstrip structures. In particular, microstrip antennas and frequency selective surfaces (FSSs) had changed its conventional elements to fractal shapes. For microstrip antennas, was used as the radiating element of Minkowski fractal. The feeding method used was microstrip line. Some prototypes were built and the analysis revealed the possibility of miniaturization of structures, besides the multiband behavior, provided by the fractal element. In particular, the Minkowski fractal antenna level 3 was used to exploit the multiband feature, enabling simultaneous operation of two commercial tracks (Wi-Fi and WiMAX) regulated by ANATEL. After, we investigated the effect of switches that have been placed on the at the pre-fractal edges of radiating element. For the FSSs, the fractal used to elements of FSSs was Dürer s pentagon. Some prototypes were built and measured. The results showed a multiband behavior of the structure provided by fractal geometry. Then, a parametric analysis allowed the analysis of the variation of periodicity on the electromagnetic behavior of FSS, and its bandwidth and quality factor. For numerical and experimental characterization of the structures discussed was used, respectively, the commercial software Ansoft DesignerTM and a vector network analyzer, Agilent N5230A model

Estudo de Superfícies Seletivas de Frequência com o Uso de Inteligência Computacional

The main objective of this work is to optimize the performance of frequency selective surfaces (FSS) composed of crossed dipole conducting patches. The optimization process is performed by determining proper values for the width of the crossed dipoles and for the FSS array periodicity, while the length of the crossed dipoles is kept constant. Particularly, the objective is to determine values that provide wide bandwidth using a search algorithm with representation in bioinspired real numbers. Typically FSS structures composed of patch elements are used for band rejection filtering applications. The FSS structures primarily act like filters depending on the type of element chosen. The region of the electromagnetic spectrum chosen for this study is the one that goes from 7 GHz to 12 GHz, which includes mostly the X-band. This frequency band was chosen to allow the use of two X-band horn antennas, in the FSS measurement setup. The design of the FSS using the developed genetic algorithm allowed increasing the structure bandwidth

Caracterização de circuitos planares de micro-ondas pelo método iterativo das ondas

The planar circuits are structures that increasingly attracting the attention of researchers, due the good performance and capacity to integrate with other devices, in the prototyping of systems for transmitting and receiving signals in the microwave range. In this context, the study and development of new techniques for analysis of these devices have significantly contributed in the design of structures with excellent performance and high reliability. In this work, the full-wave method based on the concept of electromagnetic waves and the principle of reflection and transmission of waves at an interface, Wave Concept Iterative Procedure (WCIP), or iterative method of waves is described as a tool with high precision study microwave planar circuits. The proposed method is applied to the characterization of planar filters, microstrip antennas and frequency selective surfaces. Prototype devices were built and the experimental results confirmed the proposed mathematical model. The results were also compared with simulated results by Ansoft HFSS, observing a good agreement between them.

Análise e projeto de superfícies seletivas em frequência multibanda e/ou banda larga

Frequency selective surfaces (Frequency Selective Surface - FSS) are often used in various applications in telecommunications. Some of these applications may require that these structures have response with multiple resonance bands. Other applications require that the FSS response have large frequency range, to meet the necessary requirements. FSS to design with these features there are numerous techniques cited in the scientific literature. Thus, the purpose of this paper is to examine some common techniques such as: Overlap of FSS; Elements combined; Elements Elements convolucionados and fractals. And designing multiband FSS and / or broadband selecting simple ways in terms of construction and occupy the smallest possible space, aiming at practical applications. Given these requirements, three projects FSS were performed: a technology applied to IEEE 802.11 a/b/g/n and two projects for application in UWB. In project development, commercial software Ansoft DesignerTM and experimental results were satisfactory was used

Análise espectral de reflectarrays com substrato de duas camadas dielétricas anisotrópicas uniaxiais

Recently, an amazing development has been observed in telecommunication systems. Two good examples of this development are observed in mobile communication and aerospace systems. This impressive development is related to the increasing need for receiving and transmitting communication signals. Particularly, this development has required the study of new antennas and filters. This work presents a fullwave analysis of reflectarrays. The considered structures are composed by arrays of rectangular conducting patches printed on multilayer dieletric substrates, that are mounted on a ground plane. The analysis is developed in the spectral domain, using an equivalent transmission line method in combination with Galerkin method. Results for the reflection coefficient of these structures are presented and compared to those available in the literature. A good agreement was observed. Particularly, the developed analysis uses the transmission lines theory in combination with the incident potentials and the field continuity equations, at the structures interfaces, for obtaining the scattered field components expressions as function of the patch surface currents and of the incident field. Galerkin method is used to determine the unknown coefficients in the boundary value problem. Curves for the reflection coefficient of several reflectarray geometries are presented as function of frequency and of the structural parameters

Proposta e implementação de uma arquitetura reconfigurável híbrida para aplicações baseadas em fluxo de dados

The increase of applications complexity has demanded hardware even more flexible and able to achieve higher performance. Traditional hardware solutions have not been successful in providing these applications constraints. General purpose processors have inherent flexibility, since they perform several tasks, however, they can not reach high performance when compared to application-specific devices. Moreover, since application-specific devices perform only few tasks, they achieve high performance, although they have less flexibility. Reconfigurable architectures emerged as an alternative to traditional approaches and have become an area of rising interest over the last decades. The purpose of this new paradigm is to modify the device s behavior according to the application. Thus, it is possible to balance flexibility and performance and also to attend the applications constraints. This work presents the design and implementation of a coarse grained hybrid reconfigurable architecture to stream-based applications. The architecture, named RoSA, consists of a reconfigurable logic attached to a processor. Its goal is to exploit the instruction level parallelism from intensive data-flow applications to accelerate the application s execution on the reconfigurable logic. The instruction level parallelism extraction is done at compile time, thus, this work also presents an optimization phase to the RoSA architecture to be included in the GCC compiler. To design the architecture, this work also presents a methodology based on hardware reuse of datapaths, named RoSE. RoSE aims to visualize the reconfigurable units through reusability levels, which provides area saving and datapath simplification. The architecture presented was implemented in hardware description language (VHDL). It was validated through simulations and prototyping. To characterize performance analysis some benchmarks were used and they demonstrated a speedup of 11x on the execution of some applications

Implementação Hardware/Software da estimação de movimento segundo o padrão H.264

Motion estimation is the main responsible for data reduction in digital video encoding. It is also the most computational damanding step. H.264 is the newest standard for video compression and was planned to double the compression ratio achievied by previous standards. It was developed by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG) as the product of a partnership effort known as the Joint Video Team (JVT). H.264 presents novelties that improve the motion estimation efficiency, such as the adoption of variable block-size, quarter pixel precision and multiple reference frames. This work defines an architecture for motion estimation in hardware/software, using a full search algorithm, variable block-size and mode decision. This work consider the use of reconfigurable devices, soft-processors and development tools for embedded systems such as Quartus II, SOPC Builder, Nios II and ModelSim

Arquitetura multiprocessada e reconfigurável para a síntese de redes de Petri em hardware

Uma arquitetura reconfigurável e multiprocessada para a implementação física de Redes de Petri foi desenvolvida em VHDL e mapeada sobre um FPGA. Convencionalmente, as Redes de Petri são transformadas em uma linguagem de descrição de hardware no nível de transferências entre registradores e um processo de síntese de alto nível é utilizado para gerar as funções booleanas e tabelas de transição de estado para que se possa, finalmente, mapeá-las num FPGA (Morris et al., 2000) (Soto and Pereira, 2001). A arquitetura proposta possui blocos lógicos reconfiguráveis desenvolvidos exclusivamente para a implementação dos lugares e das transições da rede, não sendo necessária a descrição da rede em níveis de abstração intermediários e nem a utilização de um processo de síntese para realizar o mapeamento da rede na arquitetura. A arquitetura permite o mapeamento de modelos de Redes de Petri com diferenciação entre as marcas e associação de tempo no disparo das transições, sendo composta por um arranjo de processadores reconfiguráveis, cada um dos quais representando o comportamento de uma transição da Rede de Petri a ser mapeada e por um sistema de comunicação, implementado por um conjunto de roteadores que são capazes de enviar pacotes de dados de um processador reconfigurável a outro. A arquitetura proposta foi validada num FPGA de 10.570 elementos lógicos com uma topologia que permitiu a implementação de Redes de Petri de até 9 transições e 36 lugares, atingindo uma latência de 15,4ns e uma vazão de até 17,12GB/s com uma freqüência de operação de 64,58MHz.

Detecção de faltas em sistemas de distribuição de energia elétrica usando dispositivos programáveis

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Desenvolvimento de uma arquitetura reconfigurável para o processamento de modelos no ambiente ABACUS

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Uma ferramenta alternativa para síntese de circuitos lógicos usando a técnica de circuito evolutivo

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Purificação e caracterização bioquímica da invertase extracelular produzida pelo fungo filamentoso Aspergillus terreus

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Purificação e caracterização bioquímica de tanases produzidas pelo fungo filamentoso Aspergillus phoenicis

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Estudo das atividades xilanásicas produzidas pelo fungo Aspergillus caespitosus

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)