A linearly tunable low-voltage CMOS transconductor with improved common-mode stability and its application to (gm)-C filters

A linearly tunable low-voltage CMOS transconductor featuring a new adaptative-bias mechanism that considerably improves the stability of the processed-signal common,mode voltage over the tuning range, critical for very-low voltage applications, is introduced. It embeds a feedback loop that holds input devices on triode region while boosting the output resistance. Analysis of the integrator frequency response gives an insight into the location of secondary poles and zeros as function of design parameters. A third-order low-pass Cauer filter employing the proposed transconductor was designed and integrated on a 0.8-mum n-well CMOS standard process. For a 1.8-V supply, filter characterization revealed f(p) = 0.93 MHz, f(s) = 1.82 MHz, A(min) = 44.08, dB, and A(max) = 0.64 dB at nominal tuning. Mined by a de voltage V-TUNE, the filter bandwidth was linearly adjusted at a rate of 11.48 kHz/mV over nearly one frequency decade. A maximum 13-mV deviation on the common-mode voltage at the filter output was measured over the interval 25 mV less than or equal to V-TUNE less than or equal to 200 mV. For V-out = 300 mV(pp) and V-TUNE = 100 mV, THD was -55.4 dB. Noise spectral density was 0.84 muV/Hz(1/2) @1 kHz and S/N = 41 dB @ V-out = 300 mV(pp) and 1-MHz bandwidth. Idle power consumption was 1.73 mW @V-TUNE = 100 mV. A tradeoff between dynamic range, bandwidth, power consumption, and chip area has then been achieved.

A linearly-tunable OTA-C sinusoidal oscillator for low-voltage applications

A low-voltage, low-power OTA-C sinusoidal oscillator based on a triode-MOSFET transconductor is here discussed. The classical quadrature model is employed and the transconductor inherent nonlinear characteristic with input voltage is used as the amplitude-stabilization element. An external bias VTUNE linearly adjusts the oscillation frequency. According to a standard 0.8μm CMOS n-well process, a prototype was integrated, with an effective area of 0.28mm2. Experimental data validate the theoretical analysis. For a single 1.8V-supply and 100mV≤VTUNE≤250mV, the oscillation frequency fo ranges from 0.50MHz to 1.125MHz, with a nearly constant gain KVCO=4.16KHz/mV. Maximum output amplitude is 374mVpp @1.12MHz. THD is -41dB @321mVpp. Maximum average consumption is 355μW.

Robust isothermal electric control of exchange bias at room temperature

Voltage-controlled spin electronics is crucial for continued progress in information technology. It aims at reduced power consumption, increased integration density and enhanced functionality where non-volatile memory is combined with highspeed logical processing. Promising spintronic device concepts use the electric control of interface and surface magnetization. From the combination of magnetometry, spin-polarized photoemission spectroscopy, symmetry arguments and first-principles calculations, we show that the (0001) surface of magnetoelectric Cr2O3 has a roughness-insensitive, electrically switchable magnetization. Using a ferromagnetic Pd/Co multilayer deposited on the (0001) surface of a Cr2O3 single crystal, we achieve reversible, room-temperature isothermal switching of the exchange-bias field between positive and negative values by reversing the electric field while maintaining a permanent magnetic field. This effect reflects the switching of the bulk antiferromagnetic domain state and the interface magnetization coupled to it. The switchable exchange bias sets in exactly at the bulk Néel temperature.

Aspects of a phased array radar feed and bias network design

Radar technologies have been developed to improve the efficiency when detecting targets. Radar is a system composed by several devices connected and working together. Depending on the type of radar, the improvements are focused on different functionalities of the radar. One of the most important devices composing a radar is the antenna, that sends the radio-frequency signal to the space in order to detect targets. This project is focused on a specific type of radar called phased array radar. This type of radar is characterized by its antenna, which consist on a linear array of radiating elements, in this particular case, eight dipoles working at the frequency band S. The main advantage introduced by the phased array antenna is that using the fundamentals of arrays, the directivity of the antenna can change by shifting the phase of the signal at the input of each radiating element. This can be done using phase shifters. Phase shifter consists on a device which produces a phase shift in the radio-frequency input signal depending on a control DC voltage. Using a phased array antenna allows changing the directivity of the antenna without a mechanical rotating system. The objective of this project is to design the feed network and the bias network of the phased antenna. The feed network consists on a parallel-fed network composed by power dividers that sends the radio-frequency signal from the source to each radiating element of the antenna. The bias network consists on a system that generates the control DC voltages supplied to the phase shifters in order to change the directivity. The architecture of the bias network is composed by a software, implemented in Matlab and run in a laptop which is connected to a micro-controller by a serial communication port. The software calculates the control DC voltages needed to obtain a determined directivity or scan angle. These values are sent by the serial communication port to the micro-controller as data. Then the micro-controller generates the desired control DC voltages and supplies them to the phase shifters. In this project two solutions for bias network are designed. Each one is tested and final conclusions are obtained to determine the advantages and disadvantages. Finally a graphic user interface is developed in order to make the system easy to use. RESUMEN. Las tecnologías empleadas por lo dispositivos radar se han ido desarrollando para mejorar su eficiencia y usabilidad. Un radar es un sistema formado por varios subsistemas conectados entre sí. Por lo que dependiendo del tipo de radar las mejoras se centran en los subsistemas correspondientes. Uno de los elementos más importantes de un radar es la antena. Esta se emplea para enviar la señal de radiofrecuencia al espacio y así poder detectar los posibles obstáculos del entorno. Este proyecto se centra en un tipo específico de radar llamado phased array radar. Este tipo de radar se caracteriza por la antena que es un array de antenas, en concreto para este proyecto se trata de un array lineal de ocho dipolos en la banda de frequencia S. El uso de una antena de tipo phased array supone una ventaja importante. Empleando los fundamentos de radiación aplicado a array de antenas se obtiene que la directividad de la antena puede ser modificada. Esto se consigue aplicando distintos desfasajes a la señal de radiofrecuencia que alimenta a cada elemento del array. Para aplicar los desfasajes se emplea un desplazador de fase, este dispositivo aplica una diferencia de fase a su salida con respecto a la señal de entrada dependiendo de una tensión continua de control. Por tanto el empleo de una antena de tipo phased array supone una gran ventaja puesto que no se necesita un sistema de rotación para cambiar la directividad de la antena. El objetivo principal del proyecto consiste en el diseño de la red de alimentación y la red de polarización de la antena de tipo phased array. La red de alimentación consiste en un circuito pasivo que permite alimentar a cada elemento del array con la misma cantidad de señal. Dicha red estará formada por divisores de potencia pasivos y su configuración será en paralelo. Por otro lado la red de polarización consiste en el diseño de un sistema automático que permite cambiar la directividad de la antena. Este sistema consiste en un programa en Matlab que es ejecutado en un ordenador conectado a un micro-controlador mediante una comunicación serie. El funcionamiento se basa en calcular las tensiones continuas de control, que necesitan los desplazadores de fase, mediante un programa en Matlab y enviarlos como datos al micro-controlador. Dicho micro-controlador genera las tensiones de control deseadas y las proporciona a cada desplazador de fase, obteniendo así la directividad deseada. Debido al amplio abanico de posibilidades, se obtienen dos soluciones que son sometidas a pruebas. Se obtienen las ventajas y desventajas de cada una. Finalmente se implementa una interfaz gráfica de usuario con el objetivo de hacer dicho sistema manejable y entendible para cualquier usuario.

Current-voltage response of a spherical plasma contactor

A theoretical model for a contactor, collecting electrons from an ambient, unmagnetized plasma and emitting a current Iiis discussed. The relation between Ii and the potential bias of the contactor is found to be crucial for the formation of a quasineutral core around the anode and, consequently, for the current colleted. Approximate analytical laws and charts for the current-voltage response are provided.

The high-bias stability of monatomic chains

For the metals Au, Pt and Ir it is possible to form freely suspended monatomic chains between bulk electrodes. The atomic chains sustain very large current densities, but finally fail at high bias. We investigate the breaking mechanism, that involves current-induced heating of the atomic wires and electromigration forces. We find good agreement of the observations for Au based on models due to Todorov and co-workers. The high-bias breaking of atomic chains for Pt can also be described by the models, although here the parameters have not been obtained independently. In the limit of long chains the breaking voltage decreases inversely proportional to the length.

Effects of alternating current voltage amplitude and oxide capacitance on mid-gap interface state defect density extractions in In0.53Ga 0.47As capacitors

This work looks at the effect on mid-gap interface state defect density estimates for In0.53Ga0.47As semiconductor capacitors when different AC voltage amplitudes are selected for a fixed voltage bias step size (100 mV) during room temperature only electrical characterization. Results are presented for Au/Ni/Al2O3/In0.53Ga0.47As/InP metal–oxide–semiconductor capacitors with (1) n-type and p-type semiconductors, (2) different Al2O3 thicknesses, (3) different In0.53Ga0.47As surface passivation concentrations of ammonium sulphide, and (4) different transfer times to the atomic layer deposition chamber after passivation treatment on the semiconductor surface—thereby demonstrating a cross-section of device characteristics. The authors set out to determine the importance of the AC voltage amplitude selection on the interface state defect density extractions and whether this selection has a combined effect with the oxide capacitance. These capacitors are prototypical of the type of gate oxide material stacks that could form equivalent metal–oxide–semiconductor field-effect transistors beyond the 32 nm technology node. The authors do not attempt to achieve the best scaled equivalent oxide thickness in this work, as our focus is on accurately extracting device properties that will allow the investigation and reduction of interface state defect densities at the high-k/III–V semiconductor interface. The operating voltage for future devices will be reduced, potentially leading to an associated reduction in the AC voltage amplitude, which will force a decrease in the signal-to-noise ratio of electrical responses and could therefore result in less accurate impedance measurements. A concern thus arises regarding the accuracy of the electrical property extractions using such impedance measurements for future devices, particularly in relation to the mid-gap interface state defect density estimated from the conductance method and from the combined high–low frequency capacitance–voltage method. The authors apply a fixed voltage step of 100 mV for all voltage sweep measurements at each AC frequency. Each of these measurements is repeated 15 times for the equidistant AC voltage amplitudes between 10 mV and 150 mV. This provides the desired AC voltage amplitude to step size ratios from 1:10 to 3:2. Our results indicate that, although the selection of the oxide capacitance is important both to the success and accuracy of the extraction method, the mid-gap interface state defect density extractions are not overly sensitive to the AC voltage amplitude employed regardless of what oxide capacitance is used in the extractions, particularly in the range from 50% below the voltage sweep step size to 50% above it. Therefore, the use of larger AC voltage amplitudes in this range to achieve a better signal-to-noise ratio during impedance measurements for future low operating voltage devices will not distort the extracted interface state defect density.

Interface properties and capacitance-voltage behaviour of diamond devices prepared by microwave-assisted CVD

Free standing diamond films were used to study the effect of diamond surface morphology and microstructure on the electrical properties of Schottky barrier diodes. By using free standing films both the rough top diamond surface and the very smooth bottom surface are available for post-metal deposition. Rectifying electrical contacts were then established either with the smooth or the rough surface. The estimate of doping density from the capacitance-voltage plots shows that the smooth surface has a lower doping density when compared with the top layers of the same film. The results also show that surface roughness does not contribute significantly to the frequency dispersion of the small signal capacitance. The electrical properties of an abrupt asymmetric n(+)(silicon)-p(diamond) junction have also been measured. The I-V curves exhibit at low temperatures a plateau near zero bias, and show inversion of rectification. Capacitance-voltage characteristics show a capacitance minimum with forward bias, which is dependent on the environment conditions. It is proposed that this anomalous effect arises from high level injection of minority carriers into the bulk.

Implications of low breakdown voltage of component subcells on external quantum efficiency measurements of multijunction solar cells

The electrical and optical coupling between subcells in a multijunction solar cell affects its external quantum efficiency (EQE) measurement. In this study, we show how a low breakdown voltage of a component subcell impacts the EQE determination of a multijunction solar cell and demands the use of a finely adjusted external voltage bias. The optimum voltage bias for the EQE measurement of a Ge subcell in two different GaInP/GaInAs/Ge triple-junction solar cells is determined both by sweeping the external voltage bias and by tracing the I–V curve under the same light bias conditions applied during the EQE measurement. It is shown that the I–V curve gives rapid and valuable information about the adequate light and voltage bias needed, and also helps to detect problems associated with non-ideal I–V curves that might affect the EQE measurement. The results also show that, if a non-optimum voltage bias is applied, a measurement artifact can result. Only when the problems associated with a non-ideal I–V curve and/or a low breakdown voltage have been discarded, the measurement artifacts, if any, can be attributed to other effects such as luminescent coupling between subcells.

Interface properties and capacitance-voltage behaviour of diamond devices prepared by microwave-assisted CVD

Free standing diamond films were used to study the effect of diamond surface morphology and microstructure on the electrical properties of Schottky barrier diodes. By using free standing films both the rough top diamond surface and the very smooth bottom surface are available for post-metal deposition. Rectifying electrical contacts were then established either with the smooth or the rough surface. The estimate of doping density from the capacitance-voltage plots shows that the smooth surface has a lower doping density when compared with the top layers of the same film. The results also show that surface roughness does not contribute significantly to the frequency dispersion of the small signal capacitance. The electrical properties of an abrupt asymmetric n(+)(silicon)-p(diamond) junction have also been measured. The I-V curves exhibit at low temperatures a plateau near zero bias, and show inversion of rectification. Capacitance-voltage characteristics show a capacitance minimum with forward bias, which is dependent on the environment conditions. It is proposed that this anomalous effect arises from high level injection of minority carriers into the bulk.

Bias-induced threshold voltages shifts in thin-film organic transistors

An investigation into the stability of metal-insulator-semiconductor (MIS) transistors based on alpha-sexithiophene is reported. In particular, the kinetics of the threshold voltage shift upon application of a gate bias has been determined. The kinetics follow stretched-hyperbola-type behavior, in agreement with the formalism developed to explain metastability in amorphous-silicon thin-film transistors. Using this model, quantification of device stability is possible. Temperature-dependent measurements show that there are two processes involved in the threshold voltage shift, one occurring at Tapproximate to220 K and the other at Tapproximate to300 K. The latter process is found to be sample dependent. This suggests a relation between device stability and processing parameters. (C) 2004 American Institute of Physics.

Correcting for bias when estimating the cost of hospital-acquired infection : an analysis of lower respiratory tract infections in non-surgical patients

Hospital acquired infections (HAI) are costly but many are avoidable. Evaluating prevention programmes requires data on their costs and benefits. Estimating the actual costs of HAI (a measure of the cost savings due to prevention) is difficult as HAI changes cost by extending patient length of stay, yet, length of stay is a major risk factor for HAI. This endogeneity bias can confound attempts to measure accurately the cost of HAI. We propose a two-stage instrumental variables estimation strategy that explicitly controls for the endogeneity between risk of HAI and length of stay. We find that a 10% reduction in ex ante risk of HAI results in an expected savings of £693 ($US 984).