972 resultados para ARM Linux


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门禁系统主要负责对出入通道进行管制,是社区楼宇安全监控系统的一部分。传统的门禁系统通常采用密码识别、卡片识别的方式进行验证,由于密码、卡片容易被盗用、丢失,系统安全性不高。在通信方式上传统门禁系统通常采用RS485或者RS232连接,传输距离、速度和连接终端数均受限制。本文提出的人像识别门禁系统解决方案采用ARM-Linux系统平台,依靠社区宽带综合业务网的传输和存储能力,结合密码、RFID和人像识别三种识别方式,利用网络技术和生物识别技术达到识别率高、响应速度快、扩展能力强的要求,并能够与驻地网的其它业务集成,提供业务级的联动服务。此外,该门禁系统还支持用户使用电话开门,由服务器完成对用户来电的识别和防伪验证。本文工作的主要贡献是:参与了ARM-Linux系统的裁剪、移植和声卡驱动的修改;建立了ARM-Linux交叉编译环境;完成了门禁前端软件系统的整体设计和实现;完成了服务器软件电话呼叫响应子系统的设计。

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启动一个新的进程必须分配给它独立的地址空间,建立众多的数据表来维护它的代码段、堆栈段和数据段,这是一种“昂贵”的多任务工作方式。相比之下,多线程技术是一种非常“节俭”的多任务操作方式。本文针对SPM纳米操作系统中的ARM嵌入式开发平台的任务特点,分析比较了Linux系统下多线程和多进程技术的性能,为设计实现ARM开发平台下的多线程程序起到关键的作用。

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近年来,随着微纳米科技的迅速发展,机电产品有望向更微观化、高性能化发展,这将促进材料、制造、电子、生物医学、信息等领域新的科学技术出现,在新的科学技术层次上为可持续发展的理论提供物质和技术保障。微纳米科技最终目标是研究和发现微纳尺度物质所具有的新颖的物理、化学和生物学现象与特性。并以此为基础来设计、制作、组装成新的材料、组件或系统,实现与之相应的特定功能,促进新的科学技术发展与变革,这无疑具有十分重要的科学意义和经济价值。而实现这个目标的使能技术便是微纳米尺度下观测、操作和装配的科学方法与相关的技术和装备,因此开展微纳米操作研究具有特别重要的意义。微纳米操作是微纳米制造科学技术的重要内容之一,使用探针模式的机器人化微纳操作方法,实现在微纳米尺度物体的可控操作,对促进我国微纳米科学技术发展具有特别重要的意义。 目前已有的基于探针的纳米技术装置如SPM (Scanning Probe Microscope)是基于探针模式的纳米观测基本装置。在此基础上研究发展的基于探针的纳米操作已成为纳米科技研究的新领域,是目前世界上各国正在大力开发的前沿研究课题。但目前市场上的SPM等纳米观测设备缺乏驱动控制与信息交互功能和开放界面,限制了用户在此基础上开发纳米操作、装配等功能的能力,因而研究具有信息交互能力的、可进行在线操作控制与宏-微-纳观信息交互的纳米操作监控系统,进而发展成具有自动化/机器人化功能的纳米作业系统队纳米科学技术发展、纳米制造的实现无疑具有重要意义。本论文的科研内容是以面向纳米制造的机器人化系统为研究背景,在自主技术的基础上,开展应用ARM嵌入式系统构成纳米作业系统的实时控制器研究。实时多任务的操作控制系统是纳米作业系统的核心技术,可以实时进行基于探针的传感信息采集、状态反馈控制、形貌观测数据生成、作业运动轨迹生成、位置反馈控制等功能的数据处理与实现。本论文重点介绍以SAMSUNG公司的ARM9处理器芯片S3C2410为嵌入式控制器系统的核心,在移植嵌入式Linux作为操作系统的基础上,开发具有实时数据采集与控制指令、通信功能的人机交互界面。基于ARM的实时控制器的研究为探针模式的纳米观测与操作系统开发提供了关键技术,可以提供开放的AFM系统,促进操作型纳米系统的研究与实现,可以保证纳米观测与操作控制的实时性,可以为纳米作业控制方法提供方便的编程、开发功能。本论文主要研究了面向纳米作业的基于ARM嵌入式实时控制器硬件结构及软件系统的研究与开发过程。首先介绍嵌入式系统的基本概念和特点;其次介绍基于SPM模式的纳米操作系统性能与技术特点;第三,根据纳米作业系统的技术功能要求,详细介绍了具有实时多任务管理功能的硬件系统的设计,重点解决核心板和扩展板各部分功能模块的设计;第四,详细介绍了嵌入式Linux操作系统下的应用程序开发模式及开发过程;最后,详细介绍了嵌入式Linux操作系统下的应用程序开发,主要工作是完成SPM纳米操作系统中的ARM开发平台的功能接口模块的调试及Linux系统下多线程技术在本系统中的应用。本次毕业设计已完成ARM开发平台在整个SPM纳米操作系统中要实现的各个功能模块,结合SPM纳米操作系统的实时性问题,进行了ARM开发平台的系统软件架构分析和利用多线程技术的以太网通信实验,在一定程度上提高了纳米操作系统中的实时性和成像质量。

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同步加速器对控制信号的时间约束要求非常严格,时序控制是加速器控制系统中十分重要的环节。在兰州重离子加速器冷却储存环(HIRFL-CSR)控制系统中,时序控制主要采用FPGA+ARM+linux+DSP的体系结构。本文介绍基于FPGA和uClinux操作系统的片上可编程系统(SOPC)的设计,可将目前ARM+LINUX的工作完全集成在FPGA内实现,省去专用ARM芯片。其最高工作频率可达185 MHz,硬件资源消耗不到4%。片上可编程系统的硬件处理器系统和操作系统都可根据具体需求重新裁剪和配置。SOPC技术在加速器物理以及其他领域有着非常广泛的应用前景。

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本文论述了用于兰州重离子加速器冷却储存环(HIRFL-CSR)前端控制系统的总线控制器的FPGA设计及其基于ARM-Linux下的驱动程序设计。该总线控制器采用Altera公司的ACEX系列中的EP1K30实现,通过VME总线背板同其它VME设备(CPLD)通信,可读VME设备数据,监视电源运行状况,也可向VME设备发送命令和写数据,并且能够响应VME设备中断,读中断数据。为了能够通过AT91RM9200控制器访问VME总线控制器,必须为其编写相应的驱动程序。驱动程序定义了应用程序调用接口和数据格式,并实现了中断机制、多进程访问和数据的突发(burst)读写。

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凭借Internet的优势,随着性能的提高和价格的下降,嵌入式系统的应用也更加的普及和广泛.本文介绍了在ARM-Linux操作系统下,基于USB接口的五线电阻触摸屏的嵌入式驱动程序和一种可用于纠正一些常见机械性误差的触摸屏三点校准算法,驱动的编译配置和算法的实现。由于校准算法简单、灵活,用软件实现,可降低嵌入式系统中的成本,提高产品质量。

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In practically all vertical markets and in every region of the planet, loyalty marketers have adopted the tactic of recognition and reward to identify, maintain and increase the yield of their customers. Several strategies have been adopted by companies, and the most popular among them is the loyalty program, which displays a loyalty club to manage these rewards. But the problem with loyalty programs is that customer identification and transfer of loyalty points are made in a semiautomatic. Aiming at this, this paper presents a master's embedded business automation solution called e-Points. The goal of e-Points is munir clubs allegiances with fully automated tooling technology to identify customers directly at the point of sales, ensuring greater control over the loyalty of associate members. For this, we developed a hardware platform with embedded system and RFID technology to be used in PCs tenant, a smart card to accumulate points with every purchase and a web server, which will provide services of interest to retailers and customers membership to the club

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Low-power processors and accelerators that were originally designed for the embedded systems market are emerging as building blocks for servers. Power capping has been actively explored as a technique to reduce the energy footprint of high-performance processors. The opportunities and limitations of power capping on the new low-power processor and accelerator ecosystem are less understood. This paper presents an efficient power capping and management infrastructure for heterogeneous SoCs based on hybrid ARM/FPGA designs. The infrastructure coordinates dynamic voltage and frequency scaling with task allocation on a customised Linux system for the Xilinx Zynq SoC. We present a compiler-assisted power model to guide voltage and frequency scaling, in conjunction with workload allocation between the ARM cores and the FPGA, under given power caps. The model achieves less than 5% estimation bias to mean power consumption. In an FFT case study, the proposed power capping schemes achieve on average 97.5% of the performance of the optimal execution and match the optimal execution in 87.5% of the cases, while always meeting power constraints.

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Trabalho de Projeto para obtenção do grau de Mestre em Engenharia Informática e de Computadores

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The purpose of this document is to create a modest integration guide for embedding a Linux Operating System on ZedBoard development platform, based on Xilinx’s Zynq-7000 All Programmable System on Chip which contains a dual core ARM Cortex-A9 and a 7 Series FPGA Artix-7. The integration process has been structured in four chapters according to the logic generation of the different parts that compose the embedded system. With the intention of automating the generation process of a complete Linux distribution specific for ZedBoard platform, BuildRoot development platform it is used. Once the embedding process finished, it was decided to add to the system the required functionalities for adding support for IEEE1588 Standard for Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, through a user space Linux program which implements the protocol. That PTP user space implementation program has been cross-compiled, executed on target and tested for evaluating the functionalities added. RESUMEN El propósito de este documento es crear una modesta guía de integración de un sistema operativo Linux para la plataforma de desarrollo ZedBoard, basada en un System on Chip del fabricante Xilinx llamado Zynq-7000. Este System on Chip está compuesto por un procesador de doble núcleo ARM Cortex-A9 y una FPGA de la Serie 7 equiparable a una Artix-7. El proceso de integración se ha estructurado en cuatro grandes capítulos que se rigen según el orden lógico de generación de las distintas partes por las que el sistema empotrado está compuesto. Con el ánimo de automatizar el proceso de creación de una distribución de Linux específica para la plataforma ZedBoard, se ha utilizado la plataforma de desarrollo BuildRoot. Una vez terminado el proceso de integración del sistema empotrado, se procedió a dar dotar al sistema de las funcionalidades necesarias para dar soporte al estándar de sincronización de relojes en redes de área local, PTP IEEE1588, a través de una implementación del mismo en un programa de lado de usuario el cual ha sido compilado, ejecutado y testeado para evaluar el correcto funcionamiento de las funcionalidades añadidas.

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We attempt to integrate and start up the set of necessary tools to deploy the design cycle of embedded systems based on Embedded Linux on a "Cyclone V SoC" made by Altera. First, we will analyze the available tools for designing the hardware system of the SoCkit development kit, made by Arrow, which has a "Cyclone V SoC" system (based on a "ARM Cortex-A9 MP Core" architecture). When designing the SoCkit board hardware, we will create a new peripheral to integrate it into the hardware system, so it can be used as any other existent resource of the SoCkit board previously configured. Next, we will analyze the tools to generate an Embedded Linux distribution adapted to the SoCkit board. In order to generate the Linux distribution we will use, on the one hand, a software package from Yocto recommended by Altera; on the other hand, the programs and tools of Altera, Embedded Development Suite. We will integrate all the components needed to build the Embedded Linux distribution, creating a complete and functional system which can be used for developing software applications. Finally, we will study the programs for developing and debugging applications in C or C++ language that will be executed in this hardware platform, then we will program a Linux application as an example to illustrate the use of SoCkit board resources. RESUMEN Se pretende integrar y poner en funcionamiento el conjunto de herramientas necesarias para desplegar el ciclo de diseño de sistemas embebidos basados en "Embedded Linux" sobre una "Cyclone V SoC" de Altera. En primer lugar, se analizarán las diversas herramientas disponibles para diseñar el sistema hardware de la tarjeta de desarrollo SoCkit, fabricada por Arrow, que dispone de un sistema "Cyclone V SoC" (basado en una arquitectura "ARM Cortex A9 MP Core"). En el diseño hardware de la SoCkit se creará un periférico propio y se integrará en el sistema, pudiendo ser utilizado como cualquier otro recurso de la tarjeta ya existente y configurado. A continuación, también se analizarán las herramientas para generar una distribución de "Embedded Linux" adaptado a la placa SoCkit. Para generar la distribución de Linux se utilizará, por una parte, un paquete software de Yocto recomendado por Altera y, por otra parte, las propias herramientas y programas de Altera. Se integrarán todos los componentes necesarios para construir la distribución Linux, creando un sistema completo y funcional que se pueda utilizar para el desarrollo de aplicaciones software. Por último, se estudiarán las herramientas para el diseño y depuración de aplicaciones en lenguaje C ó C++ que se ejecutarán en esta plataforma hardware. Se pretende desarrollar una aplicación de ejemplo para ilustrar el uso de los recursos más utilizados de la SoCkit.

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This project is divided into two main parts: The first part shows the integration of an Embedded Linux operating system on a development hardware platform named Zedboard. This platform contains a Zynq-7000 System on Chip (Soc) which is composed by two dual core ARM Cortex-A9 processors and a FPGA Artix-7. The Embedded Linux is built with Linuxlink, a Timesys tool. Meanwhile, the platform hardware configuration is done with Xilinx Vivado. The system is loaded with an SD card which requires to have every files needed for the booting process and for the operation. Some of these files are generated with Xilinx SDK software. The second part starts up from the system already built to integrate a peripheral in the Zynq-7000 FPGA. Also the drivers for controlling the peripheral from the operating system are developed. Finally, a user space program is created to test both of them. RESUMEN. Este proyecto consta de dos partes: La primera muestra la integración de un sistema operativo Linux embebido en una plataforma de desarrollo hardware llamada Zedboard. Esta plataforma utiliza un System on Chip (SoC) Zynq-7000 que está formado por dos procesadores ARM Cortex-A9 de doble núcleo y una FPGA Artix-7. El Linux embebido se construye utilizando la herramienta Linuxlink de Timesys, mientras que el hardware de la plataforma de desarrollo se configura con Vivado de Xilinx. El sistema se carga en una tarjeta SD que debe tener todos los archivos necesarios para completar el arranque y hacer funcionar el sistema. Algunos de esos archivos se generan con la herramienta SDK de Xilinx. En la segunda parte se utiliza el sistema construido para integrar un periférico en la FPGA del Zynq-7000, haciendo uso de Vivado, y se desarrollan los drivers necesarios para utilizarlo mediante el sistema operativo. Para probar esta última parte se desarrolla un programa de espacio de usuario.

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The aim of the present study was to examine body concern and satisfactions in 191 female university students and their relationships with measured body composition and circumferences of selected body parts. Body composition and circumference measurements of participants were conducted after obtaining their consent. Body concern and satisfaction were determined using the Body Shape Questionnaire (BSQ) and the Body parts and General subscales from the Body Satisfaction Scales (BSS). Increase in body composition and circumferences were associated with decrease in body concern and satisfaction. Increase in body size, including circumferences did not decrease whole body satisfaction but increased dissatisfaction at the abdominal, arm and thigh regions.

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Using an in situ-generated calcium-based initiating species derived from pentaerythritol, the bulk synthesis of well-defined 4-arm star poly(L-lactide) oligomers has been studied in detail. The substitution of the traditional initiator, stannous octoate with calcium hydride allowed the synthesis of oligomers that had both low PDIs and a comparable number of polymeric arms (3.7 – 3.9) to oligomers of similar molecular weight. Investigations into the degree of control observed during the course of the polymerization found that the insolubility of pentaerythritol in molten L-lactide resulted in an uncontrolled polymerization only when the feed mole ratio of L-lactide to pentaerythritol was 13. At feed ratios of 40 and greater, a pseudo-living polymerization was observed. As part of this study, in situ FT-Raman spectroscopy was demonstrated to be a suitable method to monitor the kinetics of the ring-opening polymerization (ROP) of lactide. The advantages of using this technique rather than FT-IR-ATR and 1H NMR for monitoring L-lactide consumption during polymerization are discussed.