Fabrication of a two-terminal super conducting device with a poled ferroelectric control layer

The discovery of High-Temperature Superconductors (HTSCs) has spurred the need for the fabrication of superconducting electronic devices able to match the performance of today's semiconductor devices. While there are several HTSCs in use today, YBaCuO7-x (YBCO) is the better characterized and more widely used material for small electronic applications. This thesis explores the fabrication of a Two-Terminal device with a superconductor and a painted on electrode as the terminals and a ferroelectric, BaTiO 3 (BTO), in between. The methods used to construct such a device and the challenges faced with the fabrication of a viable device will be examined. The ferroelectric layer of the devices that proved adequate for use were poled by the application of an electric field. Temperature Bias Poling used an applied field of 105V/cm at a temperature of approximately 135*C. High Potential Poling used an applied field of 106V/cm at room temperature (20*C). The devices were then tested for a change in their superconducting critical temperature, Tc. A shift of 1-2K in the Tc(onset) of YBCO was observed for Temperature Bias Poling and a shift of 2-6K for High Potential Poling. These are the first reported results of the field effect using BTO on YBCO. The mechanism involved in the shifting of Tc will be discussed along with possible applications.

Leakage temperature dependency aware real-time scheduling for power and thermal optimization

Catering to society's demand for high performance computing, billions of transistors are now integrated on IC chips to deliver unprecedented performances. With increasing transistor density, the power consumption/density is growing exponentially. The increasing power consumption directly translates to the high chip temperature, which not only raises the packaging/cooling costs, but also degrades the performance/reliability and life span of the computing systems. Moreover, high chip temperature also greatly increases the leakage power consumption, which is becoming more and more significant with the continuous scaling of the transistor size. As the semiconductor industry continues to evolve, power and thermal challenges have become the most critical challenges in the design of new generations of computing systems. ^ In this dissertation, we addressed the power/thermal issues from the system-level perspective. Specifically, we sought to employ real-time scheduling methods to optimize the power/thermal efficiency of the real-time computing systems, with leakage/ temperature dependency taken into consideration. In our research, we first explored the fundamental principles on how to employ dynamic voltage scaling (DVS) techniques to reduce the peak operating temperature when running a real-time application on a single core platform. We further proposed a novel real-time scheduling method, “M-Oscillations” to reduce the peak temperature when scheduling a hard real-time periodic task set. We also developed three checking methods to guarantee the feasibility of a periodic real-time schedule under peak temperature constraint. We further extended our research from single core platform to multi-core platform. We investigated the energy estimation problem on the multi-core platforms and developed a light weight and accurate method to calculate the energy consumption for a given voltage schedule on a multi-core platform. Finally, we concluded the dissertation with elaborated discussions of future extensions of our research. ^

Critical Analysis on the Structural and Magnetic Properties of Bulk and Nanocrystalline Cu-Fe-O

Nanocrystalline and bulk samples of “Fe”-doped CuO were prepared by coprecipitation and ceramic methods. Structural and compositional analyses were performed using X-ray diffraction, SEM, and EDAX. Traces of secondary phases such as CuFe2O4, Fe3O4, and α-Fe2O3 having peaks very close to that of the host CuO were identified from the Rietveld profile analysis and the SAED pattern of bulk and nanocrystalline Cu0.98Fe0.02O samples. Vibrating Sample Magnetometer (VSM) measurements show hysteresis at 300 K for all the samples. The ferrimagnetic Neel transition temperature () was found to be around 465°C irrespective of the content of “Fe”, which is close to the value of cubic CuFe2O4. High-pressure X-Ray diffraction studies were performed on 2% “Fe”-doped bulk CuO using synchrotron radiation. From the absence of any strong new peaks at high pressure, it is evident that the secondary phases if present could be less than the level of detection. Cu2O, which is diamagnetic by nature, was also doped with 1% of “Fe” and was found to show paramagnetic behavior in contrast to the “Fe” doped CuO. Hence the possibility of intrinsic magnetization of “Fe”-doped CuO apart from the secondary phases is discussed based on the magnetization and charge state of “Fe” and the host into which it is substituted.

Leakage Temperature Dependency Aware Real-Time Scheduling for Power and Thermal Optimization

Catering to society’s demand for high performance computing, billions of transistors are now integrated on IC chips to deliver unprecedented performances. With increasing transistor density, the power consumption/density is growing exponentially. The increasing power consumption directly translates to the high chip temperature, which not only raises the packaging/cooling costs, but also degrades the performance/reliability and life span of the computing systems. Moreover, high chip temperature also greatly increases the leakage power consumption, which is becoming more and more significant with the continuous scaling of the transistor size. As the semiconductor industry continues to evolve, power and thermal challenges have become the most critical challenges in the design of new generations of computing systems. In this dissertation, we addressed the power/thermal issues from the system-level perspective. Specifically, we sought to employ real-time scheduling methods to optimize the power/thermal efficiency of the real-time computing systems, with leakage/ temperature dependency taken into consideration. In our research, we first explored the fundamental principles on how to employ dynamic voltage scaling (DVS) techniques to reduce the peak operating temperature when running a real-time application on a single core platform. We further proposed a novel real-time scheduling method, “M-Oscillations” to reduce the peak temperature when scheduling a hard real-time periodic task set. We also developed three checking methods to guarantee the feasibility of a periodic real-time schedule under peak temperature constraint. We further extended our research from single core platform to multi-core platform. We investigated the energy estimation problem on the multi-core platforms and developed a light weight and accurate method to calculate the energy consumption for a given voltage schedule on a multi-core platform. Finally, we concluded the dissertation with elaborated discussions of future extensions of our research.