Improved Electronics for the Hall A Detectors at JLab: Summing Modules and VDC Amplifier/Discriminator Cards

Testing of summing electronics and VDC A/D Cards was performed to assure proper functioning and operation within defined parameters. In both the summing modules and the VDC A/D cards, testing for minimum threshold voltage for each channel and crosstalk between neighboring channels was performed. Additionally, the modules were installed in Hall A with input signals from shower detectors arranged to establish a trigger by summing signals together with the use of tested modules. Testing involved utilizing a pulser to mimic PMT signals, a discriminator, an attenuator, a scaler, a level translator, an oscilloscope, a high voltage power supply, and a special apparatus used to power and send signal to the A/D cards. After testing, modules were obtained that meet necessary criteria for use in the APEX experiment, and the A/D cards obtained were determined to have adequate specifications for their utilization, with specific results included in the appendix.

Power and thermal aware scheduling for real-time computing systems

Over the past few decades, we have been enjoying tremendous benefits thanks to the revolutionary advancement of computing systems, driven mainly by the remarkable semiconductor technology scaling and the increasingly complicated processor architecture. However, the exponentially increased transistor density has directly led to exponentially increased power consumption and dramatically elevated system temperature, which not only adversely impacts the system's cost, performance and reliability, but also increases the leakage and thus the overall power consumption. Today, the power and thermal issues have posed enormous challenges and threaten to slow down the continuous evolvement of computer technology. Effective power/thermal-aware design techniques are urgently demanded, at all design abstraction levels, from the circuit-level, the logic-level, to the architectural-level and the system-level. ^ In this dissertation, we present our research efforts to employ real-time scheduling techniques to solve the resource-constrained power/thermal-aware, design-optimization problems. In our research, we developed a set of simple yet accurate system-level models to capture the processor's thermal dynamic as well as the interdependency of leakage power consumption, temperature, and supply voltage. Based on these models, we investigated the fundamental principles in power/thermal-aware scheduling, and developed real-time scheduling techniques targeting at a variety of design objectives, including peak temperature minimization, overall energy reduction, and performance maximization. ^ The novelty of this work is that we integrate the cutting-edge research on power and thermal at the circuit and architectural-level into a set of accurate yet simplified system-level models, and are able to conduct system-level analysis and design based on these models. The theoretical study in this work serves as a solid foundation for the guidance of the power/thermal-aware scheduling algorithms development in practical computing systems.^

Transnational Capital and the Politics of Global Supply Chains

In the latest phase of globalization, transnational corporations based in the U.S. have worked closely with U.S. foreign policymakers to secure favorable foreign direct investment provisions within U.S. domestic legislation and within U.S. trade agreements. These interactions between transnational firms and the U.S. state have provided many of the preconditions for an expansion of foreign direct investment connected to capital liberalization and the growth of global supply chains from the 1980s to the present. This relationship is best conceptualized as representing a “transnational interest bloc,” whose policy objectives are incorporated within investment provisions in US-backed trade and investment agreements.