2 resultados para Zeros de polinômios

em Aston University Research Archive


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This thesis presents experimental investigations of the use of semiconductor optical amplifiers in a nonlinear loop mirror (SOA-NOLM) and its application in all-optical processing. The techniques used are mainly experimental and are divided into three major applications. Initially the semiconductor optical amplifier, SOA, is experimentally characterised and the optimum operating condition is identified. An interferometric switch based on a Sagnac loop with the SOA as the nonlinear element is employed to realise all-optical switching. All-optical switching is a very attractive alternative to optoelectronic conversion because it avoids the conversion from the optical to the electronic domain and back again. The first major investigation involves a carrier suppressed return to zero, CSRZ, format conversion and transmission. This study is divided into single channel and four channel WDM respectively. The optical bandwidth which limits the conversion is investigated. The improvement of the nonlinear tolerance in the CSRZ transmission is shown which shows the suitability of this format for enhancing system performance. Second, a symmetrical switching window is studied in the SOA-NOLM where two similar control pulses are injected into the SOA from opposite directions. The switching window is symmetric when these two control pulses have the same power and arrive at the same time in the SOA. Finally, I study an all-optical circulating shift register with an inverter. The detailed behaviour of the blocks of zeros and ones has been analysed in terms of their transient measurement. Good agreement with a simple model of the shift register is obtained. The transient can be reduced but it will affect the extinction ratio of the pulses.

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The behavior of a semiconductor optical amplifier (SOA)-based nonlinear loop mirror with feedback has been investigated as a potential device for all-optical signal processing. In the feedback device, input signal pulses (ones) are injected into the loop, and amplified reflected pulses are fed back into the loop as switching pulses. The feedback device has two stable modes of operation - block mode, where alternating blocks of ones and zeros are observed, and spontaneous clock division mode, where halving of the input repetition rate is achieved. Improved models of the feedback device have been developed to study its performance in different operating conditions. The feedback device could be optimized to give a choice of either of the two stable modes by shifting the arrival time of the switching pulses at the SOA. Theoretically, it was found possible to operate the device at only tens of fJ switching pulse energies if the SOA is biased to produce very high gain in the presence of internal loss. The clock division regime arises from the combination of incomplete SOA gain recovery and memory of the startup sequence that is provided by the feedback. Clock division requires a sufficiently high differential phase shift per unit differential gain, which is related to the SOA linewidth enhancement factor.