The application of H controller synthesis to high speed independent drive systems

This thesis describes work completed on the application of H controller synthesis to the design of controllers for single axis high speed independent drive design examples. H controller synthesis was used in a single controller format and in a self-tuning regulator, a type of adaptive controller. Three types of industrial design examples were attempted using H controller synthesis, both in simulation and on a Drives Test Facility at Aston University. The results were benchmarked against a Proportional, Integral and Derivative (PID) with velocity feedforward controller (VFF), the industrial standard for this application. An analysis of the differences between a H and PID with VFF controller was completed. A direct-form H controller was determined for a limited class of weighting function and plants which shows the relationship between the weighting function, nominal plant and the controller parameters. The direct-form controller was utilised in two ways. Firstly it allowed the production of simple guidelines for the industrial design of H controllers. Secondly it was used as the controller modifier in a self-tuning regulator (STR). The STR had a controller modification time (including nominal model parameter estimation) of 8ms. A Set-Point Gain Scheduling (SPGS) controller was developed and applied to an industrial design example. The applicability of each control strategy, PID with VFF, H, SPGS and STR, was investigated and a set of general guidelines for their use was determined. All controllers developed were implemented using standard industrial equipment.

A dynamic bandwidth reservation scheme for hybrid IEEE 802.16 wireless networks

A dynamic bandwidth reservation (DBR) scheme for hybrid IEEE 802.16 wireless networks is investigated, in which 802.16 networks serve as the backhaul for client networks, such as WiFi hotspots and cellular networks. The DBR scheme implemented in the subscription stations (SSs) (co-locating with access pointers) consists of two components: connection admission controller (CAC), and bandwidth controller (BC). The CAC processes the received connection set-up requests from the client networks connected to the SSs. The BC manages the request and release of bandwidth from the base station (BS). It dynamically changes the reserved bandwidth between a small number of values. Hysteresis is incorporated in bandwidth release to reduce bandwidth request signalling load and connection blocking probability. An analytical model is proposed to evaluate the performances of reserved bandwidth, connection blocking probability and signalling load. The impacts of hysteresis mechanism and probability of reservation request blocking are taken into account. Simulation verifies the analytical model. ©2008 IEEE.

A 10 Mb/s visible light communication system using a low bandwidth polymer light-emitting diode

In this paper we experimentally demonstrate a 10 Mb/s error free visible light communications (VLC) system using polymer light-emitting diodes (PLEDs) for the first time. The PLED under test is a blue emitter with ∼600 kHz bandwidth. Having such a low bandwidth means the introduction of an intersymbol interference (ISI) induced penalty at higher transmission speeds and thus the requirement for an equalizer. In this work we improve on previous literature by implementing a decision feedback equalizer, rather than a linear equalizer. Considering 7% and 20% forward error correction codes, transmission speeds up to ∼12 Mb/s can be supported.