Reducing main memory access latency through SDRAM address mapping techniques and access reordering mechanisms

As the performance gap between microprocessors and memory continues to increase, main memory accesses result in long latencies which become a factor limiting system performance. Previous studies show that main memory access streams contain significant localities and SDRAM devices provide parallelism through multiple banks and channels. These locality and parallelism have not been exploited thoroughly by conventional memory controllers. In this thesis, SDRAM address mapping techniques and memory access reordering mechanisms are studied and applied to memory controller design with the goal of reducing observed main memory access latency. The proposed bit-reversal address mapping attempts to distribute main memory accesses evenly in the SDRAM address space to enable bank parallelism. As memory accesses to unique banks are interleaved, the access latencies are partially hidden and therefore reduced. With the consideration of cache conflict misses, bit-reversal address mapping is able to direct potential row conflicts to different banks, further improving the performance. The proposed burst scheduling is a novel access reordering mechanism, which creates bursts by clustering accesses directed to the same rows of the same banks. Subjected to a threshold, reads are allowed to preempt writes and qualified writes are piggybacked at the end of the bursts. A sophisticated access scheduler selects accesses based on priorities and interleaves accesses to maximize the SDRAM data bus utilization. Consequentially burst scheduling reduces row conflict rate, increasing and exploiting the available row locality. Using a revised SimpleScalar and M5 simulator, both techniques are evaluated and compared with existing academic and industrial solutions. With SPEC CPU2000 benchmarks, bit-reversal reduces the execution time by 14% on average over traditional page interleaving address mapping. Burst scheduling also achieves a 15% reduction in execution time over conventional bank in order scheduling. Working constructively together, bit-reversal and burst scheduling successfully achieve a 19% speedup across simulated benchmarks.

Charge and spin transport in nanoscale junction from first principles

Recently nanoscale junctions consisting of 0-D nanostructures (single molecule) or 1-D nanostructures (semiconducting nanowire) sandwiched between two metal electrodes are successfully fabricated and characterized. What lacks in the recent developments is the understanding of the mechanism behind the observed phenomena at the level of atoms and electrons. For example, the origin of observed switching effect in a semiconducting nanowire due to the influence of an external gate bias is not yet understood at the electronic structure level. On the same context, different experimental groups have reported different signs in tunneling magneto-resistance for the same organic spin valve structure, which has baffled researchers working in this field. In this thesis, we present the answers to some of these subtle questions by investigating the charge and spin transport in different nanoscale junctions. A parameter-free, single particle Green’s function approach in conjunction with a posteriori density functional theory (DFT) involving a hybrid orbital dependent functional is used to calculate the tunneling current in the coherent transport limit. The effect of spin polarization is explicitly incorporated to investigate spin transport in a nanoscale junction. Through the electron transport studies in PbS nanowire junction, a new orbital controlled mechanism behind the switching of the current is proposed. It can explain the switching behavior, not only in PbS nanowire, but in other lead-chalcogenide nanowires as well. Beside this, the electronic structure properties of this nanowire are studied using periodic DFT. The quantum confinement effect was investigated by calculating the bandgap of PbS nanowires with different diameters. Subsequently, we explain an observed semiconducting to metallic phase transition of this nanowire by calculating the bandgap of the nanowire under uniform radial strain. The compressive radial strain on the nanowire was found to be responsible for the metallic to semiconducting phase transition. Apart from studying one dimensional nanostructure, we also present transport properties in zero dimensional single molecular junctions. We proposed a new codoping approach in a single molecular carborane junction, where a cation and an anion are simultaneously doped to find the role of a single atom in the device. The main purpose was to build a molecular junction where a single atom can dictate the flow of electrons in a circuit. Recent observations of both positive and negative sign in tunneling magnetoresistance (TMR) the using same organic spin-valve structure hasmystified researchers. From our spin dependent transport studies in a prototypical organic molecular tunneling device, we found that a 3% change in metal-molecule interfacial distance can alter the sign of TMR. Changing the interfacial distance by 3%, the number of participating eigenstates as well as their orbital characteristic changes for anti-parallel configuration of the magnetization at the two electrodes, leading to the sign reversal of the TMR. Apart from this, the magnetic proximity effect under applied bias is investigated quantitatively, which can be used to understand the observed unexpectedmagnetismin carbon basedmaterials when they are in close proximity with magnetic substrates.