Optimal current control for sub-unity power factor correction

Switching mode power supplies (SMPS) are subject to low power factor and high harmonic distortions. Active power-factor correction (APFC) is a technique to improve the power factor and to reduce the harmonic distortion of SMPSs. However, this technique results in double frequency output voltage variation which can be reduced by using a large output capacitance. Using large capacitors increases the cost and size of the converter. Furthermore, the capacitors are subject to frequent failures mainly caused by evaporation of the electrolytic solution which reduce the converter reliability. This thesis presents an optimal control method for the input current of a boost converter to reduce the size of the output capacitor. The optimum current waveform as a function of weighing factor is found by using the Euler Lagrange equation. A set of simulations are performed to determine the ideal weighing which gives the lowest possible output voltage variation as the converter still meets the IEC-61000-3-2 class-A harmonics requirements with a power factor of 0.8 or higher. The proposed method is verified by the experimental work. A boost converter is designed and it is run for different power levels, 100 W, 200 W and 400 W. The desired output voltage ripple is 10 V peak to peak for the output voltage of 200 Vdc. This ripple value corresponds to a ± 2.5% output voltage ripple. The experimental and the simulation results are found to be quite matching. A significant reduction in capacitor size, as high as 50%, is accomplished by using the proposed method.

SVPWM SWITCHING PATTERN FOR Z-SOURCE INVERTER, SIMULATION AND APPLICATION

The voltage source inverter (VSI) and current voltage source inverter (CSI) are widely used in industrial application. But the traditional VSIs and CSIs have one common problem: can’t boost or buck the voltage come from battery, which make them impossible to be used alone in Hybrid Electric Vehicle (HEV/EV) motor drive application, other issue is the traditional inverter need to add the dead-band time into the control sequence, but it will cause the output waveform distortion. This report presents an impedance source (Z-source network) topology to overcome these problems, it can use one stage instead of two stages (VSI or CSI + boost converter) to buck/boost the voltage come from battery in inverter system. Therefore, the Z-source topology hardware design can reduce switching element, entire system size and weight, minimize the system cost and increase the system efficiency. Also, a modified space vector pulse-width modulation (SVPWM) control method has been selected with the Z-source network together to achieve the best efficiency and lower total harmonic distortion (THD) at different modulation indexes. Finally, the Z-source inverter controlling will modulate under two control sequences: sinusoidal pulse width modulation (SPWM) and SVPWM, and their output voltage, ripple and THD will be compared.