Computations of Vector-Valued Siegel Modular Forms

We carry out some computations of vector-valued Siegel modular forms of degree two, weight (k, 2) and level one, and highlight three experimental results: (1) we identify a rational eigenform in a three-dimensional space of cusp forms; (2) we observe that non-cuspidal eigenforms of level one are not always rational; (3) we verify a number of cases of conjectures about congruences between classical modular forms and Siegel modular forms. Our approach is based on Satoh's description of the module of vector-valued Siegel modular forms of weight (k, 2) and an explicit description of the Hecke action on Fourier expansions. (C) 2013 Elsevier Inc. All rights reserved.

3CAM - A NOVEL TERNARY CONTENT ADDRESSABLE MEMORY USING THREE-VALUED LOGIC

Content Addressable Memory (CAM) is a special type of Complementary Metal-Oxide-Semiconductor (CMOS) storage element that allows for a parallel search operation on a memory stack in addition to the read and write operations yielded by a conventional SRAM storage array. In practice, it is often desirable to be able to store a “don’t care” state for faster searching operation. However, commercially available CAM chips are forced to accomplish this functionality by having to include two binary memory storage elements per CAM cell,which is a waste of precious area and power resources. This research presents a novel CAM circuit that achieves the “don’t care” functionality with a single ternary memory storage element. Using the recent development of multiple-voltage-threshold (MVT) CMOS transistors, the functionality of the proposed circuit is validated and characteristics for performance, power consumption, noise immunity, and silicon area are presented. This workpresents the following contributions to the field of CAM and ternary-valued logic:• We present a novel Simple Ternary Inverter (STI) transistor geometry scheme for achieving ternary-valued functionality in existing SOI-CMOS 0.18µm processes.• We present a novel Ternary Content Addressable Memory based on Three-Valued Logic (3CAM) as a single-storage-element CAM cell with “don’t care” functionality.• We explore the application of macro partitioning schemes to our proposed 3CAM array to observe the benefits and tradeoffs of architecture design in the context of power, delay, and area.