Solid-State Compatibilization of Immiscible Polymer Blends: Cryogenic Milling and Solid-State Shear Pulverization

The blending of common polymers allows for the rapid and facile synthesis of new materials with highly tunable properties at a fraction of the costs of new monomer development and synthesis. Most blends of polymers, however, are completely immiscible and separate into distinct phases with minimal phase interaction, severelydegrading the performance of the material. Cross-phase interactions and property enhancement can be achieved with these blends through reactive processing or compatibilizer addition. A new class of blend compatibilization relies on the mechanochemical reactions between polymer chains via solid-state, high energy processing. Two contrasting mechanochemical processing techniques are explored in this thesis: cryogenic milling and solid-state shear pulverization (SSSP). Cryogenic milling is a batch process where a milling rod rapidly impacts the blend sample while submerged within a bath of liquid nitrogen. In contrast, SSSP is a continuous process where blend components are subjected to high shear and compressive forces while progressing down a chilled twin-screw barrel. In the cryogenic milling study, through the application of a synthesized labeledpolymer, in situ formation of copolymers was observed for the first time. The microstructures of polystyrene/high-density polyethylene (PS/HDPE) blends fabricated via cryomilling followed by intimate melt-state mixing and static annealing were found to be morphologically stable over time. PS/HDPE blends fabricated via SSSP also showed compatibilization by way of ideal blend morphology through growth mechanisms with slightly different behavior compared to the cryomilled blends. The new Bucknell University SSSP instrument was carefully analyzed and optimized to produce compatibilized polymer blends through a full-factorial experiment. Finally, blends of varying levels of compatibilization were subjected to common material tests to determine alternative means of measuring and quantifying compatibilization,

3CAM - A NOVEL TERNARY CONTENT ADDRESSABLE MEMORY USING THREE-VALUED LOGIC

Content Addressable Memory (CAM) is a special type of Complementary Metal-Oxide-Semiconductor (CMOS) storage element that allows for a parallel search operation on a memory stack in addition to the read and write operations yielded by a conventional SRAM storage array. In practice, it is often desirable to be able to store a “don’t care” state for faster searching operation. However, commercially available CAM chips are forced to accomplish this functionality by having to include two binary memory storage elements per CAM cell,which is a waste of precious area and power resources. This research presents a novel CAM circuit that achieves the “don’t care” functionality with a single ternary memory storage element. Using the recent development of multiple-voltage-threshold (MVT) CMOS transistors, the functionality of the proposed circuit is validated and characteristics for performance, power consumption, noise immunity, and silicon area are presented. This workpresents the following contributions to the field of CAM and ternary-valued logic:• We present a novel Simple Ternary Inverter (STI) transistor geometry scheme for achieving ternary-valued functionality in existing SOI-CMOS 0.18µm processes.• We present a novel Ternary Content Addressable Memory based on Three-Valued Logic (3CAM) as a single-storage-element CAM cell with “don’t care” functionality.• We explore the application of macro partitioning schemes to our proposed 3CAM array to observe the benefits and tradeoffs of architecture design in the context of power, delay, and area.