The Design of XML-Based Model and Experiment Description Languages for Network Simulation

The Simulation Automation Framework for Experiments (SAFE) is a project created to raise the level of abstraction in network simulation tools and thereby address issues that undermine credibility. SAFE incorporates best practices in network simulationto automate the experimental process and to guide users in the development of sound scientific studies using the popular ns-3 network simulator. My contributions to the SAFE project: the design of two XML-based languages called NEDL (ns-3 Experiment Description Language) and NSTL (ns-3 Script Templating Language), which facilitate the description of experiments and network simulationmodels, respectively. The languages provide a foundation for the construction of better interfaces between the user and the ns-3 simulator. They also provide input to a mechanism which automates the execution of network simulation experiments. Additionally,this thesis demonstrates that one can develop tools to generate ns-3 scripts in Python or C++ automatically from NSTL model descriptions.

Design Simulation for Solar Energy Research and Education

Solar research is primarily conducted in regions with consistent sunlight, severely limiting research opportunities in many areas. Unfortunately, the unreliable weather in Lewisburg, PA, can prove difficult for such testing to be conducted. As such, a solar simulator was developed for educational purposes for the Mechanical Engineering department at Bucknell University. The objective of this work was to first develop a geometric model to evaluate a one sun solar simulator. This was intended to provide a simplified model that could be used without the necessity of expensive software. This model was originally intended to be validated experimentally, but instead was done using a proven ray tracing program, TracePro. Analyses with the geometrical model and TracePro demonstrated the influence the geometrical properties had results, specifically the reflector (aperture) diameter and the rim angle. Subsequently, the two were approaches were consistent with one another for aperture diameters 0.5 m and larger, and for rim angles larger than 45°. The constructed prototype, that is currently untested, was designed from information provided by the geometric model, includes a metal halide lamp with a 9.5 mm arc diameter and parabolic reflector with an aperture diameter of 0.631 meters. The maximum angular divergence from the geometrical model was predicted to be 30 mRadians. The average angular divergence in TraceProof the system was 19.5 mRadians, compared to the sun’s divergence of 9.2 mRadians. Flux mapping in TracePro showed an intensity of 1000 W/m2 over the target plane located 40 meters from the lamp. The error between spectrum of the metal halide lamp and the solar spectrum was 10.9%, which was found by comparing their respective Plank radiation distributions. The project did not satisfy the original goal of matching the angular divergence of sunlight, although the system could still to be used for optical testing. The geometric model indicated performance in this area could be improved by increasing the diameter of the reflector, as well as decreasing the source diameter. Although ray tracing software provides more information to analyze the simulator system, the geometrical model is adequate to provide enough information to design a system.

A Framework for the Automation of Discrete-Event Simulation Experiments

Simulation is an important resource for researchers in diverse fields. However, many researchers have found flaws in the methodology of published simulation studies and have described the state of the simulation community as being in a crisis of credibility. This work describes the project of the Simulation Automation Framework for Experiments (SAFE), which addresses the issues that undermine credibility by automating the workflow in the execution of simulation studies. Automation reduces the number of opportunities for users to introduce error in the scientific process thereby improvingthe credibility of the final results. Automation also eases the job of simulation users and allows them to focus on the design of models and the analysis of results rather than on the complexities of the workflow.

FPGA BASED DESIGN FOR ACCELERATED FAULT-TESTING OF INTEGRATED CIRCUITS

In the past few decades, integrated circuits have become a major part of everyday life. Every circuit that is created needs to be tested for faults so faulty circuits are not sent to end-users. The creation of these tests is time consuming, costly and difficult to perform on larger circuits. This research presents a novel method for fault detection and test pattern reduction in integrated circuitry under test. By leveraging the FPGA's reconfigurability and parallel processing capabilities, a speed up in fault detection can be achieved over previous computer simulation techniques. This work presents the following contributions to the field of Stuck-At-Fault detection: We present a new method for inserting faults into a circuit net list. Given any circuit netlist, our tool can insert multiplexers into a circuit at correct internal nodes to aid in fault emulation on reconfigurable hardware. We present a parallel method of fault emulation. The benefit of the FPGA is not only its ability to implement any circuit, but its ability to process data in parallel. This research utilizes this to create a more efficient emulation method that implements numerous copies of the same circuit in the FPGA. A new method to organize the most efficient faults. Most methods for determinin the minimum number of inputs to cover the most faults require sophisticated softwareprograms that use heuristics. By utilizing hardware, this research is able to process data faster and use a simpler method for an efficient way of minimizing inputs.