Molecular Dynamics Simulations of the d(TAT) Triple Helix

Molecular dynamics (MD) simulations have been used to study the dynamical and time-averaged characteristics of the DNA triple helix d(T)10âd(A)10âd(T)10. The structures sampled during the trajectory resemble closely the B-type model for the DNA triplex proposed on the basis of NMR data, although there are some subtle differences. Alternative P- and A-type conformations for the triplex, suggested from X-ray experiments, are not predicted to contribute significantly to the structure of the DNA triplex in solution. Comparison with the best available experimental data supports the correctnes of the MD-generated structures. The analysis of the collected data gives a detailed picture of the characteristics of triple-helix DNA. A new and interesting pattern of hydration, specific for triplex DNA, is an important observation. The results suggest that molecular dynamics can be useful for the study of novel nucleic acid structures.

FPGA BASED DESIGN FOR ACCELERATED FAULT-TESTING OF INTEGRATED CIRCUITS

In the past few decades, integrated circuits have become a major part of everyday life. Every circuit that is created needs to be tested for faults so faulty circuits are not sent to end-users. The creation of these tests is time consuming, costly and difficult to perform on larger circuits. This research presents a novel method for fault detection and test pattern reduction in integrated circuitry under test. By leveraging the FPGA's reconfigurability and parallel processing capabilities, a speed up in fault detection can be achieved over previous computer simulation techniques. This work presents the following contributions to the field of Stuck-At-Fault detection: We present a new method for inserting faults into a circuit net list. Given any circuit netlist, our tool can insert multiplexers into a circuit at correct internal nodes to aid in fault emulation on reconfigurable hardware. We present a parallel method of fault emulation. The benefit of the FPGA is not only its ability to implement any circuit, but its ability to process data in parallel. This research utilizes this to create a more efficient emulation method that implements numerous copies of the same circuit in the FPGA. A new method to organize the most efficient faults. Most methods for determinin the minimum number of inputs to cover the most faults require sophisticated softwareprograms that use heuristics. By utilizing hardware, this research is able to process data faster and use a simpler method for an efficient way of minimizing inputs.

Working With Families of Impaired Elderly

In this article, several approaches to working with the complexity of family relationships in later adulthood are described. Basic information on family forms and the pattern of family support for older adults is discussed. In addition, several examples of interventions with family members of older adults are reviewed. The goal of these activities is to increase the range of options available to older adults and their family caregivers.