Static and Dynamic Error Correction of a Computer-Aided Mechanical Navigation Linkage for Arthroscopic Hip Surgery

While beneficially decreasing the necessary incision size, arthroscopic hip surgery increases the surgical complexity due to loss of joint visibility. To ease such difficulty, a computer-aided mechanical navigation system was developed to present the location of the surgical tool relative to the patient¿s hip joint. A preliminary study reduced the position error of the tracking linkage with limited static testing trials. In this study, a correction method, including a rotational correction factor and a length correction function, was developed through more in-depth static testing. The developed correction method was then applied to additional static and dynamic testing trials to evaluate its effectiveness. For static testing, the position error decreased from an average of 0.384 inches to 0.153 inches, with an error reduction of 60.5%. Three parameters utilized to quantify error reduction of dynamic testing did not show consistent results. The vertex coordinates achieved 29.4% of error reduction, yet with large variation in the upper vertex. The triangular area error was reduced by 5.37%, however inconsistent among all five dynamic trials. Error of vertex angles increased, indicating a shape torsion using the developed correction method. While the established correction method effectively and consistently reduced position error in static testing, it did not present consistent results in dynamic trials. More dynamic paramters should be explored to quantify error reduction of dynamic testing, and more in-depth dynamic testing methodology should be conducted to further improve the accuracy of the computer-aided nagivation system.

Anisotropy in plastic deformation of extruded magnesium alloy sheet during tensile straining at high temperature

Experimental measurements are used to characterize the anisotropy of flow stress in extruded magnesium alloy AZ31 sheet during uniaxial tension tests at temperatures between 350°C and 450°C, and strain rates ranging from 10-5 to 10-2 s-1. The sheet exhibits lower flow stress and higher tensile ductility when loaded with the tensile axis perpendicular to the extrusion direction compared to when it is loaded parallel to the extrusion direction. This anisotropy is found to be grain size, strain rate, and temperature dependent, but is only weakly dependent on texture. A microstructure based model (D. E. Cipoletti, A. F. Bower, P. E. Krajewski, Scr. Mater., 64 (2011) 931–934) is used to explain the origin of the anisotropic behavior. In contrast to room temperature behavior, where anisotropy is principally a consequence of the low resistance to slip on the basal slip system, elevated temperature anisotropy is found to be caused by the grain structure of extruded sheet. The grains are elongated parallel to the extrusion direction, leading to a lower effective grain size perpendicular to the extrusion direction. As a result, grain boundary sliding occurs more readily if the material is loaded perpendicular to the extrusion direction.

Automated Portal Placement for Arthroscopic Hip Surgery

Placing portal incisions during arthroscopic hip surgery presents challenges for surgeons in terms of anatomic accessibility and patient safety. Based on key anatomic landmarks and portal placement information from recent literature, suggested portal incisions were determined. Guidance in the placement of the three most common portal incision locations (anterior, anterolateral, and posterolateral) for arthroscopic surgery; in addition to visual feedback on tool trajectory to the hip joint is provided in real time by a computer aided system for hip arthroscopy. By simplifying the portal placement process, one of the most challenging aspects of arthroscopic hip surgery, an increased use of this minimally invasive technique could be possible. In addition to portal information, improvements to an existing computer aided system for arthroscopic hip surgery, including a new hip model and redesigned mechanical tracking linkage, were completed.

FPGA BASED DESIGN FOR ACCELERATED FAULT-TESTING OF INTEGRATED CIRCUITS

In the past few decades, integrated circuits have become a major part of everyday life. Every circuit that is created needs to be tested for faults so faulty circuits are not sent to end-users. The creation of these tests is time consuming, costly and difficult to perform on larger circuits. This research presents a novel method for fault detection and test pattern reduction in integrated circuitry under test. By leveraging the FPGA's reconfigurability and parallel processing capabilities, a speed up in fault detection can be achieved over previous computer simulation techniques. This work presents the following contributions to the field of Stuck-At-Fault detection: We present a new method for inserting faults into a circuit net list. Given any circuit netlist, our tool can insert multiplexers into a circuit at correct internal nodes to aid in fault emulation on reconfigurable hardware. We present a parallel method of fault emulation. The benefit of the FPGA is not only its ability to implement any circuit, but its ability to process data in parallel. This research utilizes this to create a more efficient emulation method that implements numerous copies of the same circuit in the FPGA. A new method to organize the most efficient faults. Most methods for determinin the minimum number of inputs to cover the most faults require sophisticated softwareprograms that use heuristics. By utilizing hardware, this research is able to process data faster and use a simpler method for an efficient way of minimizing inputs.