Transmission Error Detector per Wi-Fi su kernel Linux 4.0

Il lavoro descrive la progettazione, l'implementazione e il test sperimentale di un meccanismo, integrato nel kernel Linux 4.0, dedicato al riconoscimento delle perdite dei frame Wi-Fi.

Study of the performances of the H->ZZ*->4l analysis with the CMS phase-II upgrade

The performances of the H → ZZ* → 4l analysis are studied in the context of the High Luminosity upgrade of the LHC collider, with the CMS detector. The high luminosity (up to L = 5 × 10^34 cm−2s−1) of the accelerator poses very challenging experimental con- ditions. In particular, the number of overlapping events per bunch crossing will increase to 140. To cope with this difficult environment, the CMS detector will be upgraded in two stages: Phase-I and Phase-II. The tools used in the analysis are the CMS Full Simulation and the fast parametrized Delphes simulation. A validation of Delphes with respect to the Full Simulation is performed, using reference Phase-I detector samples. Delphes is then used to simulate the Phase-II detector response. The Phase-II configuration is compared with the Phase-I detector and the same Phase-I detector affected by aging processes, both modeled with the Full Simulation framework. Conclusions on these three scenarios are derived: the degradation in performances observed with the “aged” scenario shows that a major upgrade of the detector is mandatory. The specific upgrade configuration studied allows to keep the same performances as in Phase-I and, in the case of the four-muons channel, even to exceed them.

Customizzazione di android

La tesi tratta in primo piano la personalizzazione di un sistema Android utilizzata come piattaforma per la seconda parte del lavoro. Quest'ultima consiste nell'installazione sul sistema operativo Android, personalizzato, un modulo e un'applicazione, il primo denominato Transmission Error Detector (TED), che estende il funzionamento della tecnologia WiFi e la seconda denominata Wvdial che estende invece il funzionamento della tecnologia 3G(o UMTS). Entrambi fanno parte di una architettura per il supporto alla mobilità in contesti eterogenei.

Hardware-in-the-loop implementation of single- and dual-phase shift control for dual active bridge converters in EV applications

Isolated DC-DC converters play a significant role in fast charging and maintaining the variable output voltage for EV applications. This study aims to investigate the different Isolated DC-DC converters for onboard and offboard chargers, then, once the topology is selected, study the control techniques and, finally, achieve a real-time converter model to accomplish Hardware-In-The-Loop (HIL) results. Among the different isolated DC-DC topologies, the Dual Active Bridge (DAB) converter has the advantage of allowing bidirectional power flow, which enables operating in both Grid to Vehicle (G2V) and Vehicle to Grid (V2G) modalities. Recently, DAB has been used in the offboard chargers for high voltage applications due to SiC and GaN MOSFETs; this new technology also allows the utilization of higher switching frequencies. By empowering soft switching techniques to reduce switching losses, higher switching frequency operation is possible in DAB. There are four phase shift control techniques for the DAB converter. They are Single Phase shift, Extended Phase shift, Dual Phase shift, Triple Phase shift controls. This thesis considers two control strategies; Single-Phase, and Dual-Phase shifts, to understand the circulating currents, power losses, and output capacitor size reduction in the DAB. Hardware-In-The-Loop (HIL) experiments are carried out on both controls with high switching frequencies using the PLECS software tool and the RT box supporting the PLECS. Root Mean Square Error is also calculated for steady-state values of output voltage with different sampling frequencies in both the controls to identify the achievable sampling frequency in real-time. DSP implementation is also executed to emulate the optimized DAB converter design, and final real-time simulation results are discussed for both the Single-Phase and Dual-Phase shift controls.

Neutrino interactions in the SAND LAr volume at the DUNE Near Detector site

The neutrino mass ordering and the leptonic CP violation phase are key parameters of the three-neutrino flavour mixing still to be determined. Measuring these parameters is the main goal of DUNE, a next generation Long Baseline neutrino experiment under construction in the United States. DUNE will feature a Near and a Far Detector site. An important component of the Near detector complex is the SAND apparatus, which will include GRAIN, a novel liquid Argon detector that aims at imaging neutrino interactions using scintillation light. For this purpose, an innovative optical readout system based on Coded Aperture Masks is under study. This thesis work is aimed at a first quantitative assessment of a 3D neutrino event reconstruction algorithm for GRAIN. The processing procedure is optimized and the reconstruction performance is evaluated. Promising results are obtained.

Quantum error correction with the IBM quantum experience

Mentre si svolgono operazioni su dei qubit, possono avvenire vari errori, modificando così l’informazione da essi contenuta. La Quantum Error Correction costruisce algoritmi che permettono di tollerare questi errori e proteggere l’informazione che si sta elaborando. Questa tesi si focalizza sui codici a 3 qubit, che possono correggere un errore di tipo bit-flip o un errore di tipo phase-flip. Più precisamente, all’interno di questi algoritmi, l’attenzione è posta sulla procedura di encoding, che punta a proteggere meglio dagli errori l’informazione contenuta da un qubit, e la syndrome measurement, che specifica su quale qubit è avvenuto un errore senza alterare lo stato del sistema. Inoltre, sfruttando la procedura della syndrome measurement, è stata stimata la probabilità di errore di tipo bit-flip e phase-flip su un qubit attraverso l’utilizzo della IBM quantum experience.