Design, production and testing of innovative key components of HEV/BEV powertrains

Through modelling activity, experimental campaigns, test bench and on-field validation, a complete powertrain for a BEV has been designed, assembled and used in a motorsport competition. The activity can be split in three main subjects, representing the three key components of an BEV vehicle. First of all a model of the entire powertrain has been developed in order to understand how the various design choices will influence the race lap-time. The data obtained was then used to design, build and test a first battery pack. After bench tests and track tests, it was understood that by using all the cell charac-teristics, without breaking the rules limitations, higher energy and power densities could have been achieved. An updated battery pack was then designed, produced and raced with at Motostudent 2018 re-sulting in a third place at debut. The second topic of this PhD was the design of novel inverter topologies. Three inverters have been de-signed, two of them using Gallium Nitride devices, a promising semiconductor technology that can achieve high switching speeds while maintaining low switching losses. High switching frequency is crucial to reduce the DC-Bus capacitor and then increase the power density of 3 phase inverters. The third in-verter uses classic Silicon devices but employs a ZVS (Zero Voltage Switching) topology. Despite the in-creased complexity of both the hardware and the control software, it can offer reduced switching losses by using conventional and established silicon mosfet technology. Finally, the mechanical parts of a three phase permanent magnet motor have been designed with the aim to employ it in UniBo Motorsport’s 2020 Formula Student car.

Peak-to-Peak Output Current Ripple Analysis in Multiphase and Multilevel Inverters

Analysis of the peak-to-peak output current ripple amplitude for multiphase and multilevel inverters is presented in this PhD thesis. The current ripple is calculated on the basis of the alternating voltage component, and peak-to-peak value is defined by the current slopes and application times of the voltage levels in a switching period. Detailed analytical expressions of peak-to-peak current ripple distribution over a fundamental period are given as function of the modulation index. For all the cases, reference is made to centered and symmetrical switching patterns, generated either by carrier-based or space vector PWM. Starting from the definition and the analysis of the output current ripple in three-phase two-level inverters, the theoretical developments have been extended to the case of multiphase inverters, with emphasis on the five- and seven-phase inverters. The instantaneous current ripple is introduced for a generic balanced multiphase loads consisting of series RL impedance and ac back emf (RLE). Simplified and effective expressions to account for the maximum of the output current ripple have been defined. The peak-to-peak current ripple diagrams are presented and discussed. The analysis of the output current ripple has been extended also to multilevel inverters, specifically three-phase three-level inverters. Also in this case, the current ripple analysis is carried out for a balanced three-phase system consisting of series RL impedance and ac back emf (RLE), representing both motor loads and grid-connected applications. The peak-to-peak current ripple diagrams are presented and discussed. In addition, simulation and experimental results are carried out to prove the validity of the analytical developments in all the cases. The cases with different phase numbers and with different number of levels are compared among them, and some useful conclusions have been pointed out. Furthermore, some application examples are given.

Design and characterization of wideband Hall current sensors in BCD technology for smart power and metering applications

Power electronic circuits are moving towards higher switching frequencies, exploiting the capabilities of novel devices to shrink the dimension of passive components. This trend demands sensors capable enough to operate at such high frequencies. This thesis aims to demonstrate through experimental characterization, the broadband capability of a fully integrated CMOS X-Hall current sensor in current mode interfaced with a transimpedance amplifier (TIA), chip CH09, realized in CMOS technology for power electronics applications such as power converters. The system exploits a common-mode control system to operate the dual supply system, 5-V for the X-Hall probe and 1.2-V for the readout. The developed prototype achieves a maximum acquisition bandwidth of 12 MHz, a power consumption of 11.46 mW, resolution of 39 mArms, a sensitivity of 8 % /T, and a FoM of 569-MHz/A2mW, significantly higher than current state-of-the-art. Further enhancements were proposed to CH09 as a new chip CH100, aiming for accuracy levels prerequisite for a real-time power electronic application. The TIA was optimized for a wider bandwidth of 26.7 MHz with nearly 30% reduction of the integrated input referred noise of 26.69 nArms at the probe-AFE interface in the frequency band of DC-30 MHz, and a 10% improvement in the dynamic range. The expected input range is 5-A. The chip incorporates a dual sensing chain for differential sensing to overcome common mode interferences. A novel offset cancellation technique is proposed that would require switching of polarity of bias currents. Thermal gain drift was improved by a factor of 8 and will be digitally calibrated utilizing a new built-in temperature sensor with a post calibration measurement accuracy greater than 1%. The estimated power consumption of the entire system is 55.6 mW. Both prototypes have been implemented through a 90-nm microelectronic process from STMicroelectronics and occupy a silicon area of 2.4 mm2.