How teachers think about the role of digital technologies in student assessment in mathematics

This study concerns teachers’ use of digital technologies in student assessment, and how the learning that is developed through the use of technology in mathematics can be evaluated. Nowadays math teachers use digital technologies in their teaching, but not in student assessment. The activities carried out with technology are seen as ‘extra-curricular’ (by both teachers and students), thus students do not learn what they can do in mathematics with digital technologies. I was interested in knowing the reasons teachers do not use digital technology to assess students’ competencies, and what they would need to be able to design innovative and appropriate tasks to assess students’ learning through digital technology. This dissertation is built on two main components: teachers and task design. I analyze teachers’ practices involving digital technologies with Ruthven’s Structuring Features of Classroom Practice, and what relation these practices have to the types of assessment they use. I study the kinds of assessment tasks teachers design with a DGE (Dynamic Geometry Environment), using Laborde’s categorization of DGE tasks. I consider the competencies teachers aim to assess with these tasks, and how their goals relate to the learning outcomes of the curriculum. This study also develops new directions in finding how to design suitable tasks for student mathematical assessment in a DGE, and it is driven by the desire to know what kinds of questions teachers might be more interested in using. I investigate the kinds of technology-based assessment tasks teachers value, and the type of feedback they give to students. Finally, I point out that the curriculum should include a range of mathematical and technological competencies that involve the use of digital technologies in mathematics, and I evaluate the possibility to take advantage of technology feedback to allow students to continue learning while they are taking a test.

The influence of career histories on team perfomance in new product development: a study of the video game industry

The purpose of this research is to contribute to the literature on organizational demography and new product development by investigating how diverse individual career histories impact team performance. Moreover we highlighted the importance of considering also the institutional context and the specific labour market arrangements in which a team is embedded, in order to interpret correctly the effect of career-related diversity measures on performance. The empirical setting of the study is the videogame industry, and the teams in charge of the development of new game titles. Video games development teams are the ideal setting to investigate the influence of career histories on team performance, since the development of videogames is performed by multidisciplinary teams composed by specialists with a wide variety of technical and artistic backgrounds, who execute a significant amounts of creative thinking. We investigate our research question both with quantitative methods and with a case study on the Japanese videogame industry: one of the most innovative in this sector. Our results show how career histories in terms of occupational diversity, prior functional diversity and prior product diversity, usually have a positive influence on team performance. However, when the moderating effect of the institutional setting is taken in to account, career diversity has different or even opposite effect on team performance, according to the specific national context in which a team operates.

L'italiano neostandard nella lingua a scuola: il caso dell'alternanza fra indicativo e congiuntivo.

Il lavoro descritto in questo elaborato indaga la presenza dei tratti dell’italiano neostandard in un corpus di produzioni scolastiche scritte, con particolare attenzione all’uso di indicativo e congiuntivo nelle frasi completive. In particolare, delle tendenze di ristandardizzazione selezionate si osservano gli usi linguistici di alunni/e, le correzioni imposte dai/dalle docenti e le indicazioni delle grammatiche per la scuola; questa ricognizione permette di tracciare un quadro generale degli atteggiamenti della scuola nei confronti dei tratti del neostandard. La seconda parte dell’elaborato è dedicata a un’analisi dell’alternanza modale nelle subordinate completive; in primo luogo, si espone una revisione della letteratura sulla complementazione, sulla modalità e sul congiuntivo in italiano, con un focus particolare sulla sua recessione; in seguito, si procede all’analisi del fenomeno sulla base dei dati appositamente raccolti nelle scuole che hanno partecipato all'indagine. In secondo luogo, l’accettabilità dell’indicativo pro congiuntivo in testi scritti a scuola viene ulteriormente indagata tramite la somministrazione di un compito di correzione ai/alle docenti. L’ultima parte dell’elaborato accoglie un’analisi approfondita delle grammatiche per la scuola, la cui trattazione del congiuntivo è messa in relazione con le osservazioni della letteratura specialistica; ciò permette di completare il quadro riguardo agli atteggiamenti della scuola e di proporre riflessioni di natura glottodidattica.

Educazione civica e competenze di cittadinanza: un'indagine su approcci e atteggiamenti degli insegnanti nella scuola secondaria

Con questo lavoro si vuole contribuire al dibattito riapertosi con il ritorno dell’Educazione civica in tutte le scuole italiane, a seguito dell’entrata in vigore della Legge 92/2019, in particolare valorizzando il punto di vista degli insegnanti. La ricerca è impostata secondo il disegno quantitativo dell’indagine correlazionale su ampio campione, preparata da una fase esplorativa durante la quale si sono svolte interviste semistrutturate a dieci docenti. A partire dai risultati di tale esplorazione, si è prodotto un questionario che è stato testato e revisionato nell’a.s. 2020-2021. Successivamente si sono condotte due diverse rilevazioni nell’a.s. 2021-2022: la prima su un campione rappresentativo degli insegnanti di scuola secondaria dell’Emilia-Romagna (main study), e la seconda su un campione non rappresentativo su base nazionale (rilevazione di approfondimento). I risultati dell’indagine fanno emergere un’accoglienza parziale delle innovazioni introdotte con la “nuova” Educazione civica. Le maggiori difficoltà si osservano rispetto alla progettazione collegiale dell’insegnamento, che la normativa vorrebbe affidato in contitolarità a tutto il Consiglio di classe, ma rispetto al quale sembra realizzarsi principalmente una “spartizione” delle ore, a cui fanno fronte attività gestite separatamente dai singoli insegnanti. Approcci e pratiche coerenti con i modelli della didattica per competenze tardano ad affermarsi per questo insegnamento, nonostante si siano osservate prime evidenze favorevoli in tal senso. I risultati sollevano il bisogno di maggiore accompagnamento e supporto dei docenti nell’implementazione collegiale di un curricolo di Educazione civica intenzionalmente orientato allo sviluppo delle competenze di cittadinanza.

Italian higher education students’ perspectives on internationalization at home and their identity as English as lingua franca users

This study aims to explore the Italian students’ perspectives on using English in English-medium instruction (EMI) programs in light of the practices of internationalization at home (IaH) at the University of Bologna (UNIBO) in Italy and further investigates whether these attitudes affect their language identity as English as lingua franca (ELF) users. To serve this aim, a mixed-method approach was adopted to collect quantitative and in-depth qualitative data in two phases through an online survey and a semi-structured interview. A total number of 78 Italian students participated in the survey, out of which 14 participants were interviewed. The findings of the online survey indicated that most participants (92%) held a positive perspective toward the use of English in EMI programs and the findings from the interviews were in line with the results of the survey. However, the purpose of the interviews was to explore the participants’ views on their language identity as ELF users. Thematic analysis of the interviews revealed that students experience emotional, cognitive, and social transitions in EMI programs in response to their shift from a non-EMI to an EMI academic setting. Overall, all the above-mentioned transitions were positive and could lead to personal development. However, it can be concluded that the EMI context provides few opportunities for the emergence of significant new subject positions mediated by English in this study. The focus on students’ perspectives on the use of English in EMI programs can contribute to the improvement in language policy planning and internationalized curriculum design by policymakers and alleviate tensions over the controversial issue of the Englishization of higher education by considering how EMI students perceive their use of English as ELF users not superior standard English users.

Study of silicon-on-insulator multiple-gate MOS structures including band-gap engineering and self heating effects

The progresses of electron devices integration have proceeded for more than 40 years following the well–known Moore’s law, which states that the transistors density on chip doubles every 24 months. This trend has been possible due to the downsizing of the MOSFET dimensions (scaling); however, new issues and new challenges are arising, and the conventional ”bulk” architecture is becoming inadequate in order to face them. In order to overcome the limitations related to conventional structures, the researchers community is preparing different solutions, that need to be assessed. Possible solutions currently under scrutiny are represented by: • devices incorporating materials with properties different from those of silicon, for the channel and the source/drain regions; • new architectures as Silicon–On–Insulator (SOI) transistors: the body thickness of Ultra-Thin-Body SOI devices is a new design parameter, and it permits to keep under control Short–Channel–Effects without adopting high doping level in the channel. Among the solutions proposed in order to overcome the difficulties related to scaling, we can highlight heterojunctions at the channel edge, obtained by adopting for the source/drain regions materials with band–gap different from that of the channel material. This solution allows to increase the injection velocity of the particles travelling from the source into the channel, and therefore increase the performance of the transistor in terms of provided drain current. The first part of this thesis work addresses the use of heterojunctions in SOI transistors: chapter 3 outlines the basics of the heterojunctions theory and the adoption of such approach in older technologies as the heterojunction–bipolar–transistors; moreover the modifications introduced in the Monte Carlo code in order to simulate conduction band discontinuities are described, and the simulations performed on unidimensional simplified structures in order to validate them as well. Chapter 4 presents the results obtained from the Monte Carlo simulations performed on double–gate SOI transistors featuring conduction band offsets between the source and drain regions and the channel. In particular, attention has been focused on the drain current and to internal quantities as inversion charge, potential energy and carrier velocities. Both graded and abrupt discontinuities have been considered. The scaling of devices dimensions and the adoption of innovative architectures have consequences on the power dissipation as well. In SOI technologies the channel is thermally insulated from the underlying substrate by a SiO2 buried–oxide layer; this SiO2 layer features a thermal conductivity that is two orders of magnitude lower than the silicon one, and it impedes the dissipation of the heat generated in the active region. Moreover, the thermal conductivity of thin semiconductor films is much lower than that of silicon bulk, due to phonon confinement and boundary scattering. All these aspects cause severe self–heating effects, that detrimentally impact the carrier mobility and therefore the saturation drive current for high–performance transistors; as a consequence, thermal device design is becoming a fundamental part of integrated circuit engineering. The second part of this thesis discusses the problem of self–heating in SOI transistors. Chapter 5 describes the causes of heat generation and dissipation in SOI devices, and it provides a brief overview on the methods that have been proposed in order to model these phenomena. In order to understand how this problem impacts the performance of different SOI architectures, three–dimensional electro–thermal simulations have been applied to the analysis of SHE in planar single and double–gate SOI transistors as well as FinFET, featuring the same isothermal electrical characteristics. In chapter 6 the same simulation approach is extensively employed to study the impact of SHE on the performance of a FinFET representative of the high–performance transistor of the 45 nm technology node. Its effects on the ON–current, the maximum temperatures reached inside the device and the thermal resistance associated to the device itself, as well as the dependence of SHE on the main geometrical parameters have been analyzed. Furthermore, the consequences on self–heating of technological solutions such as raised S/D extensions regions or reduction of fin height are explored as well. Finally, conclusions are drawn in chapter 7.

Reliable and Variation-Tolerant Interconnection Network for Low Power MPSOCS

Multi-Processor SoC (MPSOC) design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best provide on-chip communication resources is clearly felt. Scaling down of process technologies has increased process and dynamic variations as well as transistor wearout. Because of this, delay variations increase and impact the performance of the MPSoCs. The interconnect architecture inMPSoCs becomes a single point of failure as it connects all other components of the system together. A faulty processing element may be shut down entirely, but the interconnect architecture must be able to tolerate partial failure and variations and operate with performance, power or latency overhead. This dissertation focuses on techniques at different levels of abstraction to face with the reliability and variability issues in on-chip interconnection networks. By showing the test results of a GALS NoC testchip this dissertation motivates the need for techniques to detect and work around manufacturing faults and process variations in MPSoCs’ interconnection infrastructure. As a physical design technique, we propose the bundle routing framework as an effective way to route the Network on Chips’ global links. For architecture-level design, two cases are addressed: (I) Intra-cluster communication where we propose a low-latency interconnect with variability robustness (ii) Inter-cluster communication where an online functional testing with a reliable NoC configuration are proposed. We also propose dualVdd as an orthogonal way of compensating variability at the post-fabrication stage. This is an alternative strategy with respect to the design techniques, since it enforces the compensation at post silicon stage.