6 resultados para Power factor corrector
em AMS Tesi di Dottorato - Alm@DL - Università di Bologna
Resumo:
The present dissertation aims to explore, theoretically and experimentally, the problems and the potential advantages of different types of power converters for “Smart Grid” applications, with particular emphasis on multi-level architectures, which are attracting a rising interest even for industrial requests. The models of the main multilevel architectures (Diode-Clamped and Cascaded) are shown. The best suited modulation strategies to function as a network interface are identified. In particular, the close correlation between PWM (Pulse Width Modulation) approach and SVM (Space Vector Modulation) approach is highlighted. An innovative multilevel topology called MMC (Modular Multilevel Converter) is investigated, and the single-phase, three-phase and "back to back" configurations are analyzed. Specific control techniques that can manage, in an appropriate way, the charge level of the numerous capacitors and handle the power flow in a flexible way are defined and experimentally validated. Another converter that is attracting interest in “Power Conditioning Systems” field is the “Matrix Converter”. Even in this architecture, the output voltage is multilevel. It offers an high quality input current, a bidirectional power flow and has the possibility to control the input power factor (i.e. possibility to participate to active and reactive power regulations). The implemented control system, that allows fast data acquisition for diagnostic purposes, is described and experimentally verified.
Resumo:
A robust and well-distributed backbone charging network is the priority to ensure widespread electrification of road transport, providing a driving experience similar to that of internal combustion engine vehicles. International standards set multiple technical targets for on-board and off-board electric vehicle chargers; output voltage levels, harmonic emissions, and isolation requirements strongly influence the design of power converters. Additionally, smart-grid services such as vehicle-to-grid and vehicle-to-vehicle require the implementation of bi-directional stages that inevitably increase system complexity and component count. To face these design challenges, the present thesis provides a rigorous analysis of four-leg and split-capacitor three-phase four-wire active front-end topologies focusing on the harmonic description under different modulation techniques and conditions. The resulting analytical formulation paves the way for converter performance improvements while maintaining regulatory constraints and technical requirements under control. Specifically, split-capacitor inverter current ripple was characterized as providing closed-form formulations valid for every sub-case ranging from synchronous to interleaved PWM. Outcomes are the base for a novel variable switching PWM technique capable of mediating harmonic content limitation and switching loss reduction. A similar analysis is proposed for four-leg inverters with a broad range of continuous and discontinuous PWM modulations. The general superiority of discontinuous PWM modulation in reducing switching losses and limiting harmonic emission was demonstrated. Developments are realized through a parametric description of the neutral wire inductor. Finally, a novel class of integrated isolated converter topologies is proposed aiming at the neutral wire delivery without employing extra switching components rather than the one already available in typical three-phase inverter and dual-active-bridge back-to-back configurations. The fourth leg was integrated inside the dual-active-bridge input bridge providing relevant component count savings. A novel modified single-phase-shift modulation technique was developed to ensure a seamless transition between working conditions like voltage level and power factor. Several simulations and experiments validate the outcomes.
Resumo:
The first part of this thesis has focused on the construction of a twelve-phase asynchronous machine for More Electric Aircraft (MEA) applications. In fact, the aerospace world has found in electrification the way to improve the efficiency, reliability and maintainability of an aircraft. This idea leads to the aircraft a new management and distribution of electrical services. In this way is possible to remove or to reduce the hydraulic, mechanical and pneumatic systems inside the aircraft. The second part of this dissertation is dedicated on the enhancement of the control range of matrix converters (MCs) operating with non-unity input power factor and, at the same time, on the reduction of the switching power losses. The analysis leads to the determination in closed form of a modulation strategy that features a control range, in terms of output voltage and input power factor, that is greater than that of the traditional strategies under the same operating conditions, and a reduction in the switching power losses.
Resumo:
In the context of “testing laboratory” one of the most important aspect to deal with is the measurement result. Whenever decisions are based on measurement results, it is important to have some indication of the quality of the results. In every area concerning with noise measurement many standards are available but without an expression of uncertainty, it is impossible to judge whether two results are in compliance or not. ISO/IEC 17025 is an international standard related with the competence of calibration and testing laboratories. It contains the requirements that testing and calibration laboratories have to meet if they wish to demonstrate that they operate to a quality system, are technically competent and are able to generate technically valid results. ISO/IEC 17025 deals specifically with the requirements for the competence of laboratories performing testing and calibration and for the reporting of the results, which may or may not contain opinions and interpretations of the results. The standard requires appropriate methods of analysis to be used for estimating uncertainty of measurement. In this point of view, for a testing laboratory performing sound power measurement according to specific ISO standards and European Directives, the measurement of uncertainties is the most important factor to deal with. Sound power level measurement, according to ISO 3744:1994 , performed with a limited number of microphones distributed over a surface enveloping a source is affected by a certain systematic error and a related standard deviation. Making a comparison of measurement carried out with different microphone arrays is difficult because results are affected by systematic errors and standard deviation that are peculiarities of the number of microphones disposed on the surface, their spatial position and the complexity of the sound field. A statistical approach could give an overview of the difference between sound power level evaluated with different microphone arrays and an evaluation of errors that afflict this kind of measurement. Despite the classical approach that tend to follow the ISO GUM this thesis present a different point of view of the problem related to the comparison of result obtained from different microphone arrays.
Resumo:
Power electronic circuits are moving towards higher switching frequencies, exploiting the capabilities of novel devices to shrink the dimension of passive components. This trend demands sensors capable enough to operate at such high frequencies. This thesis aims to demonstrate through experimental characterization, the broadband capability of a fully integrated CMOS X-Hall current sensor in current mode interfaced with a transimpedance amplifier (TIA), chip CH09, realized in CMOS technology for power electronics applications such as power converters. The system exploits a common-mode control system to operate the dual supply system, 5-V for the X-Hall probe and 1.2-V for the readout. The developed prototype achieves a maximum acquisition bandwidth of 12 MHz, a power consumption of 11.46 mW, resolution of 39 mArms, a sensitivity of 8 % /T, and a FoM of 569-MHz/A2mW, significantly higher than current state-of-the-art. Further enhancements were proposed to CH09 as a new chip CH100, aiming for accuracy levels prerequisite for a real-time power electronic application. The TIA was optimized for a wider bandwidth of 26.7 MHz with nearly 30% reduction of the integrated input referred noise of 26.69 nArms at the probe-AFE interface in the frequency band of DC-30 MHz, and a 10% improvement in the dynamic range. The expected input range is 5-A. The chip incorporates a dual sensing chain for differential sensing to overcome common mode interferences. A novel offset cancellation technique is proposed that would require switching of polarity of bias currents. Thermal gain drift was improved by a factor of 8 and will be digitally calibrated utilizing a new built-in temperature sensor with a post calibration measurement accuracy greater than 1%. The estimated power consumption of the entire system is 55.6 mW. Both prototypes have been implemented through a 90-nm microelectronic process from STMicroelectronics and occupy a silicon area of 2.4 mm2.
Resumo:
Nowadays, electrical machines are seeing an ever-increasing development and extensive research is currently being dedicated to the improvement of their efficiency and torque/power density. Compared to conventional random windings, hairpin winding inherently features lower DC resistance, higher fill factor, better thermal performance, improved reliability, and an automated manufacturing process. However, several challenges need to be addressed, including electromagnetic, thermal, and manufacturing aspects. Of these, the high ohmic losses at high-frequency operations due to skin and proximity effects are the most severe, resulting in low efficiency or high-temperature values. In this work, the hairpin winding challenges were highlighted at high-frequency operations and at showing the limits of applicability of these standard approaches. Afterward, a multi-objective design optimization is proposed aiming to enhance the exploitation of the hairpin technology in electrical machines. Efficiency and volume power density are considered as main design objectives. Subsequently, a changing paradigm is made for the design of electric motors equipped with hairpin windings, where it is proven that a temperature-oriented approach would be beneficial when designing this type of pre-formed winding. Furthermore, the effect of the rotor topology on AC losses is also considered. After providing design recommendations and FE electromagnetic and thermal evaluations, experimental tests are also performed for validation purposes on a motorette wound with pre-formed conductors. The results show that operating the machine at higher temperatures could be beneficial to efficiency, particularly in high-frequency operations where AC losses are higher at low operating temperatures. The last part of the thesis focuses on comparing the main electromagnetic performance metrics for a conventional hairpin winding, wound onto a benchmark stator with a semi-closed slot opening design, and a continuous hairpin winding, in which the slot opening is open. Lastly, the adoption of semi-magnetic slot wedges is investigated to improve the overall performance of the motor.