Novel asymmetric geopolymer membranes for oil/water emulsions separation

In this study, it was investigated the possibility of using a geopolymeric membrane as an alternative to the expensive ceramic ones. The goal was to synthesise a low-cost membrane made entirely of geopolymer that can perform equally to commercial membranes. This study initially investigated the feasibility of preparing a microporous support suitable for microfiltration through casting and pressing techniques. Subsequently, a selective geopolymeric layer was developed and deposited on the support, with the capability to operate within the microfiltration range and to effectively separate oil from oil-water emulsions. In order to evaluate the performance, the properties of the geopolymeric supports obtained through pressing were carefully evaluated during the experimentation phase investigating the effect of varying parameters such as sodium silicate content, water content, and applied pressure. The results obtained from these evaluations showed that it is possible to produce supports with excellent porosity and highly controlled narrow pore size distributions. The most promising geopolymeric pressed support was then used for the deposition of a selective layer on its surface. Following physical characterization, it was confirmed that the resulting geopolymer membrane was suitable for use in the microfiltration range. Subsequently, the membrane was tested for its ability to separate oil from water using various emulsions prepared with different surfactants at different concentrations and pH. The results revealed that the fluxes were highly dependent on the electrostatic interaction between the membrane and the emulsion, with best results being obtained with emulsions prepared using anionic surfactants. The rejection rate of the membrane was also found to be extremely high, with values over 95%, comparable to a commercial ceramic membrane. This suggests that geopolymer membranes are suitable alternatives to ceramic membranes, offering the added benefits of lower cost and reduced environmental impact during production.

Waste Mineral Filler Recycling in New Pavement Solutions

Società Azionaria Prodotti Asfaltico Bituminosi Affini (S.A.P.A.B.A. s.r.l.) is an asphalt/aggregate production plant located in Bologna, Italy. The resulting dirt and mud from the washing process is stored at specific sedimentation lakes close to the plant and are referred to as waste silt. The initiative and motivation of the current research follows the 12th objective of the sustainable development goals proposed by the United Nations. As a result, the overall aim of the current study was to reduce the impact of waste mineral fillers through recycling in new paving solutions. Considering three paving types of cement-bound, geopolymer-bound and asphalt pavements the following objectives were set: 1) To investigate the possibility of recycling waste silt in cement-bound paving solution; 2) To explore the feasibility of producing geopolymer-bound paving solutions containing waste silt; 3) To study the potential of using waste silt as fillers in different asphalt pavements. The first objective was achieved by utilizing waste silt into cement-bound materials. For this purpose, the by-product was introduced to cement mortars and was partially replaced (20%) with the natural sand. Moreover, statistical models were used to produce concrete paving blocks. The second objective was pursued by studying the feasibility of using the waste silt as a filler in geopolymer cement products. Following a comprehensive review, the silt was thermally calcined and used as filler in geopolymer cement and paving blocks. The third objective was achieved by evaluating the rheological and mechanical performance of hot mix, porous and semi-flexible asphalt containing waste silt. The limestone filler of a hot mix asphalt was replaced with thermally and untreated waste silt. To sum up, different paving blocks and asphalt pavements mixtures containing waste silt were proposed that presented acceptable performance when compared to different national and European standards.

Parallel Architectures for Many-Core Systems-On-Chip in Deep Sub-Micron Technology

Despite the several issues faced in the past, the evolutionary trend of silicon has kept its constant pace. Today an ever increasing number of cores is integrated onto the same die. Unfortunately, the extraordinary performance achievable by the many-core paradigm is limited by several factors. Memory bandwidth limitation, combined with inefficient synchronization mechanisms, can severely overcome the potential computation capabilities. Moreover, the huge HW/SW design space requires accurate and flexible tools to perform architectural explorations and validation of design choices. In this thesis we focus on the aforementioned aspects: a flexible and accurate Virtual Platform has been developed, targeting a reference many-core architecture. Such tool has been used to perform architectural explorations, focusing on instruction caching architecture and hybrid HW/SW synchronization mechanism. Beside architectural implications, another issue of embedded systems is considered: energy efficiency. Near Threshold Computing is a key research area in the Ultra-Low-Power domain, as it promises a tenfold improvement in energy efficiency compared to super-threshold operation and it mitigates thermal bottlenecks. The physical implications of modern deep sub-micron technology are severely limiting performance and reliability of modern designs. Reliability becomes a major obstacle when operating in NTC, especially memory operation becomes unreliable and can compromise system correctness. In the present work a novel hybrid memory architecture is devised to overcome reliability issues and at the same time improve energy efficiency by means of aggressive voltage scaling when allowed by workload requirements. Variability is another great drawback of near-threshold operation. The greatly increased sensitivity to threshold voltage variations in today a major concern for electronic devices. We introduce a variation-tolerant extension of the baseline many-core architecture. By means of micro-architectural knobs and a lightweight runtime control unit, the baseline architecture becomes dynamically tolerant to variations.