2 resultados para InfoStation-Based Networks

em AMS Tesi di Dottorato - Alm@DL - Università di Bologna


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Nowadays the rise of non-recurring engineering (NRE) costs associated with complexity is becoming a major factor in SoC design, limiting both scaling opportunities and the flexibility advantages offered by the integration of complex computational units. The introduction of embedded programmable elements can represent an appealing solution, able both to guarantee the desired flexibility and upgradabilty and to widen the SoC market. In particular embedded FPGA (eFPGA) cores can provide bit-level optimization for those applications which benefits from synthesis, paying on the other side in terms of performance penalties and area overhead with respect to standard cell ASIC implementations. In this scenario this thesis proposes a design methodology for a synthesizable programmable device designed to be embedded in a SoC. A soft-core embedded FPGA (eFPGA) is hence presented and analyzed in terms of the opportunities given by a fully synthesizable approach, following an implementation flow based on Standard-Cell methodology. A key point of the proposed eFPGA template is that it adopts a Multi-Stage Switching Network (MSSN) as the foundation of the programmable interconnects, since it can be efficiently synthesized and optimized through a standard cell based implementation flow, ensuring at the same time an intrinsic congestion-free network topology. The evaluation of the flexibility potentialities of the eFPGA has been performed using different technology libraries (STMicroelectronics CMOS 65nm and BCD9s 0.11μm) through a design space exploration in terms of area-speed-leakage tradeoffs, enabled by the full synthesizability of the template. Since the most relevant disadvantage of the adopted soft approach, compared to a hardcore, is represented by a performance overhead increase, the eFPGA analysis has been made targeting small area budgets. The generation of the configuration bitstream has been obtained thanks to the implementation of a custom CAD flow environment, and has allowed functional verification and performance evaluation through an application-aware analysis.

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The Structural Health Monitoring (SHM) research area is increasingly investigated due to its high potential in reducing the maintenance costs and in ensuring the systems safety in several industrial application fields. A growing demand of new SHM systems, permanently embedded into the structures, for savings in weight and cabling, comes from the aeronautical and aerospace application fields. As consequence, the embedded electronic devices are to be wirelessly connected and battery powered. As result, a low power consumption is requested. At the same time, high performance in defects or impacts detection and localization are to be ensured to assess the structural integrity. To achieve these goals, the design paradigms can be changed together with the associate signal processing. The present thesis proposes design strategies and unconventional solutions, suitable both for real-time monitoring and periodic inspections, relying on piezo-transducers and Ultrasonic Guided Waves. In the first context, arrays of closely located sensors were designed, according to appropriate optimality criteria, by exploiting sensors re-shaping and optimal positioning, to achieve improved damages/impacts localisation performance in noisy environments. An additional sensor re-shaping procedure was developed to tackle another well-known issue which arises in realistic scenario, namely the reverberation. A novel sensor, able to filter undesired mechanical boundaries reflections, was validated via simulations based on the Green's functions formalism and FEM. In the active SHM context, a novel design methodology was used to develop a single transducer, called Spectrum-Scanning Acoustic Transducer, to actively inspect a structure. It can estimate the number of defects and their distances with an accuracy of 2[cm]. It can also estimate the damage angular coordinate with an equivalent mainlobe aperture of 8[deg], when a 24[cm] radial gap between two defects is ensured. A suitable signal processing was developed in order to limit the computational cost, allowing its use with embedded electronic devices.