2 resultados para Harness making and trade.

em AMS Tesi di Dottorato - Alm@DL - Università di Bologna


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This research seeks to review the level of knowledge achieved in interpreting the relationship between the ethnic diversity at the workplace in the public sector and the organizational performance; as well as seeks to contribute in understanding the implications of this relationship. The study commenced with investigating the academic research in the relevant area addressing the following research questions: (a) How are diversity management and organizational performance conceptualized? (b) What are the existing findings of research concerning diversity at the workplace in the public organizations and organizational performance? (c) What factors intervene the relationship between the diversity and organizational performance? Based on the findings from the review of the academic research, this study seeks to contribute in understanding the ethnic diversity – performance relationship and its mplications at the local level in the Macedonian context. The reform process in Macedonia as a multicultural society, where for many years, inter-ethnic relations have been one of the most sensitive political issues, affecting both the stability of the country and the progress, focused mainly on the implementation of the decentralization and inclusion of ethnic minorities in the decision making process. With the implementation of the Ohrid Framework Agreement workforce at the units of local self-government in Republic of Macedonia is becoming more balanced with respect to ethnic minorities, with more workforce participation than ever by Albanians, Turks, Roma and other minorities. As public organizations at local level become more diverse along ethnic lines, it makes sense to pay more attention to how different ethnic groups interact with one another at work. Thus it gives additional importance on the research question addressed in the study and gives significance of the research in a broader scope.

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The miniaturization race in the hardware industry aiming at continuous increasing of transistor density on a die does not bring respective application performance improvements any more. One of the most promising alternatives is to exploit a heterogeneous nature of common applications in hardware. Supported by reconfigurable computation, which has already proved its efficiency in accelerating data intensive applications, this concept promises a breakthrough in contemporary technology development. Memory organization in such heterogeneous reconfigurable architectures becomes very critical. Two primary aspects introduce a sophisticated trade-off. On the one hand, a memory subsystem should provide well organized distributed data structure and guarantee the required data bandwidth. On the other hand, it should hide the heterogeneous hardware structure from the end-user, in order to support feasible high-level programmability of the system. This thesis work explores the heterogeneous reconfigurable hardware architectures and presents possible solutions to cope the problem of memory organization and data structure. By the example of the MORPHEUS heterogeneous platform, the discussion follows the complete design cycle, starting from decision making and justification, until hardware realization. Particular emphasis is made on the methods to support high system performance, meet application requirements, and provide a user-friendly programmer interface. As a result, the research introduces a complete heterogeneous platform enhanced with a hierarchical memory organization, which copes with its task by means of separating computation from communication, providing reconfigurable engines with computation and configuration data, and unification of heterogeneous computational devices using local storage buffers. It is distinguished from the related solutions by distributed data-flow organization, specifically engineered mechanisms to operate with data on local domains, particular communication infrastructure based on Network-on-Chip, and thorough methods to prevent computation and communication stalls. In addition, a novel advanced technique to accelerate memory access was developed and implemented.