Power Converters and Electric Drives for Smart Grid Applications

The present dissertation aims to explore, theoretically and experimentally, the problems and the potential advantages of different types of power converters for “Smart Grid” applications, with particular emphasis on multi-level architectures, which are attracting a rising interest even for industrial requests. The models of the main multilevel architectures (Diode-Clamped and Cascaded) are shown. The best suited modulation strategies to function as a network interface are identified. In particular, the close correlation between PWM (Pulse Width Modulation) approach and SVM (Space Vector Modulation) approach is highlighted. An innovative multilevel topology called MMC (Modular Multilevel Converter) is investigated, and the single-phase, three-phase and "back to back" configurations are analyzed. Specific control techniques that can manage, in an appropriate way, the charge level of the numerous capacitors and handle the power flow in a flexible way are defined and experimentally validated. Another converter that is attracting interest in “Power Conditioning Systems” field is the “Matrix Converter”. Even in this architecture, the output voltage is multilevel. It offers an high quality input current, a bidirectional power flow and has the possibility to control the input power factor (i.e. possibility to participate to active and reactive power regulations). The implemented control system, that allows fast data acquisition for diagnostic purposes, is described and experimentally verified.

Modelling and analysis of networked control strategies in smart power distribution grids: development of co-simulation tools

This thesis is focused on Smart Grid applications in medium voltage distribution networks. For the development of new applications it appears useful the availability of simulation tools able to model dynamic behavior of both the power system and the communication network. Such a co-simulation environment would allow the assessment of the feasibility of using a given network technology to support communication-based Smart Grid control schemes on an existing segment of the electrical grid and to determine the range of control schemes that different communications technologies can support. For this reason, is presented a co-simulation platform that has been built by linking the Electromagnetic Transients Program Simulator (EMTP v3.0) with a Telecommunication Network Simulator (OPNET-Riverbed v18.0). The simulator is used to design and analyze a coordinate use of Distributed Energy Resources (DERs) for the voltage/var control (VVC) in distribution network. This thesis is focused control structure based on the use of phase measurement units (PMUs). In order to limit the required reinforcements of the communication infrastructures currently adopted by Distribution Network Operators (DNOs), the study is focused on leader-less MAS schemes that do not assign special coordinating rules to specific agents. Leader-less MAS are expected to produce more uniform communication traffic than centralized approaches that include a moderator agent. Moreover, leader-less MAS are expected to be less affected by limitations and constraint of some communication links. The developed co-simulator has allowed the definition of specific countermeasures against the limitations of the communication network, with particular reference to the latency and loss and information, for both the case of wired and wireless communication networks. Moreover, the co-simulation platform has bee also coupled with a mobility simulator in order to study specific countermeasures against the negative effects on the medium voltage/current distribution network caused by the concurrent connection of electric vehicles.

Cooperative Cognitive Wireless Networks over TV White and Gray Spaces

Wireless networks rapidly became a fundamental pillar of everyday activities. Whether at work or elsewhere, people often benefits from always-on connections. This trend is likely to increase, and hence actual technologies struggle to cope with the increase in traffic demand. To this end, Cognitive Wireless Networks have been studied. These networks aim at a better utilization of the spectrum, by understanding the environment in which they operate, and adapt accordingly. In particular recently national regulators opened up consultations on the opportunistic use of the TV bands, which became partially free due to the digital TV switch over. In this work, we focus on the indoor use of of TVWS. Interesting use cases like smart metering and WiFI like connectivity arise, and are studied and compared against state of the art technology. New measurements for TVWS networks will be presented and evaluated, and fundamental characteristics of the signal derived. Then, building on that, a new model of spectrum sharing, which takes into account also the height from the terrain, is presented and evaluated in a real scenario. The principal limits and performance of TVWS operated networks will be studied for two main use cases, namely Machine to Machine communication and for wireless sensor networks, particularly for the smart grid scenario. The outcome is that TVWS are certainly interesting to be studied and deployed, in particular when used as an additional offload for other wireless technologies. Seeing TVWS as the only wireless technology on a device is harder to be seen: the uncertainity in channel availability is the major drawback of opportunistic networks, since depending on the primary network channel allocation might lead in having no channels available for communication. TVWS can be effectively exploited as offloading solutions, and most of the contributions presented in this work proceed in this direction.

Tecniche per il controllo dinamico del consumo di potenza per piattaforme system-on-chip

Providing support for multimedia applications on low-power mobile devices remains a significant research challenge. This is primarily due to two reasons: • Portable mobile devices have modest sizes and weights, and therefore inadequate resources, low CPU processing power, reduced display capabilities, limited memory and battery lifetimes as compared to desktop and laptop systems. • On the other hand, multimedia applications tend to have distinctive QoS and processing requirementswhichmake themextremely resource-demanding. This innate conflict introduces key research challenges in the design of multimedia applications and device-level power optimization. Energy efficiency in this kind of platforms can be achieved only via a synergistic hardware and software approach. In fact, while System-on-Chips are more and more programmable thus providing functional flexibility, hardwareonly power reduction techniques cannot maintain consumption under acceptable bounds. It is well understood both in research and industry that system configuration andmanagement cannot be controlled efficiently only relying on low-level firmware and hardware drivers. In fact, at this level there is lack of information about user application activity and consequently about the impact of power management decision on QoS. Even though operating system support and integration is a requirement for effective performance and energy management, more effective and QoSsensitive power management is possible if power awareness and hardware configuration control strategies are tightly integratedwith domain-specificmiddleware services. The main objective of this PhD research has been the exploration and the integration of amiddleware-centric energymanagement with applications and operating-system. We choose to focus on the CPU-memory and the video subsystems, since they are the most power-hungry components of an embedded system. A second main objective has been the definition and implementation of software facilities (like toolkits, API, and run-time engines) in order to improve programmability and performance efficiency of such platforms. Enhancing energy efficiency and programmability ofmodernMulti-Processor System-on-Chips (MPSoCs) Consumer applications are characterized by tight time-to-market constraints and extreme cost sensitivity. The software that runs on modern embedded systems must be high performance, real time, and even more important low power. Although much progress has been made on these problems, much remains to be done. Multi-processor System-on-Chip (MPSoC) are increasingly popular platforms for high performance embedded applications. This leads to interesting challenges in software development since efficient software development is a major issue for MPSoc designers. An important step in deploying applications on multiprocessors is to allocate and schedule concurrent tasks to the processing and communication resources of the platform. The problem of allocating and scheduling precedenceconstrained tasks on processors in a distributed real-time system is NP-hard. There is a clear need for deployment technology that addresses thesemulti processing issues. This problem can be tackled by means of specific middleware which takes care of allocating and scheduling tasks on the different processing elements and which tries also to optimize the power consumption of the entire multiprocessor platform. This dissertation is an attempt to develop insight into efficient, flexible and optimalmethods for allocating and scheduling concurrent applications tomultiprocessor architectures. It is a well-known problem in literature: this kind of optimization problems are very complex even in much simplified variants, therefore most authors propose simplified models and heuristic approaches to solve it in reasonable time. Model simplification is often achieved by abstracting away platform implementation ”details”. As a result, optimization problems become more tractable, even reaching polynomial time complexity. Unfortunately, this approach creates an abstraction gap between the optimization model and the real HW-SW platform. The main issue with heuristic or, more in general, with incomplete search is that they introduce an optimality gap of unknown size. They provide very limited or no information on the distance between the best computed solution and the optimal one. The goal of this work is to address both abstraction and optimality gaps, formulating accurate models which accounts for a number of ”non-idealities” in real-life hardware platforms, developing novel mapping algorithms that deterministically find optimal solutions, and implementing software infrastructures required by developers to deploy applications for the targetMPSoC platforms. Energy Efficient LCDBacklightAutoregulation on Real-LifeMultimediaAp- plication Processor Despite the ever increasing advances in Liquid Crystal Display’s (LCD) technology, their power consumption is still one of the major limitations to the battery life of mobile appliances such as smart phones, portable media players, gaming and navigation devices. There is a clear trend towards the increase of LCD size to exploit the multimedia capabilities of portable devices that can receive and render high definition video and pictures. Multimedia applications running on these devices require LCD screen sizes of 2.2 to 3.5 inches andmore to display video sequences and pictures with the required quality. LCD power consumption is dependent on the backlight and pixel matrix driving circuits and is typically proportional to the panel area. As a result, the contribution is also likely to be considerable in future mobile appliances. To address this issue, companies are proposing low power technologies suitable for mobile applications supporting low power states and image control techniques. On the research side, several power saving schemes and algorithms can be found in literature. Some of them exploit software-only techniques to change the image content to reduce the power associated with the crystal polarization, some others are aimed at decreasing the backlight level while compensating the luminance reduction by compensating the user perceived quality degradation using pixel-by-pixel image processing algorithms. The major limitation of these techniques is that they rely on the CPU to perform pixel-based manipulations and their impact on CPU utilization and power consumption has not been assessed. This PhDdissertation shows an alternative approach that exploits in a smart and efficient way the hardware image processing unit almost integrated in every current multimedia application processors to implement a hardware assisted image compensation that allows dynamic scaling of the backlight with a negligible impact on QoS. The proposed approach overcomes CPU-intensive techniques by saving system power without requiring either a dedicated display technology or hardware modification. Thesis Overview The remainder of the thesis is organized as follows. The first part is focused on enhancing energy efficiency and programmability of modern Multi-Processor System-on-Chips (MPSoCs). Chapter 2 gives an overview about architectural trends in embedded systems, illustrating the principal features of new technologies and the key challenges still open. Chapter 3 presents a QoS-driven methodology for optimal allocation and frequency selection for MPSoCs. The methodology is based on functional simulation and full system power estimation. Chapter 4 targets allocation and scheduling of pipelined stream-oriented applications on top of distributed memory architectures with messaging support. We tackled the complexity of the problem by means of decomposition and no-good generation, and prove the increased computational efficiency of this approach with respect to traditional ones. Chapter 5 presents a cooperative framework to solve the allocation, scheduling and voltage/frequency selection problem to optimality for energyefficient MPSoCs, while in Chapter 6 applications with conditional task graph are taken into account. Finally Chapter 7 proposes a complete framework, called Cellflow, to help programmers in efficient software implementation on a real architecture, the Cell Broadband Engine processor. The second part is focused on energy efficient software techniques for LCD displays. Chapter 8 gives an overview about portable device display technologies, illustrating the principal features of LCD video systems and the key challenges still open. Chapter 9 shows several energy efficient software techniques present in literature, while Chapter 10 illustrates in details our method for saving significant power in an LCD panel. Finally, conclusions are drawn, reporting the main research contributions that have been discussed throughout this dissertation.

Un piano territoriale per la riduzione della concentrazione di CO2 nell'atmosfera e la produzione energetica da fonti rinnovabili per mezzo della filiera delle biomasse

Il progetto propone uno studio per verificare la fattibilita' di un piano territoriale (ideato per il bacino del Po ma di fatto estendibile a tutti i bacini fluviali) per la creazione di una filiera di colture bioenergetiche (biomasse) che, trasportate per mezzo della navigazione fluviale (uno dei mezzi di trasporto a minore emissione di CO2), alimentino una o piu' centrali a nuova tecnologia che associno alla produzione di calore (teleriscaldamento e raffreddamento) e di energia la separazione dei fumi. La CO2 catturata dalla crescita delle biomasse e recuperata dalla combustione, puo' quindi essere segregata nel sottosuolo di aree costiere subsidenti contrastando il fenomeno dell’abbassamento del suolo. Ricavando benefici in tutti i passaggi di attuazione del piano territoriale (lancio dell'agricoltura bioenergetica, rilancio della navigazione a corrente libera, avvio di una economia legata alla logistica del trasporto e dello stoccaggio delle biomasse, generazione di energia pulita, lotta alla subsidenza) il progetto, di fatto, consente di catturare ingenti quantitativi di CO2 dall'atmosfera e di segregarli nel sottosuolo, riducendo l'effetto serra. Nel corso del Dottorato e' stata sviluppata una metodologia di valutazione della sostenibilita' economica ed ambientale del progetto ad un bacino fluviale, che consta di una modulistica di raccolta dei dati di base e di una procedura informatizzata di analisi.

Calcoli di sezioni d'urto efficaci di riflettore in sistemi PWR di terza generazione

La corretta modellizzazione della zona del riflettore dei sistemi GEN III+ è un passaggio fondamentale per un’accurata predizione dei parametri di cella il cui valore influenza direttamente la distribuzione di potenza su tutto il nocciolo. Tale esigenza si è resa ancora più stringente dopo la constatazione che il fenomeno del “tilt power” risulta essere più amplificato nei noccioli nucleari equipaggiati con un riflettore pesante. Per tali ragioni, nel presente lavoro di tesi si è dedicata particolare attenzione alle metodiche di modellizzazione ed alla generazione delle sezioni d’urto efficaci omogenee ed agli assembly discontinuity factors (ADF) nella zona di riflessione. Il codice deterministico utilizzato per il calcolo è SCALE 6.1.3. La notevole differenza nelle proprietà neutroniche associata ad un’elevata eterogeneità geometrica tra un nocciolo ed un riflettore hanno suggerito di effettuare un’analisi preliminare sul sistema riflettente GEN II proposto nel benchmark NEA-NSC-DOC (2013) per testare la capacità di SCALE 6.1.3 di effettuare un corretto calcolo di cella adottando una modellizzazione monodimensionale assembly/riflettore. I risultati ottenuti sono confrontati con quelli presentati nel benchmark e e con quelli valutati attraverso il codice Monte Carlo SERPENT 2.0 confermando la capacità di calcolo di SCALE 6.1.3. L’analisi sulla modellizzazione dei sistemi riflettenti GEN III+ è stata effettuata ricavando il valore dei parametri di cella per configurazioni omogenee ed una serie di configurazioni geometriche esatte che comprendono tutte le modellizzazioni del sistema riflettente lungo la direzione angolare del riflettore. Si è inoltre effettuata un’analisi di sensitività su parametri operativi e sui parametri di codice. Si è infine effettuato un calcolo in color-set per indagare l’influenza degli effetti 2-D sui parametri di cella. I risultati prodotti rappresentano un contributo migliorativo nella conoscenza dei parametri di cella di riflettore e potranno essere utilizzati per una più precisa valutazione del fenomeno del tilt nei sistemi GEN III+.