3 resultados para Directional over-current relays
em AMS Tesi di Dottorato - Alm@DL - Università di Bologna
Resumo:
Embedding intelligence in extreme edge devices allows distilling raw data acquired from sensors into actionable information, directly on IoT end-nodes. This computing paradigm, in which end-nodes no longer depend entirely on the Cloud, offers undeniable benefits, driving a large research area (TinyML) to deploy leading Machine Learning (ML) algorithms on micro-controller class of devices. To fit the limited memory storage capability of these tiny platforms, full-precision Deep Neural Networks (DNNs) are compressed by representing their data down to byte and sub-byte formats, in the integer domain. However, the current generation of micro-controller systems can barely cope with the computing requirements of QNNs. This thesis tackles the challenge from many perspectives, presenting solutions both at software and hardware levels, exploiting parallelism, heterogeneity and software programmability to guarantee high flexibility and high energy-performance proportionality. The first contribution, PULP-NN, is an optimized software computing library for QNN inference on parallel ultra-low-power (PULP) clusters of RISC-V processors, showing one order of magnitude improvements in performance and energy efficiency, compared to current State-of-the-Art (SoA) STM32 micro-controller systems (MCUs) based on ARM Cortex-M cores. The second contribution is XpulpNN, a set of RISC-V domain specific instruction set architecture (ISA) extensions to deal with sub-byte integer arithmetic computation. The solution, including the ISA extensions and the micro-architecture to support them, achieves energy efficiency comparable with dedicated DNN accelerators and surpasses the efficiency of SoA ARM Cortex-M based MCUs, such as the low-end STM32M4 and the high-end STM32H7 devices, by up to three orders of magnitude. To overcome the Von Neumann bottleneck while guaranteeing the highest flexibility, the final contribution integrates an Analog In-Memory Computing accelerator into the PULP cluster, creating a fully programmable heterogeneous fabric that demonstrates end-to-end inference capabilities of SoA MobileNetV2 models, showing two orders of magnitude performance improvements over current SoA analog/digital solutions.
Resumo:
Analysis of the peak-to-peak output current ripple amplitude for multiphase and multilevel inverters is presented in this PhD thesis. The current ripple is calculated on the basis of the alternating voltage component, and peak-to-peak value is defined by the current slopes and application times of the voltage levels in a switching period. Detailed analytical expressions of peak-to-peak current ripple distribution over a fundamental period are given as function of the modulation index. For all the cases, reference is made to centered and symmetrical switching patterns, generated either by carrier-based or space vector PWM. Starting from the definition and the analysis of the output current ripple in three-phase two-level inverters, the theoretical developments have been extended to the case of multiphase inverters, with emphasis on the five- and seven-phase inverters. The instantaneous current ripple is introduced for a generic balanced multiphase loads consisting of series RL impedance and ac back emf (RLE). Simplified and effective expressions to account for the maximum of the output current ripple have been defined. The peak-to-peak current ripple diagrams are presented and discussed. The analysis of the output current ripple has been extended also to multilevel inverters, specifically three-phase three-level inverters. Also in this case, the current ripple analysis is carried out for a balanced three-phase system consisting of series RL impedance and ac back emf (RLE), representing both motor loads and grid-connected applications. The peak-to-peak current ripple diagrams are presented and discussed. In addition, simulation and experimental results are carried out to prove the validity of the analytical developments in all the cases. The cases with different phase numbers and with different number of levels are compared among them, and some useful conclusions have been pointed out. Furthermore, some application examples are given.
Resumo:
In the last few years, the introduction of chimeric antigen receptor (CAR) T-cell therapy into clinical practice has revolutionized the approach to patients with relapsed/refractory (R/R) large B-cell lymphoma (LBCL), whose outcome used to be dismal with median overall survival (OS) of approximately 6 months with standard salvage therapy. At our Institute, we started treating diffuse large B-cell lymphoma (DLBCL) patients with CAR T-cell products in August 2019 and they received either axicabtagene ciloleucel (axi-cel) and tisagenlecleucel (tisa-cel) as per regulatory indications. This research project presents the 2-year follow-up of the first 53 treated patients. Our first aim is to investigate the feasibility of this treatment strategy in a real-world setting, although the reimbursement criteria set by the Italian Medicines Agency (Agenzia Italiana del Farmaco, AIFA) are very similar to the inclusion criteria of clinical trials and stricter than those established by the regulatory authorities of many foreign countries. One month after infusion, the ORR was 66% with 19 patients already in CR (38%). Restaging at 3, 6 and 12 months post-infusion shows that early CRs tend to be maintained over time and, moreover, that a considerable number of PRs and a few SDs can improve into a CR. The safety data were consistent with what is reported in the literature; toxicity was generally manageable, largely due to the increasing expertise in handling the specific adverse events related to CAR T-cell therapy. Our results confirms that CAR T-cell therapy is both safe and effective in a real-life setting and that it represents a crucial weapon in a subset of patients who were previously doomed to an inevitably severe prognosis.