Design and Performance Evaluation of Network-on-Chip Communication Protocols and Architectures

The scale down of transistor technology allows microelectronics manufacturers such as Intel and IBM to build always more sophisticated systems on a single microchip. The classical interconnection solutions based on shared buses or direct connections between the modules of the chip are becoming obsolete as they struggle to sustain the increasing tight bandwidth and latency constraints that these systems demand. The most promising solution for the future chip interconnects are the Networks on Chip (NoC). NoCs are network composed by routers and channels used to inter- connect the different components installed on the single microchip. Examples of advanced processors based on NoC interconnects are the IBM Cell processor, composed by eight CPUs that is installed on the Sony Playstation III and the Intel Teraflops pro ject composed by 80 independent (simple) microprocessors. On chip integration is becoming popular not only in the Chip Multi Processor (CMP) research area but also in the wider and more heterogeneous world of Systems on Chip (SoC). SoC comprehend all the electronic devices that surround us such as cell-phones, smart-phones, house embedded systems, automotive systems, set-top boxes etc... SoC manufacturers such as ST Microelectronics , Samsung, Philips and also Universities such as Bologna University, M.I.T., Berkeley and more are all proposing proprietary frameworks based on NoC interconnects. These frameworks help engineers in the switch of design methodology and speed up the development of new NoC-based systems on chip. In this Thesis we propose an introduction of CMP and SoC interconnection networks. Then focusing on SoC systems we propose: • a detailed analysis based on simulation of the Spidergon NoC, a ST Microelectronics solution for SoC interconnects. The Spidergon NoC differs from many classical solutions inherited from the parallel computing world. Here we propose a detailed analysis of this NoC topology and routing algorithms. Furthermore we propose aEqualized a new routing algorithm designed to optimize the use of the resources of the network while also increasing its performance; • a methodology flow based on modified publicly available tools that combined can be used to design, model and analyze any kind of System on Chip; • a detailed analysis of a ST Microelectronics-proprietary transport-level protocol that the author of this Thesis helped developing; • a simulation-based comprehensive comparison of different network interface designs proposed by the author and the researchers at AST lab, in order to integrate shared-memory and message-passing based components on a single System on Chip; • a powerful and flexible solution to address the time closure exception issue in the design of synchronous Networks on Chip. Our solution is based on relay stations repeaters and allows to reduce the power and area demands of NoC interconnects while also reducing its buffer needs; • a solution to simplify the design of the NoC by also increasing their performance and reducing their power and area consumption. We propose to replace complex and slow virtual channel-based routers with multiple and flexible small Multi Plane ones. This solution allows us to reduce the area and power dissipation of any NoC while also increasing its performance especially when the resources are reduced. This Thesis has been written in collaboration with the Advanced System Technology laboratory in Grenoble France, and the Computer Science Department at Columbia University in the city of New York.

Design, development and first evaluation of a client/server system for managing and querying linguistic corpora

This thesis is concerned with the role played by software tools in the analysis and dissemination of linguistic corpora and their contribution to a more widespread adoption of corpora in different fields. Chapter 1 contains an overview of some of the most relevant corpus analysis tools available today, presenting their most interesting features and some of their drawbacks. Chapter 2 begins with an explanation of the reasons why none of the available tools appear to satisfy the requirements of the user community and then continues with technical overview of the current status of the new system developed as part of this work. This presentation is followed by highlights of features that make the system appealing to users and corpus builders (i.e. scholars willing to make their corpora available to the public). The chapter concludes with an indication of future directions for the projects and information on the current availability of the software. Chapter 3 describes the design of an experiment devised to evaluate the usability of the new system in comparison to another corpus tool. Usage of the tool was tested in the context of a documentation task performed on a real assignment during a translation class in a master's degree course. In chapter 4 the findings of the experiment are presented on two levels of analysis: firstly a discussion on how participants interacted with and evaluated the two corpus tools in terms of interface and interaction design, usability and perceived ease of use. Then an analysis follows of how users interacted with corpora to complete the task and what kind of queries they submitted. Finally, some general conclusions are drawn and areas for future work are outlined.

Non-Linear Analysis and Design of Synchronous Bearingless Multiphase Permanent Magnet Machines and Drives

A two-dimensional model to analyze the distribution of magnetic fields in the airgap of a PM electrical machines is studied. A numerical algorithm for non-linear magnetic analysis of multiphase surface-mounted PM machines with semi-closed slots is developed, based on the equivalent magnetic circuit method. By using a modular structure geometry, whose the basic element can be duplicated, it allows to design whatever typology of windings distribution. In comparison to a FEA, permits a reduction in computing time and to directly changing the values of the parameters in a user interface, without re-designing the model. Output torque and radial forces acting on the moving part of the machine can be calculated. In addition, an analytical model for radial forces calculation in multiphase bearingless Surface-Mounted Permanent Magnet Synchronous Motors (SPMSM) is presented. It allows to predict amplitude and direction of the force, depending on the values of torque current, of levitation current and of rotor position. It is based on the space vectors method, letting the analysis of the machine also during transients. The calculations are conducted by developing the analytical functions in Fourier series, taking all the possible interactions between stator and rotor mmf harmonic components into account and allowing to analyze the effects of electrical and geometrical quantities of the machine, being parametrized. The model is implemented in the design of a control system for bearingless machines, as an accurate electromagnetic model integrated in a three-dimensional mechanical model, where one end of the motor shaft is constrained to simulate the presence of a mechanical bearing, while the other is free, only supported by the radial forces developed in the interactions between magnetic fields, to realize a bearingless system with three degrees of freedom. The complete model represents the design of the experimental system to be realized in the laboratory.

Design, development, and analysis of hybrid metal-composite tube for industrial application

In the aerospace, automotive, printing, and sports industries, the development of hybrid Carbon Fiber Reinforced Polymer (CFRP)-metal components is becoming increasingly important. The coupling of metal with CFRP in axial symmetric components results in reduced production costs and increased mechanical properties such as bending, torsional stiffness, mass reduction, damping, and critical speed compared to the single material-built ones. In this thesis, thanks to a novel methodology involving a rubbery/viscoelastic interface layer, several hybrid aluminum-CFRP prototype tubes were produced. Besides, an innovative system for the cure of the CFRP part has been studied, analyzed, tested, and developed in the company that financed these research activities (Reglass SRL, Minerbio BO, Italy). The residual thermal stresses and strains have been investigated with numerical models based on the Finite Element Method (FEM) and compared with experimental tests. Thanks to numerical models, it was also possible to reduce residual thermal stresses by optimizing the lamination sequence of CFRP and determining the influence of the system parameters. A novel software and methodology for evaluating mechanical and damping properties of specimens and tubes made in CFRP were also developed. Moreover, to increase the component's damping properties, rubber nanofibers have been produced and interposed throughout the lamination of specimens. The promising results indicated that the nanofibrous mat could improve the material damping factor over 77% and be adopted in CFRP components with a negligible increment of weight or losing mechanical properties.

Design and characterization of wideband Hall current sensors in BCD technology for smart power and metering applications

Power electronic circuits are moving towards higher switching frequencies, exploiting the capabilities of novel devices to shrink the dimension of passive components. This trend demands sensors capable enough to operate at such high frequencies. This thesis aims to demonstrate through experimental characterization, the broadband capability of a fully integrated CMOS X-Hall current sensor in current mode interfaced with a transimpedance amplifier (TIA), chip CH09, realized in CMOS technology for power electronics applications such as power converters. The system exploits a common-mode control system to operate the dual supply system, 5-V for the X-Hall probe and 1.2-V for the readout. The developed prototype achieves a maximum acquisition bandwidth of 12 MHz, a power consumption of 11.46 mW, resolution of 39 mArms, a sensitivity of 8 % /T, and a FoM of 569-MHz/A2mW, significantly higher than current state-of-the-art. Further enhancements were proposed to CH09 as a new chip CH100, aiming for accuracy levels prerequisite for a real-time power electronic application. The TIA was optimized for a wider bandwidth of 26.7 MHz with nearly 30% reduction of the integrated input referred noise of 26.69 nArms at the probe-AFE interface in the frequency band of DC-30 MHz, and a 10% improvement in the dynamic range. The expected input range is 5-A. The chip incorporates a dual sensing chain for differential sensing to overcome common mode interferences. A novel offset cancellation technique is proposed that would require switching of polarity of bias currents. Thermal gain drift was improved by a factor of 8 and will be digitally calibrated utilizing a new built-in temperature sensor with a post calibration measurement accuracy greater than 1%. The estimated power consumption of the entire system is 55.6 mW. Both prototypes have been implemented through a 90-nm microelectronic process from STMicroelectronics and occupy a silicon area of 2.4 mm2.