3 resultados para Critical power intensity
em AMS Tesi di Dottorato - Alm@DL - Università di Bologna
Resumo:
The international growing concern for the human exposure to magnetic fields generated by electric power lines has unavoidably led to imposing legal limits. Respecting these limits, implies being able to calculate easily and accurately the generated magnetic field also in complex configurations. Twisting of phase conductors is such a case. The consolidated exact and approximated theory regarding a single-circuit twisted three-phase power cable line has been reported along with the proposal of an innovative simplified formula obtained by means of an heuristic procedure. This formula, although being dramatically simpler, is proven to be a good approximation of the analytical formula and at the same time much more accurate than the approximated formula found in literature. The double-circuit twisted three-phase power cable line case has been studied following different approaches of increasing complexity and accuracy. In this framework, the effectiveness of the above-mentioned innovative formula is also examined. The experimental verification of the correctness of the twisted double-circuit theoretical analysis has permitted its extension to multiple-circuit twisted three-phase power cable lines. In addition, appropriate 2D and, in particularly, 3D numerical codes for simulating real existing overhead power lines for the calculation of the magnetic field in their vicinity have been created. Finally, an innovative ‘smart’ measurement and evaluation system of the magnetic field is being proposed, described and validated, which deals with the experimentally-based evaluation of the total magnetic field B generated by multiple sources in complex three-dimensional arrangements, carried out on the basis of the measurement of the three Cartesian field components and their correlation with the field currents via multilinear regression techniques. The ultimate goal is verifying that magnetic induction intensity is within the prescribed limits.
Resumo:
High Energy efficiency and high performance are the key regiments for Internet of Things (IoT) end-nodes. Exploiting cluster of multiple programmable processors has recently emerged as a suitable solution to address this challenge. However, one of the main bottlenecks for multi-core architectures is the instruction cache. While private caches fall into data replication and wasting area, fully shared caches lack scalability and form a bottleneck for the operating frequency. Hence we propose a hybrid solution where a larger shared cache (L1.5) is shared by multiple cores connected through a low-latency interconnect to small private caches (L1). However, it is still limited by large capacity miss with a small L1. Thus, we propose a sequential prefetch from L1 to L1.5 to improve the performance with little area overhead. Moreover, to cut the critical path for better timing, we optimized the core instruction fetch stage with non-blocking transfer by adopting a 4 x 32-bit ring buffer FIFO and adding a pipeline for the conditional branch. We present a detailed comparison of different instruction cache architectures' performance and energy efficiency recently proposed for Parallel Ultra-Low-Power clusters. On average, when executing a set of real-life IoT applications, our two-level cache improves the performance by up to 20% and loses 7% energy efficiency with respect to the private cache. Compared to a shared cache system, it improves performance by up to 17% and keeps the same energy efficiency. In the end, up to 20% timing (maximum frequency) improvement and software control enable the two-level instruction cache with prefetch adapt to various battery-powered usage cases to balance high performance and energy efficiency.
Resumo:
The world is quickly changing, and the field of power electronics assumes a pivotal role in addressing the challenges posed by climate change, global warming, and energy management. The introduction of wide-bandgap semiconductors, particularly gallium nitride (GaN), in contrast to the traditional silicon technology, is leading to lightweight, compact and evermore efficient circuitry. However, GaN technology is not mature yet and still presents reliability issues which constrain its widespread adoption. Therefore, GaN reliability is a hotspot for the research community. Extensive efforts have been directed toward understanding the physical mechanisms underlying the performance and reliability of GaN power devices. The goal of this thesis is to propose a novel in-circuit degradation analysis in order to evaluate the long-term reliability of GaN-based power devices accurately. The in-circuit setup is based on measure-stress-measure methodology where a high-speed synchronous buck converter ensures the stress while the measure is performed by means of full I-V characterizations. The switch from stress mode to characterization mode and vice versa is automatic thanks to electromechanical and solid-state relays controlled by external unit control. Because these relays are located in critical paths of the converter layout, the design has required a comprehensive study of electrical and thermal problems originated by the use of GaN technology. In addition, during the validation phase of the converter, electromagnetic-lumped-element circuit simulations are carried out to monitor the signal integrity and junction temperature of the devices under test. However, the core of this work is the in-circuit reliability analysis conducted with 80 V GaN HEMTs under several operating conditions of the converter in order to figure out the main stressors which contribute to the device's degradation.