Ultra-som pulsado de baixa intensidade em fraturas diafisárias: aplicação clínica em cães

Os efeitos da estimulação ultra-sônica sobre a consolidação óssea têm sido demonstrados por trabalhos experimentais e clínicos. Este estudo teve por objetivo investigar a aplicação clínica do ultra-som pulsado de baixa intensidade como tratamento adjuvante de fraturas diafisárias em cães. Foram utilizados 16 cães de raças variadas, com faixa etária entre sete meses e seis anos, peso corpóreo entre 2,5 e 43kg, portadores de fraturas diafisárias fechadas recentes localizadas no rádio e ulna, fêmur ou tíbia e fíbula, estabilizadas por procedimentos de osteossíntese (fixação esquelética externa, pinos intramedulares ou a associação desses métodos). Os cães foram divididos em dois grupos: fraturas estabilizadas tratadas por ultra-som de baixa intensidade (grupo tratado, n=8); fraturas estabilizadas, não tratadas por estimulação ultra-sônica, (grupo controle, n=8). Os animais foram avaliados por exames clínicos e radiográficos nos períodos pré-operatório, pós-operatório imediato e a cada 30 dias posteriores aos procedimentos cirúrgicos. Realizou-se tratamento com ultra-som pulsado (sinal senoidal com freqüência de 1,5MHz, largura de pulso de 200µs e freqüência de repetição de 1kHz) de baixa intensidade (30mW cm-2), aplicado de modo estacionário no foco de fratura. A terapia ultra-sônica foi realizada 20 minutos por dia, durante 21 dias consecutivos, a partir do período compreendido entre o 1° e o 9° dia pós-operatório. O teste t de Student, empregado na análise estatística, mostrou diferença significante (P<0,001 e alfa=0,05) entre as médias dos parâmetros de tempo para consolidação óssea observadas nos animais dos grupos tratado (média de 67,5 dias) e controle (média de 106 dias). Este protocolo de estimulação ultra-sônica promoveu sinais clínicos e radiográficos acelerados da consolidação óssea nas fraturas tratadas. Os resultados deste estudo sugerem que o ultra-som pulsado de baixa intensidade pode ser indicado como terapia adjuvante de fraturas diafisárias recentes em cães.

A novel voltage step-down/up ZCS-PWM Zeta converter

This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.

Electronic ballast for multiple fluorescent lamp systems

An electronic ballast for multiple tubular fluorescent lamp systems is presented. The proposed structure has a high value for the power factor, a dimming capability, and soft switching of the semiconductor devices operated at high frequencies. A zero-current switching pulse width modulated SEPIC converter is used as the rectifying stage and it is controlled using the instantaneous average input current technique. The inverting stage consists of classical resonant half-bridge converter with series-resonant parallel-loaded filters. The dimming control technique is based on varying the switching frequency and monitoring the phase shift of the current drained by the filters and lamps in order to establish a closed loop control. Experimental results are presented that validate the theoretical analysis.

A CMOS/SOI single-input PWM discriminator for low-voltage body-implanted applications

A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM) signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mum single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm(2). Measured resolution of encoding parameter a is better than 10% at 6 MHz and V-DD = 3.3 V. Idle-mode consumption is 340 LW. Pulses of frequencies up to 15 MHz and alpha = 10% can be discriminated for 2.3 V less than or equal to V-DD less than or equal to 3.3 V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.

Single-phase high power factor hybrid rectifier suitable for high-power applications

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Piezoelectric behavior of SrRuO(3) buffered lanthanum modified bismuth ferrite thin films grown by chemical method

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

The ZVS-PWM commutation cell applied to the DC-AC converter

This paper presents the analysis of a dc-ac converter using a zero-voltage-switching (ZVS) commutation cell. First, we show the cell applied to the buck converter. The stages of operation are presented along with the main current and voltage equations. Next, we adapt the converter to the regenerative-operation mode. Hence, the full-bridge converter at low-frequency operation is connected in the dc-dc output stage (at high frequency). The main switches commute at zero voltage. The converter operated at constant frequency with pulse-width modulation (PWM), and neither overvoltage nor additional current stress was observed by digital simulation. A design example and experimental results obtained by prototype, rated at 275 V and 1 kW, are also presented. © 1997 IEEE.

New family of zero-current-switching PWM converter

A new family of dc-to-dc pulse-width-modulated (PWM) converters is presented. These converters feature soft-commutation at zero-current (ZC) in the active switches. The new ZCS-PWM Boost and new ZCS-PWM Zeta converters, both based on the new ZCS-PWM soft-commutation cell proposed, are used as examples to illustrate the operation of the new family of converters.

Novos conversores retificadores Sepic ZCS-PWM, operando como abaixadores de tensao, com elevados rendimento e fator de potencia - um estudo comparativo

A comparative evaluation regarding a new zero-current-switching (ZCS) pulse width modulated (PWM) Sepic rectifier, operating in voltage step-down mode, employing two different techniques, in order to obtain high power factor and reduced total harmonic distortion (THD) at the input current, is presented. The methods are those in continuous-current mode operation, known as peak current mode control with slope compensation, and average-current mode control. The principle of operation, the theoretical analysis, a design example and the main experimental results are presented for both proposed control techniques.

Novel high-power-factor isolated electronic ballast for multiple tubular fluorescent lamps

This paper presents a novel isolated electronic ballast for multiple fluorescent lamps, featuring high power-factor, and high efficiency. Two stages compose this new electronic ballast, namely, a new voltage step-down isolated Sepic rectifier, and a classical resonant Half-Bridge inverter. The new isolated Sepic rectifier is obtained from a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The average-current control technique is used in this preregulator stage in order to provide low phase displacement and low Total-Harmonic-Distortion (THD) at input current, resulting in high power-factor, and attending properly IEC 61000-3-2 standards. The resonant Half-Bridge inverter performs Zero-Voltage-Switching (ZVS), providing conditions for the obtaining of overall high efficiency. It is developed a design example for the new isolated electronic ballast rated at 200W output power, 220Vrms input voltage, 115Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Finally, experimental results are presented in order to verify the developed analysis. The THD at input current is equal to 5.25%, for an input voltage THD equal to 1.63%, and the measured overall efficiency is about 88.25%, at rated load.

A high efficiency HPF-ZCS-PWM Sepic for electronic ballast with multiple tubular fluorescent lamps

This paper presents a high efficiency Sepic rectifier for an electronic ballast application with multiple fluorescent lamps. The proposed Sepic rectifier is based on a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The high power-factor of this structure is obtained using the instantaneous average-current control technique, in order to attend properly IEC61000-3-2 standards. The inverting stage of this new electronic ballast is a classical Zero-Voltage-Switching (ZVS) Half-Bridge inverter. A proper design methodology is developed for this new electronic ballast, and a design example is presented for an application with five fluorescent lamps 40W-T12 (200W output power), 220Vrms input voltage, 130Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Experimental results are also presented. The THD at input current is equal to 6.41%, for an input voltage THD equal to 2.14%, and the measured overall efficiency is about 92.8%, at rated load.

Dimmable electronic ballast with high power-factor SEPIC preregulator, for multiple tubular fluorescent lamps

An electronic ballast for multiple tubular fluorescent lamps is presented in this paper. The proposed structure features high power-factor, dimming capability, and soft-switching to the semiconductor devices operated in high frequencies. A Zero-Current-Switching - Pulse-Width-Modulated (ZCS-PWM) SEPIC converter composes the rectifying stage, controlled by the instantaneous average input current technique, performing soft-commutations and high input power factor. Regarding the inverting stage, it is composed by a classical resonant Half-Bridge converter, associated to Series Parallel-Loaded Resonant (SPLR) filters. The dimming control technique employed in this Half-Bridge inverter is based on the phase-shift in the current processed through the sets of filter + lamp. In addition, experimental results are shown in order to validate the developed analysis.

Low-cost PWM speed controller for an electric mini-baja type vehicle

This paperwork presents a Pulse Width Modulation (PWM) speed controller for an electric mini-baja-type car. A battery-fed 1-kW three-phase induction motor provides the electric vehicle traction. The open-loop speed control is implemented with an equal voltage/frequency ratio, in order to maintain a constant amount of torque on all velocities. The PWM is implemented by a low-cost 8-bit microcontroller provided with optimized ROM charts for distinct speed value implementations, synchronized transition between different charts and reduced odd harmonics generation. This technique was implemented using a single passenger mini-baja vehicle, and the essays have shown that its application resulted on reduced current consumption, besides eliminating mechanical parts. Copyright © 2007 by ABCM.

3-D Space Vector PWM implementation for Four-Leg Voltage Source Inverter

The Space Vector PWM implementation and operation for a Four-leg Voltage Source Inverter (VSI) is detailed and discussed in this paper. Although less common, four-leg VSIs are a viable solution for situations where neutral connection is necessary, including Active Power Filter applications. This topology presents advantages regarding the VSI DC link and capacitance, which make it useful for high power devices. Theory, implementation and simulations are also discussed in this paper. © 2011 IEEE.

Tri-state Space Vector Modulation for Three-phase integrated inverters

The aim of this work is to present a modified Space Vector Modulation (SVM) suitable for Tri-state Three-phase inverters. A standard SVM algorithm and the Tri-state PWM (Pulse Width Modulation) are presented and their concept are mixed into the novel SVM. The proposed SVM is applied to a three-phase tri-state integrated Boost inverter, intended to Photovoltaic Energy Applications. The main features for this novel SVM are validated through simulations and also by experimental tests. The obtained results prove the feasibility of the proposal. © 2011 IEEE.