27 resultados para Programmable controllers

em Repositório Institucional UNESP - Universidade Estadual Paulista "Julio de Mesquita Filho"


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Pós-graduação em Engenharia Elétrica - FEIS

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This work studies and develops a machine automation for tyre truing. It is discussed industry development, industrial processes automation, tyre-recycling process, advantages of tyre reuse for preservation of the environment and probable gains from the automation of part of the tyre-recycling process. In this text, it is detailed the work done to configure, program and optimize the truing process through automation components as CNC, PLC and drives. Tests and simulations are performed to determine the payback necessary period in productivity and profit gains

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This monograph presents the main objective of analyzing the redundancy protection systems of protection for redundancy and block of energies against accident in presses and rotating equipment. After understanding two specific goals, on this case, show the systems of protection against accidents in rotating equipments, presses and similar; and discuss the vulnerabilities of current systems of protection against accidents in presses and similar, we will propose a system of autonomous redundancy of Programmable Logic Controller (PLC) operating simultaneously taking online in the event of failure of one of the two. The methodology was worked through a revision of a variety of bibliography, and interpretation of national and international standards as well as access to research on systems, practices used in industrial and companies supplying products and of companies and energy blockages solutions

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The aim of this study was to develop a laboratory method for time response evaluation on electronically controlled spray equipment using Programmable Logic Controllers (PLCs). For that purpose, a PLC controlled digital drive inverter was set up to drive an asynchronous electric motor linked to a centrifugal pump on a experimental sprayer equipped with electronic flow control. The PLC was operated via RS232 serial communication from a PC computer. A user program was written to control de motor by adjusting the following system variables, all related to the motor speed: time stopped; ramp up and ramp down times, time running at a given constant speed and ramp down time to stop the motor. This set up was used in conjunction with a data acquisition system to perform laboratory tests with an electronically controlled sprayer. Time response for pressure stabilization was measured while changing the pump speed by +/-20%. The results showed that for a 0.2 s ramp time increasing the motor speed, as an example, an AgLogix Flow Control system (Midwest Technologies Inc.) took 22 s in average to readjust the pressure. When decreasing the motor speed, this time response was down to 8 s. General results also showed that this kind of methodology could make easier the definition of standards for tests on electronically controlled application equipment.

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In the paper the improvement of a traditional structure of a microprogrammed controller with sharing codes is discussed. The idea is based on the modification of internal modules and connections of the device. Such a solution permits to reduce the number of embedded memories needed for implementation of the microprogrammed controller on programmable structures, especially FPGAs. © 2011 IEEE.

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A novel hybrid high power rectifier capable to achieve unity power factor is proposed in this paper. Single-phase SEPIC rectifiers are associated in parallel with each leg of three-phase 6-pulse diode rectifier resulting in a programmable input current waveform structure. In this paper it is described the principles of operation of the proposed converter with detailed simulation and experimental results. For a total harmonic distortion of the input line current (THDI) less than 2% the rated power of the SEPIC rectifiers is 33%. Therefore, power rating of the SEPIC parallel converters is a fraction of the output power, on the range of 20% to 33% of the nominal output power, making the proposed solution economically viable for high power installations, with fast pay back of the investment. Moreover, retrofits to existing installations are also possible with this proposed topology, since the parallel path can be easily controlled by integration with the already existing de-link. Experimental results are presented for a 3 kW implemented prototype, in order to verify the developed analysis.

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The design of full programmable type-2 membership function circuit is presented in this paper. This circuit is used to implement the fuzzifier block of Type-2 Fuzzy Logic Controller chip. In this paper the type-2 fuzzy set was obtained by blurring the width of the type-1 fuzzy set. This circuit allows programming the height and the shape of the membership function. It operates in current mode, with supply voltage of 3.3V. The simulation results of interval type-2 membership function circuit have been done in CMOS 0.35μm technology using Mentor Graphics software. © 2011 IEEE.

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In most cases, the cost of a control system increases based on its complexity. Proportional (P) controller is the simplest and most intuitive structure for the implementation of linear control systems. The difficulty to find the stability range of feedback systems with P controllers, using the Routh-Hurwitz criterion, increases with the order of the plant. For high order plants, the stability range cannot be easily obtained from the investigation of the coefficient signs in the first column of the Routh's array. A direct method for the determination of the stability range is presented. The method is easy to understand, to compute, and to offer the students a better comprehension on this subject. A program in MATLAB language, based on the proposed method, design examples, and class assessments, is provided in order to help the pedagogical issues. The method and the program enable the user to specify a decay rate and also extend to proportional-integral (PI), proportional-derivative (PD), and proportional-integral-derivative (PID) controllers.

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Sometimes it is inconvenient or expensive to open the loop of a system to insert lag controllers-for instance, when this system is an open-loop system. A new controller structure where the loop is not opened, and that allows the design of lag controllers as in the case where one can open the loop, is presented. This result can be used by educators in undergraduate courses that deal with classic control system theory, because it allows a better comprehension of the concept of lag compensation and provides a new method for its design and implementation. An example illustrates the application of the proposed method.

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This paper presents a new approach to develop Field Programmable Analog Arrays (FPAAs),(1) which avoids excessive number of programming elements in the signal path, thus enhancing the performance. The paper also introduces a novel FPAA architecture, devoid of the conventional switching and connection modules. The proposed FPAA is based on simple current mode sub-circuits. An uncompounded methodology has been employed for the programming of the Configurable Analog Cell (CAC). Current mode approach has enabled the operation of the FPAA presented here, over almost three decades of frequency range. We have demonstrated the feasibility of the FPAA by implementing some signal processing functions.

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Relaxed conditions for stability of nonlinear continuous-time systems given by fuzzy models axe presented. A theoretical analysis shows that the proposed method provides better or at least the same results of the methods presented in the literature. Digital simulations exemplify this fact. This result is also used for fuzzy regulators design. The nonlinear systems are represented by fuzzy models proposed by Takagi and Sugeno. The stability analysis and the design of controllers axe described by LMIs (Linear Matrix Inequalities), that can be solved efficiently using convex programming techniques.

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In this paper we use the Hermite-Biehler theorem to establish results on the design of proportional plus integral plus derivative (PID) controllers for a class of time delay systems. Using the property of interlacing at high frequencies of the class of systems considered and linear programming we obtain the set of all stabilizing PID controllers. As far as we know, previous results on the synthesis of PID controllers rely on the solution of transcendental equations. This paper also extends previous results on the synthesis of proportional controllers for a class of delay systems of retarded type to a larger class of delay systems. (C) 2009 Elsevier Ltd. All rights reserved.

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A CMOS low-voltage, wide-swing continuous-time current amplifier is presented. Exhibiting an open-loop architecture, the circuit is composed of transresistance and transconductance stages built upon triode-operating transistors. In addition to an extended dynamic range, the current gain can be programmed within good accuracy by a rapport involving only transistor geometries and tuning biases. Low temperature-drift on gain setting is then expected.In accordance with a 0.35 mum n-well CMOS fabrication process and a single 1.1 V-supply, a balanced current-amplifier is designed for a programmable gain-range of 6 - 34 dB and optimized with respect to dynamic range. Simulated results from PSPICE and Bsim3v3 models indicate, for a 100 muA(pp)-output current, a THD of 0.96 and 1.87% at 1 KHz and 100 KHz, respectively. Input noise is 120 pArootHz @ 10 Hz, with S/N = 63.2 dB @ 1%-THD. At maximum gain, total quiescent consumption is 334 muW. Measurements from a prototyped amplifier reveal a gain-interval of 4.8-33.1 dB and a maximum current swing of 120 muA(pp). The current-amplifier bandwidth is above 1 MHz.

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A novel hybrid three-phase rectifier is proposed. It is capable to achieve high input power factor (PF) and low total harmonic input currents distortion (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase six-pulse diode rectifier (Graetz bridge) with a parallel connection of single-phase Sepic rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this work describes its principles, with detailed operation, simulation, experimental results, and discussions on power rating of the required Sepic converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Sepic converters, making the proposed solution economically viable for very high power installations, with fast investment payback. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing dc-link. A prototype has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly implemented in higher power applications.

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A new topology for a LVLP variable-gain CMOS amplifier is presented. Input- and load-stage are built around triode-transconductors so that voltage-gain is fully defined by a linear relationship involving only device-geometries and biases. Excellent gain-accuracy, temperature-insensitivity; and wide range of programmability, are thus achieved. Moreover, adaptative biasing improves the common-mode voltage stability upon gain-adjusting. As an example, a 0-40dB programmablegain audio-amplifier is designed. Its performance is supported by a range of simulations. For VDD=1.8V and 20dB-nominal gain, one has Av=19.97dB, f3db=770KHz and quiescent dissipation of 378μW. Over temperatures from -25°C to 125°C, the 0. ldB-bandwidth is 52KHz. Dynamic-range is optimized to 57.2dB and 42.6dB for gains of 20dB and 40dB, respectively. THD figures correspond to -60.6dB@Vout= 1Vpp and -79.7dB@Vout= 0.5 Vpp. A nearly constant bandwidth for different gains is also attained.